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>i/iyjxiyi/i 

1990 
Applications 
Handbooli 



A/D Converters 
D/A Converters 
Analog Switches 
Analog Multiplexers 
Active Filters 
Power Supply Circuits 



Video Products 
RS-232/lnterfface Circuits 
Op Amps/Buffers 
Voltage References 
Display Drivers 
Timers/Counters 



Table of Contents 

Maxim Product Selection Guides iii 

DC-DC Converter and Switching Regulator CircuilS 1 

Otiner Power Supply Curcuits(fiP Reset, Charge Puraps and Un^fRagylators) .... . 2 

Analog-to-Digital Converters 3 

Digital-to-Analog Converters and Voltage References 4 

Op-Anrrps, Buffers, Video Circuits, and Analog Switches 5 

Interface (RS-232), Display Drivers, Timers, and Counters 6 

Filters 7 



T 



Product Selection Guides 

Power Supply and DC-DC Converters iii 

Supervisory Circuits and Under/Over Voltage Detectors iv 

A/D Converters - Fast Conversion Time (<100^s) v 

A/D Converters - Slow Conversion Time (<1 00|j.s) vi 

D/A Converters vii 

References vii! 

Amplifiers and High Speed Comparators ix 

Analog Multiplexers x 

Analog Switches xi 

RS-232 Line Drivers/Receivers xii 

Active Filters . xiii 



ii 



POWER SUPPLY & DC-DC CONVERTERS 



LINEAR REGULATORS 



SWITCHING REGULATORS 



POSITIVE 
LOW POWER 



• ICL7663 (variable) 

• MAX663 (-fSV or variable) 

• MAX666 (+5Vorvar.inc. 

low batt. output) 

• inxeer (low dropout, ^SV or 



NEGATIVE 
LOW POWER 



• ICL7664 

•MAX664 (-5V or variable) 



INVERTING 



• MAX4391 (variable) 

• MAX634 (variable) 

• MAX635 (-5V or variable) 

• MAX636 (-12V or variable) 
•MAX637 (-15V or variable) 



CHARGE PUMPS 



STEP UP 



MAX4193 (variable) 

MAX630 (variable) 

MAX631 (+5V or variable) 

MAX632 (+12V or variable) 

IIAX633 (+15V or variable) 

MAX654 (+5Vout, +1Vin) 

MAX655 (+5Vout, +2Vin) 

MAX656 (+5Vout,+1Vin, Ext.FET) 

MAX657 (+3Vout,+1Vin) 

MAX658 (+5Vout, +2Vin, Ext. FET) 

MAX659 (+3Vout,+2Vin) 



-Vin and 2x Vin 



ICL7660 

• ICL7662 (high voltage) 
■ 817661 (high voltage) 



2x Vin AND 
-2xVin 



• MAX680 

• MAX681 (capsincl.) 



STEP DOWN 



•MAX638 (-i-SV or variable) 



EXT. FET TO APPROX. 5 WATTS 
STEP UP/STEP DOWN/INV. 



DUAL OUTPUT 



•MAX743 (±15Vor±12V) 



•MAX641 (+5V or variable) 
• IIAX642 (H-12V or variable) 
'mxm ('^IIVerviHiite) 



SUPERVISORY CIRCUITS 



UNDER/OVER VOLTAGE DETECTORS 



FIVE FUNCTION* 16 PIN 



MAX691 (4.65V reset) 
MAX693 (4.0V reset) 
MAX695 (200ms reset pulse width) 
MAX791 (monft)rt)adajpbatt) 



FOUR FUNCTION* 16 PIN 



FOUR FUNCTION* 8 PIN 



•MAX690 (4.65 reset) 

• MAX692 (4.0V reset) 

• MAX694 (200ms reset pulse width) 
•MAX790 (improved MAX690) 



RESET & WATCHDOG 



•MAX696 (adj. reset threshold) 
• fUSBHft reset threshold) 



* FUNCTION TABLE: 



MAX698 (reset only) 
MAX699 

MAX700 (reset only, adj hyst) 
MAX701 (reset only) 
MAX702 (reset only) 
MAX1232 (improved DS1 232) 



SINGLE VOLTAGE 
DETECTORS 



MAX8211 (non-inverting 
MAX8212 (inverting) 



DUAL VOLTAGE 
DETECTORS 



ICL766S 



MAX690-MAX1232 
FUNCTIONS 


690 


691 


692 


693 


694 


695 


696 


697 


698 


699 


700 


701 


702 


790 


791 


MAX 
1232 


Fixed Power Up/ 
Down Reset 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 






✓ 


✓ 


✓ 


4 


✓ 


✓ 


✓ 


✓ 


Variable Power Up/ 
Down Reset 














✓ 


✓ 






✓ 










4 


Battery Bacl^up 
Switching 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 














✓ 


4 




Watchdog Timer 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 




✓ 








✓ 


4 


✓ 


Power Fail Warning 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 


✓ 












✓ 


4 




Write Protect 








✓ 






















✓ 





A/D CONVERTERS 



1 



8-Brrs 



SINGLE CHANNEL 



INTERNAL T/H 



• MAX150 (1.34^s/Ref) 

MX7820 (1.34ns) 

ADC0820 (1.38ns) 

MAX165 (5ns/Ref) 

MAX166 (5ns/Ref) 



EXTERNAL T/H 



• MAX160 (4|ts) 

• MX7575 (Sns) 

• MX7576 (10|is) 

• MX7574 (15ns) 



MULTI-CHANNEL 



INTERNAL T/H 



• MAX154 

• MAX158 

• MX7824 

• MX7828 

• MAX155 

• MAX156 



(2MS/4Ch/Ref) 

(2ns/8Ch/Ref) 

(2MS/4-Ch) 

(2ns/8Ch) 

(3MS/Ref/8-Ch) 

(3ns/Ref/8-Ch) 



EXTERNAL T/H 



' MAX161 (20ns/8Ch) 
' MX7581 (67M.s/8Ch) 



FAST CONVERSION 

(<100ns) 
(SAR/FLASH A/Ds) 



lO-HTS 



INTERNAL T/H 



■ MAX151 (1.9)lS/flef) 
MAX177 (10ns/Ref) 



EXTERNAL T/H 



■ HAX173 (5ns/Ref) 



SLOW CONVERSION 
(>100ins) 
(SEE INTEGRATING A/Ds) 



12-BlfS 



SINGLE CHANNEL 



INTERNAL T/H 



• MAX163 (lOns/Ref) 

• MAX164 (lOns/Ref) 

• MAX167 (lOns/Ref) 



EXTERNAL T/H 



• MX578 (3(is/Ref) 

• mxm (3.2S|is/Ref) 

• HAXtS9 (3^Ref) 

• MX7672-03 (3.25ns) 

• MAX170 (Sns/Ref/Serial) 

• MAX171 (6ns/Ref/Serial) 

• MX7572 -05 (Sns/Ref) 

• MX7672 -05 (5ns) 



• MAX174 

• MAX172 

• IIIIX7S72- 

• MX7572- 

• MX674A 

• MX574A 

• MAX178 



(8ns/Ref) 
(10)is/ReQ 

■10(10(18) 

■12(12ns/Ref) 
(15ns/Ret) 
(25ns/Ref) 
(50ns/Ref) 



MULTI-CHANNEL 



INTERNAL T/H 



• MAX180 (8.33ns/Ref/8-Ch) 

• MAXIffil (8.33(ism/6-Chj 

• MAX182 (40ns/Ref/4'Ch) 



EXTERNAL T/H 



' MX7S82 (100ns/4Ch) 



A/D CONVERTERS 



FAST CONVERSION 

(<100^S) 
(SEESAR/FLASHA/Ds) 



LCD DISPLAY 



• ICL7106 

• ICL7116 (HOLD) 

• MAX136 (HOD) 

• ICL7126 

• ICL7136 

• MAX130 (B/G) 

• MAX138 (C/P) 

• ICL7129 (41^ DIGIT) 



LED DISPLAY 



• ICL7107 

• ia7117 (HaD) 

• IIIAX139 (B/G, C/P) 

• MAX140 (B/G, C/P) 

• ICL7135 (4 1/2 DIGIT) 
•MAX131 (B/G) 



1 



SLOW CONVERSION 

(>100ms) 
(INTEGRATING A/Ds) 



|XP INTERFACE 



ICL7109 (12 BIT) 

ICL7135 (4 1/2 DIGIT) 

MAX133 (40,000 COUNT) 

MAX134 (40,000 COUNT) 





NOTE 


C/P 


Generates -5V internally 


HOLD 


Has hold display input 


B/G 


Has bandgap reference 




for Improved stability 



I 



DACs 



RESOLUTION 



8 BIT 



10 BIT 



12 BIT 



14 BIT 



VOUT 



• MX7224 

• MX7225 (Quad) 

• MX7226 (Quad) 
•MX7228 (Octal) 

• MAX500 (Quad,SeriaO 



lour 

• MX7520 

• MX7530 

• MX7S33 



I OUT 



• MX7S23 

• MX7524 
•MXTSae (Dual) 

• MX7628 (Dual) 

• MAX7624 



V OUT 
MX7245 (Ref) 
MX7248 (Ref) 
111X7845 (MDAC) 
MAX501 (MDAC) 



lour 

MX7534 
MX7535 
MX7536 
11X7538 



I OUT 



MX565A 

MX566A 

MX7521 

MX7531 

MX7541 

MX^IA 

11X7542 



(Ref) 



• MX7543 (Serial) 

• MX7545 

• MX7545A 

• MAX543 (Serial) 
•MX7537 (Dual) 
•11X7547 (Dual) 



J, 



REFERENCES 



1 



1.2 Volts 

•ICL8069 

(10-100ppm/'C) 



2.5 Volts 



• MX580 

(10-85ppm/'C) 

• MXS84 

(10-30ppm/'C) 



VOLTAGE OUT 



5.0 Volts 



• MAX675 

(12-20ppm/-C) 

• REF02 
(8.5-250ppm/°C) 

• MX584 
(5-30ppm/'C) 



7.5 Volts 



MX584 

(5-30ppnn/'C) 



10.0 Volts 



• MAX670 

(3-10ppmrC) 

• MAX671 
(1-10ppm/*C) 

• MAX674 
(12-20ppm/'C) 

• MX2700 
(3-10ppm/'C) 

•11X2710 
(1-5ppm/"C) 

• MX581 
(5-30ppm/'C) 

• MX584 
(5-30ppni/'C) 

• REF01 
(8.S^ppRi/'C) 



-10.0 Volts 

• MX2701 

(3-10ppm/'C) 



I 



LOWVqs 



Bipolar 



MAX400 

LT1001 

OP07 

OP27 

OP37 

OP90 



AiVIPLIFIERS 



PREaSION 



SPEED 



LOWIb 



1 



LOW POWER 



LOW NOISE 



BANDWIDTH 



SPECIAL 



ICL761X 
ICL762X 

ICL763X 
ICL764X 
ICL7650 
ICL7652 
MAX42(M24 
MAX430-432 
MAX42S/6 (Ultra-low Vos) 



•MAX425/6 (Low Vos) 

• LT1001 

• OP07 

• OP27 

• OP37 

• LT1028 



MAX408 

MAX428 

MAX448 

MAX450 

MAX451 

MAX452 

MAX457 

OP37 

LT1028 

MAX426 



H Chopper I H PROG. GAIN 



(100MHz) 

(100MHz) 

(100MHz) 

(10MHz) 

(10MHz) 

(50MHz) 

(Dual 70MHz) 

(63MHz) 

(75MHz) 

(12MHz) 



MAX453 (MUX/Amp) 

MAX454 (MUX/Amp) 

MAX455 (MUX/Amp) 

MX3554 (1700MHz) 

MAX460 (Buffer) 

BB3553 (Buffer) 

BB3554 (Buffer) 

LH0033 (Buffer) 

LH0063 (Buffer) 

MAX456 (Video Crosspoint Switch) 

MAX426 (Ultra-Precision, 12MHz GBW) 



• ICL761X 

• ICL762X 

• ICL763X 

• ICL764X 
• ICL7650 

• MAX422 

• MAX423 

• MAX432 

• MAX480 

• OP90 



MAX420 
MAX421 

MAX422 
MAX423 

MAX430 (Internal Cap) 
MAX432 (Internal Cap) 



PGA100 



HIGH SPEED COMPARATORS 



Special 



TTL OUTPUT 



ECL OUTPUT 



• IIIIAX42S/S (Unique non-chopper 
Auto-Zero) 



IIIAX9686 
' MAX9698 (Dual) 
' MAX900/901 (Quad) 



MAX9685 
MM(9687 (Dual) 
MAX9690 



ANALOG MULTIPLEXERS 



1 



FAULT PROTECTED* 



STANDARD 



8 CHANNEL 



MAX378 (+75V) 
MAX379 (Diff±75V) 
MAX368 (Latch +35V) 
MAX369 (Latch, Diff, 135V) 
MAX358 (±35V) 
MAX359 (Diff±35V) 
HI508A (+35V) 
HI509A (Diff±35V) 



VIDEO 



8 CHANNEL 
•DGS08A 

• DG509A m 

• HI508 

• HI509 
. 0GS28 

• DG529 

• MX7501 

• MX7502 

• mum 



(Diff) 
(Latch) 
(Uch, Diff) 

(Diff) 



16 CHANNEL 



•DG506A 

• DG507A (Diff) 

• MX7S06 

• 11X7507 (Diff) 



LOW LEAKAGE 



8 CHANNEL 

• MAX310 

{70db@ 10MHz) 

• MAX311 

(Diff 70db@ 10MHz) 



^ 8 CHANNEL 



MAX328 (lOpA) 
.MAX^ (OtfflOpA) 



MUX/AMPLIFIER 



MAX4S3 (1 of 2, Drives 75a) 
MAX454 (1 of 4, Drives 75a) 
MAX455 (1 of 8, Drives 75a) 



CROSSPOINT 



•HAX456 |8x 8 Switch) 



Withstands quoted input or output voltage indefinitely witfVwItfiout supply voltage present. 



.Ji 



ANALOG SWITCHES 



SPST 



30Q 



IH5048 (Dual) 
IH5148 (Dual) 



50Q 



MAX334 (Quad) 

DG300A (Dual) 

DG304A (DuaQ 

DG381A (Dual) 
IH5140 

IH5141 (Dual) 



75Q 



DG200A (Dual) 
IH5040 

IH5041 (Dual) 

MAX341 (Dual,±50V) 

MAX348 (Dual,±50V) 



175Q 



SPOT 



• MAX331 (Quad) • DG202 (Quad) 

• MAX332 (Quad) • DG211 (Quad) 

• DG201A (Quad) • 06212 (Quad) 



3on 



IH5050 

' IHS051 (Dual) 



50Q 



• DG301A 

• DG303A (Dual) 

• DG305A 

• DG307A (Dual) 
•D6387A 

• DG390A (Dual) 

• IH5142 

• IH5143 (Dual) 



75Q 



• MAX342 

• MAX343 (Dual) 

• IH5042 

• IH5043 (Dual) 



175Q 



MAX333 (Quad) 



DPST 



30Q 



VIDEO 



- DUAL SPST 



• WS04e ( Dual) 



50Q 



DG302A (Dual) 



QUAD SPST 



DG306A 
DG384A 
IH5144 
IH514S 



(Dual) 
(Dual) 

(Dual) 



IH53S2 



75U 



MAX344 (±50V) 

' MAX345 (DuaUSOV) 
IHS044 

'IH5045 (Dual) 



RS-232 LINE DRIVERS/RECEIVERS 



+5V, 4 EXT. CAPS 



2DRVRS/2RCVRS 



• MAX220 

• MAX222 (Low Power) 

• MAX232 

• MAX232A (FASTER) 
•MAX242 

MAX243 



HIGH DRVR/RCVR COUNT 



•MAX230 
•MAX234 

• MAX236 

• MAX237 

• MAX238 

• MAX240 
•MAX241 
•MAX244 
•IIAX248 
•IIAX2M 



(5 DRVRS/0 RCVRS) 

(4DRVRS/0RCVRS) 

(4 DRVRS/3 RCVRS) 

(5 DRVRS/3 RCVRS) 

(4 DRVRS/4 RCVRS) 

(5DRVRS/5RCVRS) 

(4DRVRS/5RCVRS) 

(8DRVRS/10RCVRS) 

(8DRVRS/8RCVRS) 

(6DRVRS/10RCVRS) 



1 



+5V, INTERNAL CAPS 



2DRVRS/2RCVRS 



MAX223 
MAX233 



HIGH DRVR/RCVR COUNT 



•MAX235 (5DRVRS/SRCVRS) 

•MAX245 (8DRVRS/10RCVRS) 

• MAX246 (8DRVRS/10RCVRS) 

•MAX247 {8DRVRS/9R0VRS) 



+5V/+12V OR BATTERY 
P OWER. 2 EXT. CAPS 



2DRVRS/2RCVRS 



MAX231 



HIGH DRVR/RCVR COUNT 



MAX239 (3DRVRS/5RCVRS) 



ISOLATION PRODUCTS 



2 CHIP SET 



IIUOQSO 
MAX251 



COMPLETE MODULE 



• MAX2S2 



ACTIVE FILTERS 



SWITCHED CAPACITOR FILTERS 



UNIVERSAL 



uP PROG. 



BANDPASS 
PIN PROG. 



•MAX260 (7.5kHz) 
•MAX261 (57kHz) 
•MAX262 (140kHz) 



•MAX267 (57kHz) 
•MAX288 (140kHz) 



- PIN PROG. 



' MAX263 (57kHz) 
'MAX264 (140kHz) 



RESISTOR PROG 



MAX265 (57kHz) 
MAX266 (140kHz) 



CONTINUOUS FILTERS 



ZERO ERROR 
LOWPASS 



LOWPASS, 
2nd ORDER 



•MAX280 (20kHz) 
• LTCi062 (20kHz) 
•MAX281 (20kHz) 



•MAX270 (1-25kHz) 
•MAX271 (1-25KHZ) 



DC'DC Converter 
and 

Switching Reguiator 
Circuits 

Low Power Step-Up Converter 1-3 

Medium Power Step- Up Converters 1-3 

High Voltage Step-Up Converter 1-4 

Minimum Component Low Voltage DC-DC Converter 1-4 

High Cun-ent Low Voltage DC-DC Converter 1-5 

Step-Up/Down DC-DC Converter 1-5 

Single Cell Battery Life Test Results 1-6 

Step-Up Converter Produces 5V from 1 .5V 1-7 

Efficient 5V "Bucl<-Boost" Converter 1-8 

Long-Line 5V Voltage Recovery 1-8 

Low Power Step-Down Converters 1-9 

Low Power Inverters 1-9 

-h5V to -5V at 220mA 1-10 

Medium Power Inverters 1-10 

+5V to -24V at 40mA 1-11 

Telecom -48V to 5V at 0.5A 1-11 

Isolated +^ 5V DC-DC Converter 1-12 

5V to Isolated 5V at 20mA 1-12 

-hSV Battery to -t-SV DC-DC Converter 1-13 

Unlnteruptable -I-5V Supply 1-13 

9V Battery Life Extender 1-14 

Dual Tracking Regulator 1-15 

5V from Battery Input in "Positive Ground" Circuits 1-15 

Switching Voltage Inverter has Digitally Adjustable Output 1-16 

Switching Regulator Makes High Current Flasher 1-17 

Battery Comparison: 9V Battery vs. Two AA Batteries 1-18 

DC-DC Converter Basics 1-19 

Pot-Core and Toroid Basics 1-25 

What Value of Inductor? A General Discussion 1-28 

Inductor and Transformer Suppliers 1-31 

Inductor Catalog Pages 1-33 

Pot-Core and Toroid-Core Suppliers ; 1-37 

A Short Battery Primer 1-38 

CMOSCurbsthe Appetite of Power-Hungry DC-DC Converter Chips 1-41 

Chip-Level Converters Administer Local DC Dosages 1-46 

DC/DC Converters Adapt to the Needs of Low-Power Circuits 1-S2 



1-1 



1-2 

1 



indicated coils. Efficiencies can be Improved slightly by 
placing a Schottky diode such as the 1N5817 in parallel 
with the internal MAX63 1/632/633 diode, from pin 4 to 5. 
The increase in efficiency is most noticeable for the 5V 
output circuits. 



Maxim ViN Vout Ioitt 



lndiiclor(M 



Part No. 


(V) 


(V) 


(mA) 




Part No.* 


uH 






2 


5 


5 


78 


6860-21 


470 


0.44 




2 


5 


10 


74 


6860-17 


220 


0.28 




2 


5 


15 


61 


6860-13 


100 


0.1 




3 


5 


25 


82 


boDU-j£l 


470 


0.44 




3 


5 


40 


75 


7070-21 


220 


0.55 


MAX632 


3 


12 


5 


79 


6860-10 


330 


0.35 




3 


12 


10 


79 


7070-28 


180 


0.48 




5 


12 


12 


88 


6860-21 


470 


0.44 




5 


12 


25 


87 


6860-19 


330 


0.35 


mxsm 


3 


15 


5 


73 


7070-29 


220 


0.55 




3 


15 


8 


71 


7070-27 


150 


0.43 




5 


15 


10 


85 


6860-21 


470 


0.44 




5 


15 


15 


85 


6860-19 


330 


0.35 




8 


15 


35 


90 


6860-21 


470 


0.44 




Figure 1-1. 



•Caddell-Burns, NY, (516) 746-2310 



In selecting coils for DC-DC converter circuits that use 
external MOSFETs it is important to calculate the peak 
current and to select a coil that will not saturate at that peak 
current. 



Maxim 
Part No. 


ViN 

(V) 


Vout 
(V) 


loUT 

(mA) 


Typ 
Eff 

(%) 


IPK 

(A) 


Inductor (L) 

Part No.* nH 


n 


MAX642 


5 


12 


200 


91 


1.2 


6860-08 


39 


0.05 




5 


12 


350 


89 


2 


6860^)4 


18 


0.03 




5 


12 


550 


87 


3.5 


7200-02 


12 


0.01 


IUIAX643 


5 


15 


100 


92 


1.2 


6860-08 


39 


0.05 




5 


15 


150 


89 


1.5 


6860^ 


27 


0.04 




5 


15 


225 


89 


2 


6860-04 


18 


0.03 




5 ■ 


15 


325 


85 


3.5 


7200-02 


12 


0.01 





on 


>M>IXL/M 




MAX642 




UAXB43 






Vout 




COMP 








220|iF 



3 7 1 



*Caddeil-BLims. NY. (51^ 746-2310 



Figure 1-2. 



1-3 



.High Voltage Step-Up Converter 



The output voltage limits of the MAX6XX series DC-DC 
converters can be exceeded once an external FET or 
transistor w^ith an adequate voltage rating is used as the 
sw/itch. Here a +12V input is converted to +50V at 50mA 
by adding an IRF530 N-channel FET which has a voltage 
rating of 1 0OV. The circuit differs from the basic MAX641 
hookup in that an external resistor divider must provide the 
feedback signal to the Vfb input and that chip power 
comes from 5ie +12V input via the Vour pin. 



10011H 

1pl( = 1.5A 



lOliF 



rr 



IN4935 



„ 5 



220mF 



*ui Vfb 
MAXS41 



GND LBI COMP 



^ P I ' 



27k 
R4 



Figure 1-3. 



Low VeHmge DG4fG Convmrtmr 



The MAX654 generates 5V at 40mA from a single alka- 
line battery that has discharged down to 1.2V. Output 
current vs. input voltage for several values of L2 are shown 
in the graph. At lower load currents operation continues at tso 
even lower battery voltages. When supplying 10mA from 
its five volt output, this circuit will typically run for 40 




Figure 1-4. 



1-4 



High Cummt Low VoUmge DC-OC Convwtsr 



The MAX656 generates 5V at 250mA from a single cell 
input. Output current vs. input voltage for several values of 
L2 are shown in the graph. An external IRF541 N-channel 
MOSFET acts as the main power switch. A small secondary 
DC-DC converter in the MAX656 generates 12V at low 
current so that the MOSFET operates with lowest on resis- 
tance and highest conversion efficiency. At reduced out- 
put current the circuit will operate down to 0,9V input. 




^ SATT 
t^T 1iV- 



C3 
1nf 



on D 


VCC 




m 






OUT 






imS56 


GNO 




CIl 






V* 


m 




LBO PR 



C2 -1^ 
470iif J~ 



.5V 
250mA 



CI 
It* 



LI -«130-43 
L2-#720IW)2 
(CaMI-ajms 




Figure 1-7. 



Figure 1-6. 



Positive output step-up and step-down DC-DC convert- 
ers have a common limitation in that neither can handle 
input voltages which may be both greater than or less than 
the output. For example, when converting a 12V sealed 
lead acid battery to a regulated -^12V output, the battery 
voltage may vary from a high of 15V down to 10V. 

By using a MAX641 to drive separate P- and N-channel 
MOSFETs, both ends of the inductor are switched to allow 
noninverting buck/boost operation, A second advantage 
of the circuit over most boost-only designs is that the output 
goes to OV when SHUTDOWN is activated, A drawback is 
that efficiency is not optimum because 2 MOSFETs and 2 
diodes increase the losses in the charge and discharge 
path of the inductor. The circuit delivers +12V at 100mA 
at 70% efficiency with an 8V input. 



Step Up/Dovm DC-DC Convortor 




'.«12V/1l)0lIlA 



Figure 1-11. 



1-5 



Single Cell Batteiy Life Test Results 



These graphs show typical hours of operating life for a 
number of single cell alkaline batteries when powering a 
MAX654 DC-DC converter. The typical application circuit, 
shown on the previous page, is used. Results were mea- 
sured wi^ newly purchased cells and m^ vary under other 



conditions. Output load current, battery type, and L2 induc- 
tor value are listed for each curve. End-of- life occurs when 
the MAX654 output falls to 4.5V. The cell voltage at which 
this occurs and the total Watt-l-lours obtained from each 
battery are also indicated. 



AlkalineAA 



® Alkaline C 



5£2 



=5 



5 

4.5 
4 



15 TIME(HOURS) 

(?) AlkalineC 



30 



4,5 
4 



100 200 
TIME(HOURS) 



j^) Alkaline D 







NicadC 


\ 


















SUPPLYI 


*JG5V@40 


mA 









45 











v 
























SUPPL 


YING5V 


©lOrnA 













300 



TRMX 



BATTERY 



oumiT 



BAHERY LIFE 
(HOURS) 



END OF LIFE 
BAn.VOLTASE 



POWER 
INDUCTOR 



ENERGY 
DELIVERED 



AlkalineAA 
NiCad C 
Alkaline C 
Alkaline D 



5V@40mA 
5V @ 40nnA 
5V @ 40mA 
5V @ 40mA 



5 

7 

20 
40 



1.04V 

1.1V 
1.01V 
1.0V 



63|iH 
47nH 
3g|tH 

39^H 



I.OW-Hrs 
1.4W-Hrs, 
4.0W-Hrs. 
8.0W-Hrs 



Alkaline AA 
Alkaline C 
Alkaline D 



5V(8 10mA 
5V @ 10mA 

sveiomA 



43 
134 
274 



0.77V 
0.805V 
0.932V 



114|.iH 
150nH 
157|iH 



2.15W-Hrs, 
6.7W-Hrs. 
13.7W-Hrs. 



Rgwre t-8. 



1-6 



Staip«Clki Smmmtmr nmluemt SV hmn 1JSV 



You can produce a regulated 5V output from a 1 .5V 
battery cell by using the setp-up DC-DC -converter circuit 
shown. The circuit can operate with Vs as low as IV, but 
it requires at least 1.5V to start. The output can deliver 
1 00mA when Vs is 1 .5V or 1 .7A at 70% minimum efficiency 
when Vs is 3V. 

Supply voltage for the switching regulator ICi appears 
first at pin 4 (start-up mode) and then at its own VouT 
terminal, pin 5. The chip includes an oscillator, bandgap 
reference, three voltage comparators, a catch diode, and 
associated control circuitry. An internal MOSFET lets you 
implement low-power applications: higher power calls for 
an external device: Q1 in Figure 1. The on-chip oscillator 
provides a 55kHz square-wave drive to both the internal 
and external MOSFET. 



TABLE 1. OBTAINABLE VALUES OF lour MAX 




Lx 




EXT 


A 












IMX641 




LBI 


GKO 


VFB 




Vs 


L2 


15(lH 


27(lH 


50^H 


1.5V 


100mA 


48mA 


30mA 


2.0V 


200mA 


95mA 


60mA 


2.5V 


360mA 


160mA 


100mA 


3.0V 


1.7A 


1.5A 


1.25A 



You choose an R2 value in the range from lOkQ to 

lOMii. 

For low values of Vs, losses in the internal and external 
diodes and the Q1 inductor sharply limit the maximum 
output current. The following design equations let you 
determine componentvalues while calculating this current. 
First, Q1 must be aible to handle the peak currwit IpK of 
inductor 12: 

, VstQN 

where toN = 0.55/fosc. For this circuit, then IpK = 1 .07A. 

The circuit loss Vloss is 

Vloss = Ipk(RdS(ON)-i-2Rl2)-i-Vd2, 

where tON = Rl2 is the DC resistance of L2 and VD2 is the 
forward voltage drop of D2. For this circuit Vloss = 0.56V. 
The output current Is 

0.5 (L2)IPK ^fosc 
Vreg - (Vs-Vloss)-Il: ■ 

Therefore, lour = 103mA for the circuit shown. Table 1 
shows the output currents you can obtain for various values 
of Vs and L2. The corresponding conversion efficiencies 
range from 70 to 85%. 



Figure 1-9. 



When Q1 turns off, current through inductor 12 drives 
the drain-node voltage higher. Similarly, current through 
LI drives the voltage at pin 5 higher when the internal 
MOSFET tums off. This action generates two independent 
voltages, each higher than VS; Q1 and L2 generate suffi- 
cient overhead voltage to enable the regulator chip to 
produce a regulated 5V output, and the internally gener- 
ated voltage ensures adequate gate drive to Q1. The 
internal voltage, clamped by the 10V zener diode D3, 
ranges from 10V (turn-on) to 15V (normal operation). Ql's 
resulting Rds(ON) is only 0.085ii. 

Resistors R1 and R2 determine the regulated output 
level. For Vreg outputs other than 5V, set 



Ri = R2 



Vqut 
1.31 ■ 



1-7 



Efficient SV "Buck-Boost" Converter 



A regulated 5V output is obtained from 4 Alkaline or 
NiCad cells using fewer parts than otiier bucl<-boost type 
converters. The circuit steps down to 5V when the batteries 
are new (about 6V for Alkaline and 5.4V for NiCad), but also 
steps up to 5V as the cells discharge and the input drops 
to 4V and below. Transformers and the more complex 
buck-boost conversion topologies are avoided by connect- 
ing the negative terminal of the battery to the circuit's -h5V 
output and using an inverting topology. This battery con- 
nection is not a problem for many portable and hand-held 
products because the batteries can be treated as a floating 
source. 

The circuit in the figure uses an inverting DC-DC con- 
verter IC, the MAX635, to generate what it sees as a 
negative output voltage. The chip's negative output and 
ground are then swapped so that a +5V output is supplied 
with respect to the MAX636's V- input (Pin 1 ). This appears 
at GND (Pin 4 on the IV1AX636). A low cost (about $1) 
external P-channel MOSFET and driver IC allow increased 
inductor current so that up to 200mA can be supplied near 
the end of battery life. For loads below 20mA, the external 
FET and the driver IC can be omitted if a SSOnH inductor 
(Caddell-Burns #7070-31) is substituted for the one in the 
figure. In that Gsm, Lx (Pin 5) connects direetly to the coil. 




4Allcalineor 
NiCad cslts 
(4108V) 



Figure 1-12. 



This circuit provides a unique solution to a common 
system-level power distribution problem: When the supply 
voltage to a remote board must traverse a long cable, the 
voltage at end of the line sometimes drops to unacceptable 
levels. This "+5V to +5V" converter addresses this by 
taking the reduced voltage at the end of the supply line and 
boosting it back to +5V. This can be especially useful in 
remote display devices such as some point-of-sale (POS) 
terminals where several meters of cable may separate the 
terminal from the read-out, A MAX631 and a small trans- 
former restore the 5V to 4.5V input back to 5V. The 3.2/1 
turns ratio of the transformer allows the MAX631 to provide 
more than its usual output current, without an external 
MOSFET, at these relative low operating voltages. Output 
current Is 5V at 150mA with a 4.5V input. 

* The MAX631 also makes use of the reflected voltage 
in the transformer primary to generate a higher supply 
voltage of about +9V for itself at VouT- By operating at 9V 
rather than 5V, the on resistance of Lx is reduced. 



Long-Line SV Voltage Recovery 




Figure 1-13. 



1-S 



Part No. 


(V) 


(V) 


(mA) 


(%) 


(A) 


Part No.* 


hh 


n 


MAX638 


7- 9.5 

8- 9.5 


5 
5 


35 
55 


92 
89 


200 
200 


7070-27 
7070-27 


150 
150 


0.4 
0.4 




10- 
14 


5 


50 


92 


300 


7070-30 


270 


0.6 




12 
12 


5 
5 


60 
75 


92 
89 


250 
300 


7070-30 
7070-28 


270 
180 


6 
0.5 



■ Caddell-Bums, NY, (516) 746-2310 



COMP 

VOUT 



MAXS3S 



vfb em 



L (SEE TABLE) 



INS817 



Figure 1-14. 



Maxim 
Part No. 


ViN 
(V) 


VoUT 
(V) 


kXIT 

(mA) 


TypEff 


Inductor (L) 
Part No.* |xH 


a 
















MAX635 


+3 


-5 


5 


60 


6860-19 


330 


0.35 


















+5 


-5 


25 


76 


6860-19 


330 


0.35 


















+9 


-5 


40 


79 


6860-19 


330 


0.35 






6 






-Van 






1 1 


1 










+ 12 


-5 


45 


85 


6860-21 


470 


0.40 












MAXm 






+ 15 


-5 


50 


90 


6860-23 


680 


0.55 


+ 










mX636 
IIMX637 




MAX636 


+5 


-12 


12 


74 


6860-19 


330 


0.35 




+ 






■ Lx 




+9 


-12 


30 


84 


6860-19 


330 


0.35 


















+12 


-12 


40 


89 


6860-21 


470 


0.40 
















MAX637 


+3 


-15 


2- 


65 


6860-19 


470 


0.40 








GND 


Vbef 


Vfb 




+5 


-15 


8 


77 


6860-19 


330 


0.35 










4 


1 7 


1 ° 




+9 


-15 


25 


85 


6860-19 


330 


0.35 

















Low Power Invortors 



* Caddell-Burns, NY, (516) 746-2310 



I 
I 



-1^ sVoUT 



L (SEE TABLE) 



Rgure 1-15. 



1-9 



■iSV to SV at 220mA 



The. absolute maximum peak current rating of the 
MAX637 Lx pin is 525mA. This does NOT correspond to 
525mA of average output current. The IV1AX637 is suitable 
only for low power circuits of up to about 20mA output when 
converting +5V to -5V with no exMfna) buffering. 

This circuit uses two transistors to buffer the Lx output 
to achieve 220mA of output current. The 2N3904 is a small 
signal NPN transistor used to invert the Lx output. The 
2N3904 then drives a power PNP transistor. The signal at 
the collector of the PNP transistor is equivalent to the 
normal MAX636 Lx output, but it has a much larger peak 
output current rating. When using external transistor buf- 
fers, the output voltage is set by an external feedback 
resistor networl<; in this case, the S10l<O and ISOkQi resis- 
tors. 



* 






U 












Vref 






LBI GND 




Figure 1-16. 



In this circuit a CIVIOS inverter such as the IVIAX626 is 
used to convert the open drain Lx output to a signal suitable 
for driving the gate of an external P MOSFET. The 
MTP8P08 has a gate threshold voltage of 2.0V to 4.5V so 
it will have a relatively high resistance if driven with only 5V 
of gate drive. To increase the gate drive voltage, and 
thereby increasing efficiency and power handling capabil- 
ity, the negative supply pin of the CMOS inverter is con- 
nected to the negative output rather than to ground. Once 
the circuit is started, the P MOSFET gate drive swings from 
+5V to -VouT. 

At startup the -VouT is one Schottky diode drop above 
ground and the gate drive to the power MOSFET is slightly 
less than 5V. The output should be only lightly loaded to 
ensure startup, since the output power capability of the 
circuit is very low until -Vout is a couple of volts negative. 



ViN 


-Vout 


lOUT 


Efficiency 


ICi 


Li 


5V 


-5V 


400mA 


70% 


MAX635 


27nH 


5V 


-5V 


500mA 


64% , 


MAX635 


tStiH 


5V 


-12V 


150mA 


75% 


MAX636 


27nH 


5V 


-12V 


200mA 


70% 


MAX636 


18nH 


Notes: 



18mH Coil = Caddell-Burns (Mineola, NY) Model 6860-04 
27mH Coil = Ca?(clell-Bums Model meom 



Medium Power Inverters 




Figure 1-17. 



MO 



+5V ^ ■24V at 40mA 



Similar to the preceding circuit, tine 2N4407 PNP tran- 
sistor is a buffered replica of the fvlAX637 Lx output. Thie 
2N4407, thioughi, fias a hiigfi breakdown voltage and can 
be used to generate a -24V output. The -24V output does 
not appear directly on any pin of the MAX637 since it is 
sensed via the 1 .5Mil external feedback resistor. 




Rgure 1-18. 



reteeom .48 to 5 V at OLM 



The small current consumption of a MAX641 allows it to 
be biased at a -48V rail with a shunt zener diode so that it 
can convert -48V to +5V, This is a common requirement in 
telecom systems where logic circuitry must be powered 
from the central office battery voltage. 

A small high voltage PNP transistor level shifts a feed- 
back signal from the -i-5V output down to the MAX641 , who 
ground pin (pin 3) is tied to the -48V input. The chip is 
biased this way so that EXT can directly drive an N-channel 
MOSFET to switch the inductor to -48V. This way the circuit 
operates much like a step-up DC-DC converter. The 
330pF capacitor provides feedforward compensation to 




stabilize the regulator's control loop. 



Figure 1-19. 



1-11 



Isolated +1SV DC-DC Converter 



In this circuit a TL431 shunt regulator is used to sense the 
output voltage. The TL431 drives the LED of a 4N28 
opto-coupler which provides feedback to the MAX641 
while maintaining isolation between the input +1 2V and the 
output +15V. In this circuit the +15V output is fully regu- 
lated with respect to both line and load changes. 




Figure 1-20. 



In this circuit a negative output voltage DC-DC converter 
generates a -5V at point A. In order to generate -5V at point 
A, the primary of the transformer must flyback to a diode 
drop more negative than -5V. If the transformer has a 

tightly coupled 1/1 turns ratio, there will be5V plus a diode 
drop across the secondary. The 1N5817 rectifies this 
secondary voltage to generate an isoiated 5V output. The 
isolated output is not fuliy reguialed since only the -5V at 
point A is sensed by the MAX635. 

With careful selection of the transformer the 5V output 
will be within 10%. Bifilar winding of the transformer pro- 
vides better output load regulation, but reduces the isola- 
tion voltage by increasing the capacitance between the 
primary and secondary. The isolation voltage breakdown 
is determined by the characteristics of the transformer, not 
the MAX635. 



SV to Isolated SV at 20mA 




1:1 TURNS RATIO 
270uH.<0-5nl>BIMARV 
UiSmni POT core 
SCHOTI/671 14750 
(615)889.860] 



Figuro 1-21. 



1-12 



+3VBattwy to +5 V OC4IC Convwrtw 



A common power supply requirement involves conver- 
sion of a 2.4 or 3V battery voltage to a 5V logic supply. This 
circuit converts 3V to 5V at 40mA with 85% efficiency. 
When Ic (pin 6) is driven low, the output voltage will be the 
battery voltage minus the drop across diode D1. 

The optional circuity using CI, R3, and R4 lowers the 
oscillator frequency when the battery voltage falls to 2.0V. 
This lower frequency maintains the output power capability 
of the circuit by increasing the peak inductor current, 
compensating for the reduced battery voltage. 








u 








LBR 




• 




MAXm 


Ic 








LBO 




GNO 



CI - 
100pf - 



CX47pF 




I 



Rgure 1-22. 



. l/nint«mqitobto +SV Supply 



In this figure the MAX630 provides a continuous supply 
of regulated +5V, with automatic switch-over between line 
power and battery backup. When the line powered input 
voltage is at +5V, it provides 4.4V to the MAX630 and trickle 
charges the battery. If the line powered input falls below 
the battery voltage, the 3.6V battery supplies power to the 
MAX630, which boosts the battery voltage up to -i-5V, thus 
maintaining a continuous supply to the uninterruptable +5V 
bus. Since the +5V output is always supplied through the 
MAX630, there are no power spikes or glitches during 
power transfer. 

The MAX630's low battery detector monitors the line 
powered +5V, and the LBD output can be used to shut 
down unnecessary section of the system during power 
failures. Alternatively, the low battery detector could mon- 
itor the NiCad battery voltage and provide warning of 
power loss when the battery is nearly discharged. 

Unlike battery backup systems that use 9V batteries, this 
circuit does not need + 1 2 or + 1 5V to recharge the battery. 
Consequently, it can be used to provide +5V backup on 
modules or circuit cards which only have 5V available. 



UNINTEBRUPTBLE 
5V OUTPUT 




Figure 1-23. 



1-13 



9V Battery Life Extender 



This circuit provides a minimum of 7V at up to 20mA untii 
tlie SV battery voitage falls to less than 2V. When the battery 
voltage is above 7V, the MAX630's Ic pin is low, putting it 
into the shutdown mode where it draws only W\iA. When 
the battery voltage falls to 7V, the MAX8212 Voltage 
Detector's output goes high, enabling the IVIAX630, The 
MAX630 then maintains the output voltage at 7V even as 
the battery voltage falls below 7V. The low battery detector 



(LBD) is used to decrease the oscillator frequency when 
the battery voltage falls to 3V. This maintains the output 
current capability of the circuit at low voltage. 

Note that this circuit (with or without the MAX8212) can 
be used to provide 5V from 4 all<aline cells. The initial 
voltage is approximately 6V, and the output is maintained 
at 5V even when the battery voltage falls to less than 2V. 



lOuH 
Cadtlel!-8ums 



9V 

BATiaV - 



-1 



THHESHOLO 



T 



rx 



Voi|r6T09V/2ilmA 



mxm 



LBD Cx GND 



± 

I 



Figure 1-M. 



1-14 



MAX630 in this figure to provide a dual tracking ±12V battery voltage oy reaucing me osciiiaioi iieciutiiii^y, via 
output from a 9V battery. The reference for the -1 2V output LBR, when Vbatt falls to 8.5V 
is derived from the positive output via R3 and R4. 



NEGOUT 



R3100k 

I — wv- 



IN914 



fl4100k 





vm VBFf 


•Vs 










mm 


mi 


Cx LEO 


LBR 




3 Jj 


M 




- im 











INPUT. 
.9VBATTEBV 



47()|lH 

Caddali-Bums 

#7070-33 



1N914 



POSOUT 



33(ImF 



GNo "mso 



2 

lOOpF- 



47pF 



Figure 1-25. 



. 5V trom Battery h^utt In 'PoMhrm Qround" &reuits 



In small battery powered devices, the task of converting 
the battery voltage to usable levels is sometimes com- 
pounded by constraints in the design and packaging of the 
finished product. In one such case, circuit requirements 
dictated that the battery positive connection be common 
to both the battery input and the load. Input power is from 
2 AA batteries. The circuit must supply 5V at 4mA and also 
be able to start with an input voltage as low as 2.1V. This 
allows full operation at an end-of-life potential of 1 .05V per 
cell. 

High efficiency and low operating voltage are accom- 
plished by using a MAX638 CMOS "step-down" DC-DC 
converter in the somewhat convoluted configuration shown 
In the figure. Current flows in tfie 470nH coil when the 
Internal switch at Lx turns on. After roughly 1 0^s this switch 
turns off and inductor current is drawn from the negative 
output terminal of the circuit via the 1N5817 Schottky 
rectifier. The 5V output is well regulated since the MAX638 
controls the operation of the Lx switch so that 5V is main- 
tained between its VouT and GND pins. 

When supplying a 5V output, the circuit itself typically 
consumes only 170nA from the battery input. In addition, 
conversion efficiency is maintained at low input voltages. 
While supplying 5V at 4mA, total current drawn from the 
battery at 2.1V is only 11.5mA. Thus typical conversion 
efficiency at end-of-life voltages Is still over 80%. 



- 2AA 
- CELLS 



lOnF ; 



470nf 



MJOOM 

MAXm 



■ +5V0LTS 
4mA 



Figure 1-26. 



W5 



.Switching Voftas* Immrtor has Digitally Adiimtabl» Output 



A simple modification to the feedback network of an 
inverting switching regulator allows the user to adjust the 
negative output. This is useful in LCD display applications 
where the user can adjust the display contrast digitally. 
The two schemes shown allow an adjustable output of 
either to -5V or -5V to -19V. Figure 1 shows an inverting 
switching regulator (MAX635) with feedback applied by 
the feedback resistor of an 8 bit current output DAC 
(MAX7624). The digital inputs of the DAC force more or 
less current into the summing junction of the regulator (pin 
8 of the MAX635). This circuit drives 20mA of ou^ut 
current. 



Figure 1-28 shows how a dual 8 bit current output DAC 
(MX7528)can extend the output voltage range by using the 
two DACs in parallel. The feedback resistor of the first DAC 
is tied to the regulator output. The feedback resistor of the 
second DAC is tied to the reference (the SV power supply) 
to offset the output of the regulator by 5V. The DACs are 
then adjusted to force more or less current into the sum- 
ming junction of the MAX635. The circuit in Figure 1-28 
supplies 8mA. Additional output current will require an 
external power MOSFET. 



3^ 



^ MAXeiS 

BHD 



OlpF 



C 330.H 
C CADOELL-BURNS 

^ (516)746-2310 



4-13 
DIGITAL 
INPUT 



VOUT = OVTO-5V 
20mA 



: nOMF 



Figure 1-27. 



-van 


VFB 


LSI MAX635 


VREf 
*VS 


m 


Lx 



-y- 0.1nf 



H.P50e2-' 
2S3S 

330mH 
CAODEU-SURNS 

- <5ig)7«-2310 . 



Rfba 


OUTB 


OUT A 

VRETA**''*^* 




Rfss 

VBEFB 
VOB 


AGIO 





DIGITAL 
INPUT 



VauT = -5«T0-19V 

an* 



Figure 1-28. 



1-16 



SwUehlng Regulator Makms High Cuirsnt Flasher 



The following circuit uses the internal power MOSFET of 
a CMOS switching regulator to drive an incandescent light 
bulb in a highway flasher which operates off of a 6V lantern 
battery. The CMOS regulator also has the advantage of 1 
micro-amp maximum shutdown current. Shutdown can be 
accomplished by connecting Ic, pin 6, to a voltage lower 
than 0.2 volts. A simple voltage divider consisting of a 
5.1MQ resistor, R1 , and a photo sensitive resistor, R2, can 
provide the input necessary to turn the flasher off during 
the daytime and activate it at night. 

The MAX630 CMOS switching regulator was designed 
to operate at a 50kHz rate with a 50% duty cycle. Regula- 
tion occurs by skipping cycles when the voltage divided 
output exceeds the internal 1.3V reference voltage. This 
regulator has the option of adding an external capacitor to 
the Cx, pin 2, to slow down the frequency of the internal 
oscillator. By adding I^F capacitor to this pin the fre- 
quency drops to about 1 Hertz. The internal N-MOS power 
transistor is rated at 1/2 amp peak current which is suffi- 
cient for many 6V incandescent light bulbs. 



1|lF 



r 

T 





L80 


DOM 


mxex u 




Ic 






GND U 


SR Vfb 



525mA 
MAX 



6 (0.2VTHRESH0LD) < 



R2 

> PHOTO- 

> SENSITIVE 
RESISTOR 

CUIREXCL903L 
EKaZfIc 
1:10k RANGE 
OR 

- CL9au 



Figure 1-29. 



1-17 



. Battery CompmrianHu 9V Battery vs. 2 AA Batteries 



A MAX631 DC-DC converter, a small Inductor, and two 
AA penllght cells can replace a 9V transistor battery, 
increasing battery life while simultaneously allowing a 

lower physical profile. The AA cells, which contain 30% 
more energy than the 6 small cells that make up a 9V 
battery, also have 25% LESS weight and volume. This 
graph shows a MAX631 and two AA cells delivering 10mA 
at 5V for longer time than a MAX666 regulator and a 9V 
alkaline battery. 

If the average current drain is less than 300nA, the 
MAX666 and a 9V battery then becomes the preferred 
method of generating 5V, since its quiescent current is only 
5nA, compared to lOOnA with the MAX631 . If the operat- 
ing life of the system is greater than 2000 hours, the 
MAX666's low Iq compensates for the lower energy avail- 
able from the 9V battery. 

Other information that can be obtained from this graph 
is the effect of the linear regulator's dropout voltage on 
battery life. Since the 9V alkaline battery voltage falls 
rather rapdily near end-of-life, the 0.6V dropout voltage of 
the fv1AX666 has only a minimal effect. For this reason 
regulators with lower dropout voltage but higher quiescent 
current than the MAX666 are frequently a poor tradeoff for 
maximum fcmttery life with alkaline cells. 



X 



vn 




SENSE 






JHUOOMI 

mxm 


VOUI 


GND 


VSET 


SHDN 



Figure 1-30. 




lOOiiF 



Figure 1-31. 



iM«iMnn«wMTian«i 



VOLTS (V) 



• 760mAh Irom MAX631 
and 2 AA Calls 




szoRiMiikimMwaaa 



ao 40 as 

HME (HR) • lOlM OUTPUT 



Figure 1-32. 



1-18 



I 



Maxim's DC-DC converters/switching regulators em- 
ploy an operating principle often termed "flyback", where 
an inductor (coil) alternately stores and releases energy 
which is directed to a load in a controlled manner. The 
circuits are so named because the voltage on the coil 
Inverts or "flies back" when power is removed on each 
switching cycle. A well known example of this type of 
circuit operates in automobile ignitions, to develop high 
spark voltages from a 12V battery input. 



CHMGMECYCU 




Figure 1-33. 



In spite of the fact that flyback circuits do use inductors 
(and occasionally transformers) they are not difficult to 
understand, at least in a qualitative way, without an intense 
mathematical examination. When current flows in an in- 
ductor, energy is stored in an "induced" magnetic field in 
the area surrounding the coil. This field also generates a 
"counter E.M.F." which opposes the applied current. This 
is why inductors attempt to maintain constant current flow 
through themselves (as a compliment to how capacitors 
resist a change in voltage on their plates). 

When a fixed voltage is applied to an inductor, the 
current rises linearly as a function of the applied voltage 
and the coil inductance. If the voltage is applied indefi- 
nitely, the current, in a theoretical inductor rises to infinity. 
In a real-life coil, the current rises until it is limited by the 
resistance present in the coil, switch, and elsewhere in the 
circuit. Sometimes the current rises until the saturation limit 
of the coil's core material is exceeded. When saturation 
occurs, the coil ceases to be a inductor and the current 
may then rise uncontrollably. Inductor saturation should 
be avoided for this reason (See "Inductor Saturation" on 
next page). 



In a typical DC-DC converter or switching regulator 
circuit, a voltage is first applied to a coil for a controlled 
time (typically 10ns in MAX6XX DC-DC converters). This 
induces a current which rises linearly until the voltage is 
removed. At that point the coll current, which resists 
change, looks for some other place to flow. A steering or 
"catch" diode directs ttiis current to the output. The key (in 
step-up converters) to getting a higher output than Input 
voltage, is that the coil voltage rises to the level that allows 
the current to keep flowing. The circuit output can then be 
regulated by monitoring the output voltage and controlling 
the switch which applies power to the coil. 

The particular example describes a step-up or "boost" 
converter, however inverting and step-down circuits are no 
more complex. They differ only in the positions of the three 
basic components: coil, switch, and diode. The three 
basic configurations: Step-Up, Step-Down, and Inverting, 
are shown in Figure 1-34. 



STEP-UP CONVBtTBt 




Figure 1-34. 



1-19 



inductors. Transformers are also frequently used. Flyback 
transformer operation Is very similar to the Inductor exam- 
ple above. The only operating difference occurs during the 
period when current In the primary circuit is interrupted. 
Since no current path or steering diode Is provided In the 
primary circuit at that point In time, the flyback current flows 
in the secondary winding to the output. 




VOUT 



Figure 1-35. 

Though transformers are a bit more complex than colls 
in the flyback circuits, the Increased range of design op- 
tions can provide cost and performance advantages: 

1 ) Lower cost NFETs and NPN transistors can be used 
exclusively, even In inverting and step-down circuits. The 
FET switch source (or transistor emitter) can always be 
grounded so 0im eifcuitry remains simple. 

2) With optical feedback or an additional feedback 
winding, the output can be regulated and electrically iso- 
lated from the input power source. This is important In 
industrial environments where ground integrity cannot be 
assumed, such as In telecommunications systems. 

3) One drive circuit can generate several separate 
outputs If the transformer has multiple secondaries. One 
output Is actively regulated and the turns ratios of the other 
secondary windings ar® siaad: fa Ihe desired output volt- 
ages. 

4) In high voltage circuits and several "nonstandard" 
applications, the added cost of a transformer may be more 
than offset by simplified control circuitry. 



inductor, i.e. the mechanism which limits the rate ot current 
rise breaks down. Energy is no longer being stored In the 
coH's magnetic field. The current, limited only by the 
supply voltage and the resistance in the charging path, 
rises to excessive (possibly destructive) levels and most of 
the Input power Is lost as heat. 

A coll will not saturate as long as its charging current 
does not exceed its current rating. However, In most 

DC-DC designs the peak inductor current (Ipk) Is signifi- 
cantly greater than the average output current, often by as 
much as 4 to 6 times. This "peak" current flows EVERY time 
the current switch (The Lx pin In most MAX63X devices) 
turns on, not just during peak loads. Ipk may be as high as 
several Amps in DC-DC circuits using external MOSFET 
switches and low Inductance values (<100|xH). Figure 
1-36 shows correct and saturated inductor current wave- 
forms for typical DC-DC conversion circuits. 

Besides saturation current other key inductor parame- 
ters are: 

1) Series Resistance: This depends only on the coil 
wire resistance and Is responsible for basic I^R power 
losses. Usually, it Is directly specified by the coil manufac- 
turer. The significance of coll resistance depends on the 
peak coil current, (which Is several times greater than the 
load current and Is described In more detail later on in 
"What Value of Inductor?"). If the peak coll current Is only 
20mA, then 1012 of coll resistance may not generate an 
objectionable loss. If It is 2A however, then 0.2fl or less is 
probably necessary to maintain efficiency. 

2) Core ioss: This Is not well defined by coil manufac- 
turers and Is usually absent from coil data sheets. Toroids 
and pot cores typically (but not exclusively) have lower 
losses than cylindrical types, but In low power circuits the 
efficiency differences usually do not justify the cost differ- 
ence. In high power circuits toroids are more attractive 
because of typically higher current ratings. Highest effi- 
ciency with cylindrical colls Is when ferrlte core material Is 
used. In less demanding applications, a lower cost alter- 
native for both toroids and cylindrical coils Is powered iron, 
but these tend to be larger for a given current rating and 
inductance. 



Not every inductor Is appropriate for DC-DC conversion 
circuitry. Even with the proper Inductance value an "un- 
known" inductory may still saturate If It cannot handle the 
required current. Although the inductance value of several 
types of colls, such as RF chokes, air core Inductors, and 
noise filtering components frequently fall in the appropriate 



1-20 



- Ilirfeaf Inductor Ciimefrt MfamfomM 
(200mAm/. 2na/aiv) 



Normal Operation - 

Linear charge and discharge slopes 



Saturation - 

Non-linear Increase in Inductor current near peaks 



Excessive Resistance - 

1 . High Winding Resistance 

2. High Transistor Ron 

3. High Souscse Resistance 



JUaxImixma BtUeUmey 

CMOS DC-DC converters are generally used in low 
power applications where efficiency is of prime impor- 
tance. In the following text the major causes of energy loss, 
and methods for minimizing each, are listed. 

Switch Resistance - Operating a MAX6XX DC-DC con- 
verter at the highest possible supply voltage (up to the 
maximum 16.5\/ rating) results in the lowest internal switch 

resistance. The effect of supply voltage on switch resis- 
tance for several MAX6XX devices is shown in Figure 1-37, 
For lowest switch resistance, an external MOSFET can be 
easily added to many devices. Logic level FETs, which 
need only 5V of gate-source voltage to turn on, are recom- 
mended for many low voltage applications. 



Diode Losses - Schottky diodes, like the 1N5818, pro- 
vide the lowest fon/vard voltage drop, and consequently the 
best efficiency in most applications. Alternatives are high 
speed silicon switching rectifiers such as 1 N4935 or, in low 
power circuits (<10mA), 1N4148 signal diodes. Rectifier 
switching speed Is Important in DC-DC conversion circuits 
so conventional power supply rectifiers, like 1N4001, 
should not be used. 

Quiescent Current - This is especially important in low 
power applications, particularly those powered from pri- 
mary batteries (see "Summary of Battery Chemistries"), If 
the output current of a DC-DC converter is only a few mA, 
then the efficiency cannot be greater than 50% if the 
conversion circuit itself uses that much current to operate. 
The best choice is to use devices with low operating 
cunem,., .^1^ MAX^%^^^s^4m .mkf JOO's if 



MAX634-638 OUTPUT CHARACTERISTICS 




MAX631-633, MAX641-633 Lx OUTPUT 
CHARACTERISTICS 



600-, 
400- 


Vgs= '5 




















Vgs= 9V - 




300- 
















= 12V 




200- 




















im- 








- Vgs= 3V — 


0- 



























2 

V[js (Volts) 



Figure 1-37. Internal switch ctmracteristics for several MAX63X devices. Vas in tfie graphs is equivalent to the input voltage for the 
cteviae. 



The output characteristics of the internal Lx switch in 
MAX series DC-DC converters are shown in the two graphs 
of Figure 1-37, The MAX631-33, MAX641-643 plot is for an 
N-channel output device while the MAX634-638 graph is 
for a P-channel device. Both graphs show that the switch- 
ers saturation current for each device is relatively low and 
its on resistance is high when the chip's supply voltage 
(equivalent to Vgs in the graphs) is 5V or less. The increase 
in slope as Vgs increases, which corresponds to lower on 
resistance, shows how conversion efficiency is improved 
when the chip is powered from the highest availaWe supply 
voltage. 

Inductor Resistance - Select lowest possible DC resis- 
tance. This may conflict with size limitations in some 
applications, since coil wire resistance is inversely related 
to size. Fortunately, the low (<500|xH) inductance values 
typically called for in low power DC-DC converter designs 
do tend toward low series resistance values. 

Inductor Core Losses - This can be reduced with larger 
core sizes and/or lower loss core material. (See ■Inductor 
Saturation" in previus text) 



Operating current is also reduced by selecting maximum 
values for feedback and pullup resistors when they are 
used. 

Switching Time - The power switch in any DC-DC con- 
version circuit dissipates the most power durng the instant 
that it turns on or off. By making the turn-on and turn-off 
times as fast as possible, efficiency is optimized. When 
driving external FETs, the rise and fall time of the gate drive 
signal should also be short. Many MAX series parts drive 
external FETs directly (or with minimum circuitry), however 
especially large power MOSFETs, with high gate-to-source 
capacitance (lOOOpF is common), may need low imped- 
ance gate drivers. This is so that the gate-source capaci- 
tance does not slow the drive waveform and also the 
switching time. An external power FET driver from the 
MAX626 family accomplishes this. 



1-22 



Low Power BHbtlener v». Oiifput Current 

One advantage of CMOS in low power DC-DC conver- 
sion is tliat for very low load currents, the efficiency remains 
high. As shown in the graph of Figure 1-37, even with a 
1mA load, the circuit's quiescent current does not impact 
efficiency. 

EFFICIENCY VS OUTPUT CURRENT 
(MAX 630, 3 volts to 5 volts) 

anolency(%) 




10 20 30 40 50 

Output Current (mA) 



Figure 1-37. Efficiency vs. output current for a IUAX630 step-up con- 
verter. 'Bootstrapped' means tliat ttie l\AAX630 chip is powered from 
the circuit output voitage rather than the battery input. Either connec- 
tion is possible but bootstrapping improves efficiency. 

Also shown in the graph is the improvment in output 
current and efficiency resulting from using a "boot- 
strapped" connection where the chip power is supplied 
from the +5V output rather than the +3V input. The in- 
creased chip supply voltage means higher gate drive for 
the internal N-channel switch. The etfictency is increased 
because the switch on resistance is reduced. The MAX630 
can be connected in either configuration, but most basic 
MAX DC-DC converters am used in boGtstr^ped mode 
for best efficiency. 

Hints on OroundB, Bypass Caps, Compens»thm 

Instability in the feedback loop, caused by contami- 
nated ground connections or stray capacitive pickup, can 
severely limit the performance of an otherwise sound DC- 
DC converter design. Symptoms of trouble are often high 
ripple, much poorer than expected efficiency, and "motor- 
boating" or low frequency oscillation. Motorboating occurs 
when the control loop of the DC-DC converter outputs 
pulses in periodic clusters (10-20 pulses long) rather than 
at random intervals. This happens because the loop has 
been destabilized by one or more of the following items. 
Figure 1-38 illustrates some general approaches to opti- 
mum layout and bypassing. 

1 ) Capacitance at feedback input (Vfb) 

The effect of this capacitance is to delay or "lag" the 
arrival of feedback information to the regulator. The delay 
may cause overshoot or instability in the form of "motor- 
boating" (see above). The result is usually seen as high 
output ripple (1 OO's of mV to Volts) and reduced efficiency. 

A capacitor (100 to lOOOpF) connected between the 
circuit output and the COMP pin (100 to lOOOpF) adds 
"lead" compensation to reduce ripple and improve the 



transient response of the regulating loop (Figure 1 -38, see 
A). This capacitor in effect AC couples additional feed- 
back information around the feedback network to speed 
up the regulator's response (and reduce motorboating). 
This may also slightly shift the DC output voltage from its 
level without compensation. 

If external resistors are used to set the output voltage via 
Vfb, then the compensation capacitor is connected across 
the upper feedback resistor (Figure 1-38, see B) and the 
COMP pin is grounded. When feedback resistors are 
used, reduce the length of connections at the Vfb input to 
minimize capacitance from this point to GND. 




nmiH. mmm ■ amnrnmo 




EXTERNAL FEEDBACK - BOOtSTMPPED 




EXTERIML FSDMGK - NOT flOOTSTRAFPED 



Figure 1-38. Optimum connections for typical step-up circuits. 
Ttie circled letters are referenced in the test, "H/nfs on Grounds 
Bypass Caps, Compensation: Step-down and inverting 
circuits are hot shown, but similar steps apply. 



1-23 



2) Ripple or noise coupling to the reference 

Injected noise or ripple on the reference typically is seen 
in some form on the output as well. In particularly unfortu- 
nate circumstances it may also destabilize regulation. The 
cause ofthis Is often poor grounding practice, where a high 
current (inductor or switch) ground interferes with the 
regulator's ground and hence its reference. Solutions are 
to either bypass the reference and/or +Vs (or VouT, which 
is the + supply pin on several devices) to GND withia 0.1 
to 1|iF capacitor (Figure 1-38, see C). 

3) Feedbacl< Via GND or Supply Input 

This is similar to 2) except that ripple and noise couple 
to the feedback Input rather than the reference. The effects 
on regulation are often the same as with 2). Possible fixes 
are to bypass the power supply input to the chip with 0.1 
to lOnF (Figure 1-38, see C). Feedback through ground 
can be eliminated by separating high current ground con- 
nections from reference, feedback and/or chip GND if 
possible. 

The FET ground connection is the most common trouble 
spot. It carries large varying current levels. Lowest noise 
is achieved with the FET returned to the battery or input 
supply via a separate trace or wire (Figure 1-38, see D). If 
all ground connections must be ^>med^ t^ €mM9^^^Pl^^ 
it as wide and short as possible. 

4) Output Ripple and Transient Noise 

Flyback converters by nature exhibit some degree of 
output noise. Ripple and noise levels of 50 to 100mA p-p, 
or 1 to 2% of the output voltage, are not uncommon and 
usually indicate a properly functioning circuit. In addition 
to the above problem areas, ripple can be reduced in some 
cases by: 

LARGER FILTER CAPACITANCE - This brute force ap- 
proach sometimes works, although at some point, in- 
creases in capacitance do not further reduce ripple. If 
increases do not help, go back to the smaller value. 

LOWER CAPACITORS - A smaller value filter capacitor 

with low Equivalent Series Resistance (ESR) may actually 
do better than a larger aluminum electrolytic capacitor. 

CERAMIC CAPACITORS - A 0.1 ^F ceramic or chip 
capacitor in parallel with the normal output filter capacitor 
reduces transient switching noise. 

Transient output noise, which appears as spikes, rather 
than ramp-like ripple from capacitor charging and dis- 
charging, is also reduced by minimizing the lead lengths 
at the diode and filter capacitor (Figure 1-38, seeE). Long 
leads on these components increases their inductance, 
slowing the resonse time of the diode and increasing the 
impedance iof the capacitor. 

Another important characteristic of transient noise Is that 
it often appears to be where it really is not. Before trying 
to eliminate spikes with capacitors or whatever, verify that 
the transients are really part of the output waveform. Try 
different scope ground arrangements to be sure that the 
observed signal is not a result of an unfortunate ground clip 
location. Even long probe ground clip leads sometimes 



increase the apparent switching noise by picking up radi- 
ated signals. A good test is to connect the probe ground 
to the probe tip (shorting it out) and then touch various 
circuit ground points. If the same transients are seen, then 
the probe's ground clip is picking up radiated noise and 
the clip should be shortened. Winding unused ground 
lead tightly around the probe tip may also help. 

The Easy Way to Low Powor 
DC-DC Converter deelgn 

Working with low power DC-DC converters is a relatively 
simple chore in most cases. A reasonable "non-mathe- 
matic" design approach is to modify a finished design that 
is already close to your goals. This chapter is loaded with 
DC-DC converter applications that may already be very 
close to an existing need. 

Some guidelines for modifying the circuits in this book 

to a different specific application are: 

1) For more output power, REDUCE the inductance 
value. The down side of this is a corresponding increase 
in peak inductor current. Be sure that this increased cur- 
rent doesn't exceed the Lx current rating. If it does, an 
external transistor or FET, that can handle the higher cur- 
rent, is necessary. Note that the data sheet rating for peak 
Lx current (Ipk) is NOT THE SAME AS OUTPUT CURRENT. 
(See later section, "What Value of Inductor?") IpKatLxoften 
will be as much as four to six times greater than output 
current. 

2) if less output power is needed, increasing the induc- 
tor value will usually improve efficiency and reduce ripple. 
This reduces the peak inductor current so switch losses 
are also less. 

3) Changing the output voltage to other than the avail- 
able fixed outputs in most circuits is usually as simple as 
adding two feedback resistors (See data sheet for each 
device). Increasing the voltage will of course mean re- 
duced output current if the inductor remains the same. 



1-24 



Pot Core and Toroid Bastes 



Winding inductors and transformers using pot cores and 
toroids can be very useful wfien prototyping DC-DC con- 
version circuits and need not be a painful process. The 
problem experienced by designers who are unfamiliar with 
magnetics is that an uncomplicated 'working" solution Is 
hard to find in what seems to be an impenetrable mass of 
specifications in the core manufacturers' catalogs. 

Where do you start? Presented here is a short "minimum 
calculation" procedure for inductor and transformer design 
based on shortcuts pulled from manufacturers literature. It 
won't provide the "best" inductor for ail applications, but for 
flyback switching converters which allow some shortucts, 
It's a convenient way to designing prototypes and judge 
the feasibility of a design. 

Standard values of inductors are stocking and sampled 
by several coil manufacturers (See appendix) so once a 
prototype coil is tried successfully it can often be replaced 
by a standard product in production. With transformers, 
winding prototypes is more useful because so few switch- 
ing transformers are offered as standard products. A 
homemade prototype can also be a model for the magnet- 
ics manufacturer when designing the final production 
flEan^rmer. 

"Shortcut" Inductor and Transformer Design 

1 ) Two basic inductor parameters are needed to start: 

a) Inductance - L 

b) Peak coll current - Ipk 

These are determined from the Initial DC-DC converter 
design. How these values are selected in various circuits 
is covered In Section 4. Most DC-DC converter applica- 
tions in Maxim's literature will specify the required induc- 
tance and peak current. From the above parameters, 
calculate the Ll^ product in millijoules (mH x Amps^ = mJ). 
This Is actually two times the maximum amount of energy 
that the core must store (E = LI^/2) but is the quantity 
specified In most pot core and toroid literature. 



POT CORE SELECTION GUIDE 




M .1 .2 12 W 

U>(MatoMM) 



Figure 1-39. This graph determines the smallest core that will work for 
a given LI2 product. See Pot Core and Toroid Basics for a detailed ex- 
pmnation. 



2) Pick the core size from the Pot Core Selection Guide. 
Find Ll^ on the X axis and draw a vertical line up from the 
point to the lowest intersecting diagonal line. Read the 
Inductance factor, Al, from the Y axis. The diagonal line 
and the corresponding value from the Y axis represent the 
smallest core size and the maximum Al that may be used 
(Al is the inductance per turns squared for the core). This 
means that any core of that size, with an Al less than the 
Y axis value, will not saturate. Also, any other core that 
intersects the Ll^ line is usable If its Al is less than the Y 
axis value. Of course if a core with too small an Al is 
selected then the needed number of turns may not fit on 
the core. 

In flyback transformers, wire size, resistance, and fit- 
ting" the turns on the core Is usually not a problem. This is 
because the specified inductances are small compared to 
other types of switching transformers so few turns are 
needed. This often allows the use of significantly smaller 
Al values than provided by the graph, which reduces core 
losses. This gain however must be weighed against the 
increased wire losses. 

3) The number of turns of wire, N, to be wound on the 
core for the desired Inductance is: 

N=31 .6 (^^Al), where L is the inductance in |iH. 

4) Knowing how many turns are needed, we then want 
the largest wire that will fit on the core (within reason) to 
minimize the DC resistance. The available winding area. 
Aw, can either be directly found in the data for the core 
bobbin, or by using the Ferrite Pot Core Winding Dimen- 
sions table. 

T > N/Aw 

T, the turns/cm^ from the Wire Table, must be greater 
than the required number or turns, N, divided by the 
available winding area, Aw. A wire size with an. adequate 
value for T should be used. 

5) Once the wire size is picked, the resistance is 
checked using data from the Wire Table and the Winding 
Dimensions table. 

R = Nlwrw 

N is the number of turns, Iw is the average lenghth of a 
turn for the selected core, and rw is the resistance/foot of 
the selected wire. R should be such that no more than 
1 or 2% of the total power is lost in the wire resistance. The 
power lost due to wire resistance in flyback circuits is 
roughly: 

Pr = (Ipk^ x R)/3 

If the inductor or transformer is extremely small, then a 
somewhat larger percentage may be allowed. This is not 
normally a problem in flyback circuits since the inductance 
and hence the number of turns required is relatively small 
compared to other converter types. If the resistance is too 
high, a larger wire size (with lower ohms/foot), and possibly 
a larger core to accept the larger wire diameter, must be 
used. 



1-25 



DMlgnteg Transformon 

Transformers for flyback converters are no more difficult 
to wind tlian inductors. Tine primary winding is designed 
in the same manner as above and basic turns ratios are 
used to design tlie secondary winding(s). The ratios will 
usually be proportional to or slightly less than the input/out- 
put voltage ratios, i.e., 2/1 for a 10V to 5V circuit or 1/3/3 
for 5Vto±15V. 

Tranafmnmer Exampl* 

One application where a transformer is a desirable 
alternative to an inductor is in this DC-DC converter which 
generates 5V at 1 Amp from 4 NiCad cells. Since the input 
voltage varies from 4V to 5.2V neither a step-up not a 
step-down converter works over the full input range. Also, 
the input and output voltages are too low to drive the 
P-Channel MOSFETs normally used in step-down circuits. 
A transformer allows us to not only step up or down, but 
also to use a lower cost N-channel FET grounded source 
switch. With a transformer we can also cut all power to the 
load when the converter is shut down, which Is something 
a basic step-up converter is not able to do. 

First of all, the required output power, assuming a 0.5V 
forward diode drop (1 N5817), is 5.5W. With a 50kHz clock 
frequency (MAX641) and a minimum input voltage of 4V, 
the inductance required, Lp, is: 

Lp = IN2/)9foloUT(VoUT+VD)) 

= 4^/(8 X 50kHz X 1 X (5 + 0.5) = 7.27nH 

The peak current in the transformer, calculated using the 
highest input voltage (5.2V), is: 

IpK = ViN/(2foL) = 7.15 Amps 

Then Ll^ = 0.372 millijoules (mJ) 

Using the Pot Core Selection Guide, 0.372 millijoules 
leads us to a 18x11 mm pot core with an Al value of no 
more than 330. 



WNOINGMEAiWD LENGTH 



VOUT 




M/mi 






EXT 




Vfb 


QMS COMP 






100Mf 




Aw - WINDING AREA 

L • AVERAGE WINDING LENGTH 



Figure 1-41. 

We select a standard core with an Al of 250. The 
number of turns needed to wind a 7.27nH primary is: 

N = 31.5 (7.27/250) = 5.4 

The primary/secondary turns ratio for this application is 
1/1 so we also want a secondary winding with the same 
number of turns. The winding area, Aw, for each section 
of a two section bobbin, as indicated in the Witidhng 
Dimensions table, is 0.084 cm^. 

T > N/Aw = 5.4/0.084 = 64 

T is the minimum turns/cm^ for the wire size that fits on 
the bobbin. The Magnet Wire Table indicates #18 wire (at 
79.1 turns/cm^) or smaller. The resistance from the Wire 
table is 6.386a/l000ft. and the average length per turn 
from the Winding Dimensions table is 0.121 feet, so. the 
winding's resistance is: 

R = Nlwrw = 5.4 X 0.121 - 0.00638 = 0.0042Q 

The average wire loss with a peak current of 7.15 Amps 

is then: 

(Ipk^ X R)/3 = (7. 1 5^ X 0.0042)/3 = 72mW 

This is only 1 .4% of the output power and should not be 
a problem. Our final transformer design is then: 

1) 7.27nH (about 10% tolerance) primary inductance 

2) 1/1 primary/secondary turns ratio 

3) 1 8 X 1 1 mm pot core with an Al of 250 (example core: 

Magnetics Inc. #G-4181 1-25) 

FERRITE POT CORE WINDING DIIVIENSIONS 



Core Size 
(mm X mm) 



Winding Area Per Section 
(cm2) 



1 sect 



2 sect 



Ssect 



Avg Length/Turn 
(Ft.) 



Figure 1-40. DC-DC Transformer Exsmple 



14X8 


0.098 


0.044 


N/A 


0,0953 


18X 11 


0.170 


0.084 


0.049 


0.121 


22X 13 


0.292 


0.138 


0.087 


0.145 


26X16 


0.421 


0.202 


0.128 


0.173 


30X19 


0.542 


0.254 


0.159 


0.204 


36X22 


0.755 


0.357 


0.225 


0.244 



1^26 



AW (a 


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13,840 


20,766 


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9,158 




112 


17.4 


1.261 


10,968 


16,452 


12 


7,310 


7,885 


140 


21.7 


1.588 


8,705 


13,058 


13 


5,852 


6,336 


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Q ini 


A 1A7 


R <%9n 


16 


3,003 


3,329 


330 


51.2 


4.020 


3/441 


5,160 


17 


2,421 


2,704 


410 


63.6 


5.054 


2,736 


4,100 


18 


1,936 


2,190 




7Q 1 


6.388 


2,16f 


3,250 


1Q 


1 ,30U 


1 7ft1 
1 ,r O 1 




on A 


8 046 








1 OAR 


1 AQR 


oUU 


10A 


in 

1 w. lO 






21 


1,005 


1,170 


1,000 


155 


12.77 




1,630 


22 


807 


949 


1,200 


186 


16.20 


853 


1,280 


23 


650 


778 


t ,ouu 


0*50 


20.30 


681 


1,020 




^OA 




1 ,yuu 




fi7 




ono 
ouo 


^9 


AOA 




O Af\f\ 


Q70 


lO 17 


A97 


RA1 


26 


342 


424 


3,000 


465 


41.0 


338 


1^ 


27 


272 


342 


3,600 


558 


51.4 


259 


403 


26 


219 


276 




79A 


65.3 


212 


318 


29 


180 


231 


5 600 


868 


815 


171 


255 


30 


144 


188 


7 000 


1 085 


104 


1M 


200 


31 


117 


154 


8,500 


1,317 


131 


108 


158 


32 


96.0 


128 


10,500 


1,628 


162 




128 


33 


77.4 


104 


1 o,uuu 


o rn K 
d,\J\ O 


206 


67 


101 




AT) n 
ou.o 


A9 R 

Oic.O 


1 6,000 


2,480 




PO 


7Q 

r 9 


oo 




Of 


on nnn 


Q inn 






RQ 
DO 


36 


39.7 


54.8 


25,000 


3,876 


415 


33 


50 


37 


32.5 


44.9 


32,000 


4,961 


512 


27 


41 


36 


26.0 


36.0 


37,000 


o,/ Jo 


648 


21 


32 




on o 




50,000 


/ ,/od 




To 


OR 


'HI 


1 o.u 


OO 1 


65,000 


1 0,077 


1 nan 


1Q 


10 

1 9 


41 


13.0 




80,000 


12,403 


1,320 


11 


16 


42 


10.2 




100,000 


15,504 


1,660 


8;5 


13 


43 


8.40 




125,000 


19,380 


2,140 


6.5 


10 


44 


7.30 




150,000 


23,256 


2,590 


5.5 


8 


45 


5.30 




185,000 


28,682 


3,348 


4.1 


&2. 



1-27 



Value ot latlm^m^ A Cmm^t^ Btf^mmton 



AH the converter types referred to in this note are "fly- 
back" converters. They operate by charging an inductor 
from a DC input and then discharging the inductor to 
generate a DC output that Is greater than, iess tfian, or of 
opposit© polarity to the input. 

The proper inductor value for any DC-DC converter 
depends on three things: the desired output power, the 
input voltage (or range of input voltage), and the 
converter's oscillator frequency and duty cycle. This along 
with the input voltage, determine how much energy will be 
stored in the coil. The energy at a given instant is a function 
of the coil's current and inOTOtance: 

El = LIPK^/2 

where 

IpK = VlIon/L 

The total power that can be put in (or taken out of) the 
coil is the energy (Eu) per cycle times the number of cycles 
per second. 

Pl = Eifo 

In the above equations, toN and fo are usually inter-de- 
pendent. Most often the clock is a 50% duty cycle square 
wave so: 

tON = 1/(2fo) 

The coil power as a function of input voltage, frequency 
(duty cycle = 50%), and inductance is: 

Pl = VL^/(8foL), or in terms of toN: 

Pl = Vl\3n/(4L) 

In step-up and inverting converters, the charging volt- 
age for the coil (Vl) is usually the same as the input voltage 
(Vin) if switch losses are ignored. In step-down converters, 
Vl = Vin - Vout (again ignoring losses) because the coil is 
connected between the input and output voltage when 
charging. 

The above equations generally describe the design of 
IVIAX6XX DC-DC converter circuits. The following sections 
contain more speefic design steps for each convertertype. 

Step-Up Regulator DM^n 

( M AX630/63 1 /632/633 , M AX64 1 /642/643) 

First choose Vout, Iout, ViN(min), and ViN(max). Re- 
member that In a step^up converter, Vin must be less than 
Vout. 

ViN(min), and ViN(max) cover the input voltage range, 
such as ttie beginning and end-of-life battery voltages. 
The output power Pout, is Vout x Iout, but the converter 
also has to make up for losses in the inductor, Lx s*itch, 
and catch diode. These losses typically add 1 to 25% to 
the required power. 

In a step-up converter, power is supplied both via the 
Inductor and directly from the Input voltage. This is ber 



cause one end of the coil remains connected to Vin as it 
supplies current to the output. Therefore: 

1. Pout = Pl -H VinIqut 

The power, Pl, that we need from the inductor is then: 

2. Pl = (Vout - Vin -i- Vd)Iout 

Vd X Iqut accounts for losses in the catch diode. 
Schottky diodes (1N5817) minimize this loss which can be 
significant in low voltage circuits. In high voltage circuits 
(Vout = lOV and up) or if efficiency is not critical, signal 
diodes such a IM4148 perform well if their reverse voltage 
and forward current ratings are not exceeded. 

In order to get Pl out of the inductor, that much power 
must be put in. In an ideal system, i.e., minimal switch 
losses, Eq. 3 or 4 provides the power in the coil: 

3. Pl = VL^/(8foL), or in terms of toN: 

4. Pl = VL2toN/(4L) 

Solving for the inductor value, L, and substituting Eq. 4 

for Pl: 

5. L = V|N(min)^/8foloUT(VoUT + Vd - VlN(min)) 

fo is the DC-DC converter's clock frequency. Equation 
5 assumes that fo is a square wave with a 50% duty cycle. 
On the MAX630 and r\/IAX4193, the clock frequency can 
be adjusted. It is preset to a fixed rate (50kHz) on the 
MAX631/32/33 and cannot be changed. In Equation 5, the 
minimum expected value should be used for Vin to insure 
that there is adequate output power under all input condi- 
tions. 

In a non-ideal system, the inductor voltage, Vl, and the 
input voltage, Vin, are not quite the same, largely because 
of switch ON resistance (R). The peak inductor current will 
not be the expected value if this resistance is significant. 
Instead of Ipk = VLtoN/l-. the epxression for inductor current 
chagnes to: 

6. lpK = V(1-e-"'°""-)/R 

The Expression for output power then changes to: 

7. PL = (V(1-e"*°"/S/R)%/2 

Besides inductance value, the selected coil must also 
be reated for the current that it must handle. The peak 
current that the coil sees is: 

8. IPK = V|N(max)tON/L = V|N(max)/2(foL) 

toN is the coil charging time (for one clock cycle) which 
is equivalent to one halof of one fo clock period. 

When caluclating Ipk with Eq. 8, the largest expected 
value of ViN (ViN(max)) should be used so that the maxi- 
mum current under all operating conditions will be consid- 
ered. IpK is then compared witht he inductor current rating 
and the current rating of the Lx switch. Ipk should of course 
be less tfian these values. 

If IpK exceeds the peak current rating of the internal 
Lx switch in the MAX630/4193 (550mA) or 



MAX631/632/633 (475mA) then an external MOSFET or 
transistor with an adequate current rating must be used. 
The MAX64 1/642/643 worl<s best in most such circuits 
since they are designed to directiy drive an external FET. 

Stop Down B09uhaor Design 

{MAX638, and MAX631/32/33 driving P MOSFET) 

Choose VouT, louT, ViN(min), and ViN(max). In step- 
dovyn converters, ViN(min) must be greater than Vout. 

ViN(min) and ViN(max) define the converter's input volt- 
age range, such as the unregulated power supply voltage 
at high and low power line voltages. Output power is 
VoutIout, but the converter must also be able to supply 
power to make up for losses in the inductor, Lx switch, and 
catch diode. If an 80% conversion efficiency is assumed, 
Pout is multiplied by 1 .25 in the equations below. 

In a step-down converter such as the MAX638, the 
output power is the sum of the power supplied via the coil 
and the power supplied directly from the input voltage. 
When the coil charges, it is connected between the input 
and output so that Inductor charging current also flows In 
to the load. When the coil discharges, current flows from 
ground, through the coil, into the bad. Total output power Is: 

9. Pout = Pl + VoutIpk/4 

Pl is the power supplied by the coil and VoutIpk/4 is the 
power supplied directly to the load while the coil charges. 
IPK is the peak charging current of the inductor. The above 
equation assumes that the coil charging current rises lin- 
early from to IpK during one half of each oscillator cycle. 
The average coll charging current is then Ipk/4. 

10. IPK = (V|N-V0UT)t0N/L 

11. IPK = (V|N(max)-VoUT)/(2foL) 

fo Is the converter's clock frequency. The coll can 
charge for at most one half of each clock cycle (1/2fo). By 
substituting Equation 1 1 Into Equation 9, we get: 

12. Pout = PL+VouT(VouT-ViN)/(8foL) 

In order to get Pl out of the Inductor we must put at least 
that much in. The power that is put in is: 

13. Pl = (ViN-VouT)^/(8foL) 

By subsituting Equation 13 into Equation 12, we get: 

14. Pout = ViN(ViN-VouT)/(8foL) 

In terms of L, and by multiplying Pout by 1.25 to account 
far typical losses, we get: 

15. L= V|N(min)(V|N(min)-VoUT)/(10foPo) 

The minimum expected value should be used for Vin 
- to ensure that there is adequate power under all conditions. 

Besides inductance value, the selected coil must also 
be rated for the current that it will be handling in the circuit. 
The peak coil current is expressed by Equation 1 1 . When 
calculating Ipk, ViN(max) should be used to that the maxi- 
mum current under all operating conditions will be consid- 
ered. IpK is then compared with the current ratings of the 
inductor and Lx switch, and must be less than these values. 



If IpK exceeds the peak current rating of the internal Lx 
switch In the MAX638 (550mA) an external MOSFET or 
transistor, that Is rated tor the current, can be used with a 
IVIAXeS 1 /2/3 converter. Although they are called "step-up" 
regulators they can easily be configured for step-down 
circuits when using an external MOSFET. The MAX638 
may also be used with an extemal transistor, but an inverter 
is also required. 

Inverting Regulator Design 

(MAX634/635/636) 

Choose Vqut, Iqut, ViN(min) and ViN(max). In an invert- 
ing DC-DC converter, Vin may be greater, equal, or less 
than Vout. 

Output power is VoutIout, but the converter has to 
supply additional power to make up for losses. These 
typically add 10 to 25% to the required power, depending 
on external conditions such as component selection and 
operating voltage. If we assume a conversion efficiency of 
80%, the required power is multiplied by 1 .25 in the Initial 
design. 

In an inverting converter (MAX634/5/6/7), all output 
power is supplied via the coil. One end of the coil remains 
grounded when it charges and discharges. The total out- 
put power is: 

16. Pout = Pl 

Pl Is the power supplied by the coil. In order to get Pl 
out of the inductor, Pl must be put in: 

17. Pl = ViN^/(8foL) 

Solving for the inductor value and assuming 80% effi- 
ciency: 

18. L = V|N(min)^/(10foloUTVoUT) 

fo is the DC-DC converter's clock frequency and as- 
sumes that fo is a square wave with a 50% duty cycle. On 
the MAX634, the clock can be adjusted while the 
MAX635/6/7 has a preset oscillator that cannot be 
changed. In Equation 18, ViivKmin) should be used to 
ensure that there Is adequate power under all conditions. 

Besides Inductance value, the selected coll must also 
be rated for the current it must handle. The peak current 
that the coll sees is: 

19. IpK = V|N(max)tON/L = V|N(max)/(2foL) 

toN is the coil charging time (for one clock cycle) which 
is equivalent to one half of one fo clock period. 

When calculating Ipk with Equation 19, the largest ex- 
pected value of ViN (ViN(max)) should be used so that the 
maximum current under all operating conditions Is consid- 
ered. IpK is then compared with the Inductor current rating 
and the current rating of the Lx switch. Irk should of course 
be less than these values. If Irk exceeds the peak current 
rating of the Internal Lx switch in the MAX634 (550mA) or 
MAX635/6/7 (475mA), an external MOSFET or transistor 
with an adequate current rating must be used. 



1'29 



Tnumfonuer OC-OC Converter Dmmign 

In designs which employ flyback transformers, step-up, 
step-down, or inverting converters are all built using the 
same basic architecture. As with other DC-DC designs, 
first choose Vout, Iout, ViN(min), and ViN(max). Remem- 
ber that although the power to the load is VoutIout, the 
converter has to supply 10% to 25% more power to make 
up for diode, switch and transformer losses. In flyback 
transformer circuits, all output power is supplied via the 
transformer so: 

20. Pout = Pt-VdIout 

Pt is the power supplied via the transformer and VdIout 
is the power lost in the steering diode. In order to get Pt 
out of the transformer secondary, Pt must be put into the 
primary. 

21. Pt = ViN^/(8foLpRi) 

Solving for the transformer's primary inductance: 

22. LPRI = V|N(min)^/(8foloUT{VoUT+VD)) 

fo is the DC-DC converter's clock freuency and assumes 
that fo is a square wave with a 50% duty cycle. The 
MAX634 and MAX630 allow the clock frequency to be 
adjusted while other devices have a preset oscillator (typ- 
ically 50kH2) that cannot be changed. In Equation 22, 
ViN(min) should be used for Vin to insure that there is 
adequate power under all Input conditieins. 

Besides inductance value, the transformer must also be 
rated for the proper peak current. The peak current is: 

23. IPK = ViN(tnax)ION/LpRi = ViN(msa)/(2*oL) 

tON is the charging time (for one clock cycle) which is 
equivalent to one half of one fo clock period. 

When calculating Irk with Equation 23, the largest ex- 
pected value of ViN,(ViN(max),) should be used so that the 
maximum current under all operating conditions will be 
considered. Ipk is then checked against MAXBXX's Lx 
switch current rating and also determines the current han- 
dling requirements of the transformer. Lpri and Irk are 
then used for transformer design. 

Benehtop Shortcut 

The most direct means of checking Irk is to measure it 
using an oscilloscope and current probe. If a current 
probe is not available, a less direct but still effective method 
is to observe the current by looking differentially across a 
small sense resistor placed in series with the inductor. 1£2 
usually does well, but a smaller value is necessary if 
currents over a few hundred milliamps are expected. 



1-30 



The following is a parial listing of sources for inductors, 
transformers, and cores for DC-DC converter magnetic 
cdmpenents. It is by no means intended as a complete list. 



AlE Magnetics 
701 Murfreesboro Rd. 
Nashville, TN 37210 
TEL 615-244-9Q24 



AlE makes a variety of coils and transform- 
ers. Their full line catalog lists a variety of 
inductors. Catalog 5 lists many transform- 
ers designed for flyback converters up to 
SOwatts. Catalog 3 lists many coil types: 
slugs, toroids, pot corm, at©. 



Nytronics Components 
Group, Inc. 

Orange Street 
Dariington, SO 29532 
TEL 803-393-5421 

Pulse Engineering 
PO Box 12235 
San Diego, OA 92112 
TEL 619«^-2400 
FAX 619-268-2515 



Small molded inductors which generally 
do not have adequate current capability 
for DC-DC circuits except in very low cur- 
rentapplioations (mA). 



Pulse Eng. supplies a line of low cost to- 
roids, as well as mounted and molded 
toroids. A toroid sampler kit, #845, is use- 
ful for peotoplying designs. Custom trans- 
fonmers are also available. 



BH Electronics 
12219 Wood Lake Dr. 
Burnsville, MN 55337 
TEL 612-894-9590 
FAX 61 2-894-9380 



Coils and transformers from miniature sur- 
face mount up through 10's of watts. 



Prem Magnetics 
3521 N. Chapel Hill Rd. 
McHenry, IL 60050 
TEL 815-642-3763 
TWX 910-642-3763 



Caddell-Burns 
40 East Second Street 
Mineola, NY 11501 
TEL 516-748-2310 



Dale Electronics 
East Highway 50 
Yankton, SD 57078 
TEL 605-665-9301 

Gowanda Electronics 
1 Industrial Place 
Gowanda, NY 14070 
TEL 716-532-2234 



Caddell-Burns has many standard colls in 
their 6860 and 70790 series virfiich are 
suitable for use with Maxim's DC-DC con- 
verters. 7070 series coils have high cur- 
rent ratings for their size. Efficiencies that 
match toroids can be achieved. 

Standard toroidal inductors in molded PC 
mount pacteglng. 



Gowanda makes coils ranging from sur- 
face mount devices up through high power 
toroids, and also has many inductors 
would on cylindrical ferrite bobbins. They 
make transformers in port cores, E cores, 
and Toroids. 



Renco Electronics 
60 Jefferson Blvd E. 
Deer Park, NY 11729 
TEL 516-586-5566 
FAX 516-586-5562 

Schott Corporation 

Suite 108 

1838 Elm Hill Pike 

Nashville, TN 37210 

TEL61:5-.889-8800 

FAX612-88S-0834 

Torotel Products Inc. 
13402 S. 71 Highway 
Grandview, MO 64030 
TEL 816-761-6314 
TWX 910-777-7037 



Renco has a broad line of of bobbin and 
molded standard colls. Custom transform- 
ers and toroids are also supplied. 



Schott makes both miniature toroids, pot 
core inductors and transformers. Custom 
designs we available. 



Torotel specializes in toroidal inductors. 
Their general catalog lists hundreds of 
sizes and inductances. Mil Spec versions 
are available 



Inductor Supply 
1849 West Sequoia Ave. 
Orange, CA 92668-1017 
TEL 714-978-2277 
FAX 714-978-241 1 



Inductor Supply is a low-cost supplier of 
bobbon, shielded, and molded inductors. 
They also make surface mount inductors 
and custom magnetics. 



Wilco Corporation 
6451 Saguaro Court 
Indianapolic, IN 46268 
TEL317-293-S300 
FAX 317-293-9462 



Wilco makes small high current coils as 
well as other fixed inductors. Toroidal in- 
ductors are also sold. 



J.W, Miller 
19070 Reyes Ave. 
PO Box 5825 
Rancho Dominguez, 
CA 90224 
TEL 213-537-5200 
FAX 213-631-4217 

National Electronics 
11731 Markon Drive 
Garden Grove, CA 92641 
TEL 714-892-7749 
FAX714-898r67e9 



Miller has standard coils and toroids at low 
cost, however, avoid the tiny moulded 
cokes. The series resistance and current 
ratings of the small moulded parts are 
generally not adequate for DC-DC appli- 
cations except in extremely low power ap- 
plications (mA). 

In Addition to manufacturing their own line 
of low-cost bobbin, drum, and toroid in- 
ductors. National distributes TDK, JeffefS, 
Delevan, and Nytronics products. 



Manufacturer - Asia 
TDK Corporation , 
13-1, Nihonbashi 1-ohome 
Chuo-ku 

Tokyo 103 Japan 

Manufacturer - Europe 
Richard Jahre GmbH 
Luetzowstrasse 90 
1000 ierlin 30 



1-31 



Allen-Bradles Magnetic 
Products 

5900 N. Harrison Stf^t 
Shawnee, OK 74801 
TEL 405-275-2100 
TLX 796208 



Arnold Engineering 
Company 
300 West Street 
Marengo. IL 60152 
TEL 815-568-2000 
TWX 910-642-2790 

Fair-Rite 

P.O. Box J 

1 Connmercial Row 

Walll<ill. NY 12589 

TEL 914-895-2055 

FAX 914-695-2629 

Ferronics 
45 O'Connor Road 
Fairport, NY 14450 
TEL 716-388-1020 
FAX 716-388-0036 

Ferroxcube 

5083 Kings Highway 

Saugerties. NY 12477 
TEL 914-246-2811 
TWX 510-247-5410 



Publication fvlPCC contains iniormation on 
both soft/linear ferrite and permanent 
magnetics. The key section is the "W5" 
section which provides info on their opti- 
mum material tor DC-DC converters, as 
well as pot cores and toroids made from 
this material. 

Arnold maizes cores in both iron powder 
and molypem^ialloy powder (MPP). 



Fair-Rite makes froms for a variety of bob- 
bins, beads, and cores. Their technical 
literature contains information on ferrite 
manufacturing technology as well inductor 
design. 



Ferronics mai<es bobbin and toroid ferrite 
cores plus ferrite beads and magnets. 
Their literature contains some good tech- 
nicirt Information on inductor design. 



Ferroxcube's Linear l^rrite Materials and 
Components catalog lists a wide variety of 

cores: toroids. pot cores, square cores, 
EP. EC, etc. Ttie catalog has complete 
data on the cores and material, but little 
applications inforrMion. 



Micrometals. Inc 
1190 N. Hawk Circle 
Anaheim, CA 92807 
TEL 714-630-7420 
TWX 910-591-1690 

Siemens Components Inc. 
Special Products Division 
186 Wood Avenue South 
Iselin, HI 08830 
TEL 201-321-3400 



Permag Inc., 
Regional offices 



Atlanta 
Boston 
Chicago 



Colorado 
Los Angeles 
Minneapolis 



404-448-4998 
617-273-2890 
312-956-1140 
214-699-1121 
303-693-6612 
714-952-2091 
612-934-4635 



Low cost iron powder cores in toroids, E 
cores, and bars. These are lower cost 
than MPP or ferrite,. Isut have lower effi- 
ciency. 



The "Ferrite Cores and Hardware' short 
form catalog provides information on pot 
cores from 3.3x2.6mm to 41x25mm; to- 
roids from 2.5mm to 34mm diameter, and 
a wide variety of other shapes such as E 
and RM. 

Permag is a Distributor of Magnetic Cores 
for Allen-Bradley, Stackpole, Siemens, 
and Krystinel. 



San Francisco 408-738-1080 
Toledo 419-385-4621 
NY/LI 516-822-3311 

Cores Unlimited, Inc. 
831 1 Westminster Ave 
Suite 340F 

Westminster, CA 92683 
TEL 714-894-3062 
800-772-core 
FAX 714-8954502 



Cores Unlimited is an authorized distribu- 
tor of magnetic cores for Hitachi and Sie- 
mens. They also handle cores from 
several other manufacturers. 



Magnetics 

Div of Spang and Co. 
900 E. Butler Rd. 
PC Box 391 
Butler, PA 16003 
TEL 412-282-8282 
TWX 710-373-3821 



Magnetics has a complete line of mag- 
netic materials: The ferrites and MPP 
cores are the most useful for DC-DC con- 
verters. A complete catalog/binder with 
both inductor design information and com- 
plete product data is available, AH of the 
standard core shapes aia available: pot 
cores, EE, El, bobbin, toroids, etc. The 
catalog contains useful coll design infor- 
mation. 



1-32 



SFB ' SERIES • SMALL FERRITE Bobbin Coils 



• Leads No. 20 Tinned Copper 1 .5" long 

• Coils Finished with Polyolefin Shrink Tube 

• Nonstandard Values Available 

• Saturation Current Lowers Inductance 5% 



.650 
'MAX' 



WILCO 
PART # 


L 

uh 

±15% 


R.O.C. 
OHMS 
MAX. 


Saturation 

Current 
(DC AMPS) 


AMPS 
Suggested 
Rating 


DIA. 
NOM. 


TEST 
FREQ. 


SFB 39G 


3.9 


.019 


7.3. 


1.28 


.260 


1 KHz 


SFB 47G 


4.7 


.022 


6.3 


1.28 


.260 


1 KHz 


SFB 56G 


5.6 


.024 


5.6 


1 28 


.260 


1 KHz 


SFB 68G 


6.8 


026 


5.3 


1.28 


.260 


1 KHz 


SFB 82G 


8.2 


.028 


4.5 


1.28 


.260 


1 KHz 


SFB 100 


10 


.033 


4.1 


1.28 


,260 


1 KHz 


SFB 120 


12 


.037 


3.6 


1.28 


,260 


1 KHz 


SFB 150 


15 


.040 


3.3 


1.28 


.260 


1 KHz 


SFB 180 


18 


.044 


3.0 


1.28 


,260 


1 KHz 


SFB 220 


22 


.050 


2.7 


1.28 


.260 


1 KHz 


SFB 270 


27 


.058 


2.5 


1.28 


.260 


1 KHz 


SFB 330 


33 


.075 


2.2 


1.008 


.260 


1 KHz 


SFB 390 


39 


.094 


2.0 


.804 


.260 


1 KHz 


SFB 470 


47 


.109 


1.8 


.804 


.260 


1 KHz 


SFB 560 


56 


.140 


1.7 


.804 


.260 


1 KHz 


SFB 680 


68 


.131 


1.5 


.804 


.260 


1 KHz 


SFB 820 


82 


.152 


1.4 


.804 


.260 


1 KHz 


SFB 101 


100 


.208 


1.2 


.632 


.260 


1 KHz 


SFB 121 


120 


.283 


1.1 


.508 


.260 


1 KHz 


SFB 151 


150 


.340 


1.0 


.508 


.260 


1 KHz 


SFB 181 


180 


.362 


.95 


.508 


.260 


1 KHz 


SFB 221 


220 


.430 


.86 


.508 


.260 


1 KHz 


SFB 271 


270 


.557 


.77 


.400 


.260 


1 KHz 



WILCO 
PART # 


L 

uh 

±15% 


R.D.C. 
OHMS 
MAX. 


Saturation 

Current 
(DC AMPS) 


1 

AMPS 
Suggested 
Rating 


DIA. 
NOM. 


TEST 
FREQ. 


SFB 331 


330 


665 


.70 


.400 


.260 


1 KHz 


SFB 391 


390 


,712 


.64 


.400 


,260 


1 KHz 


SFB 471 


470 


1,15 


.59 


.315 


,260 


1 KHz 


SFB 561 


560 


1.27 


,54 


.315 


.260 


1 KHz 


SFB 681 


680 


1.61 


.49 


.250 


.260 


1 KHz 


SFB 821 


820 


1,96 


,44 


.200 


.260 


1 KHz 


SFB 102 


1000 


2,30 


.40 


.200 


.260 


1 KHz 


SFB 122 


1200 


2.65 


.35 


.200 


.260 


1 KHz 


SFB 152 


1500 


3.45 


.33 


.158 


.260 


1 KHz 


SFB 182 


1800 


4.03 


.29 


.158 


.260 


1 KHz 


SFB 222 


2200 


4.48 


.27 


.158 


.260 


1 KHz 


SFB 272 


2700 


5.40 


.24 


.125 


.260 


1 KHz 


SFB 332 


3300 


6.56 


.22 


.125 


.260 


1 KHz 


SFB 392 


3900 


8,63 


.20 


.100 


.260 


1 KHz 


SFB 472 


4700 


9.66 


.18 


.100 


.260 


1 KHz 


SFB 562 


5600 


13,9 


.166 


.082 


.260 


1 KHz 


SFB 682 


6800 


16.3 


.151 


.082 


.260 


1 KHz 


SFB 822 


8200 


20.8 


.138 


.065 


.260 


1 KHz 


SFB 103 


10000 


26.4 


.125 


.050 


.260 


1 KHz 


SFB 123 


12000 


29.9 


.114 


.050 


.260 


1 KHz 


SFB 153 


15000 


42.5 


.098 


.039 


.260 


1 KHz 


SFB 183 


18000 


48.3 


.091 


.039 


.260 


1 KHz 



WILCO CORPORATION 



6451 SAGUARO COURT 317-293-9300 INDIANAPOLIS, IN 46268 

FAX 317 / 293-9462 

1-33 



LOWEST COST 
INDUCTORS 




ELECTRICAL 
DATA 




• SMPS AVERAGING FILTER (4) 

• CHARACTERIZED FOR GENERAL PURPOSE USE, 
AND RIPPLE FILTERS 

• SINGLE LAYER DESIGNS 

• CAN BE USED AS DIFFERENTIAL MODE 
INDUCTORS IN EMI FILTERS (3) 

• MOUNTING PACKAGE AVAILABLE ON REQUEST 

• DESIGNER KIT iWiLABLE 



ELECTRICAL CHARACTERISTICS AT 25X 



Reference Operating VilMts 


Design Control Values (2) 


Part 
Number 


Klip 
Mount 
Option 




■oc 
(AMPS) 


(V-)i.Sec) 


InduetMK* 

Mie.C...m 

<nH)f).,„ 


1000 Hz 
Test Volts 
No D.C. 


OCR 
(OHMS) 
Max 


Coil 
Size 
Code 


Klip 
Mount 
Package 


Lead 
Dia. 

(In)*"»= 


Min. Energy 
Storage 

(|J)'« 


51591 


20 


2.0 


52 


32.8 


.0034 


.06 


H 




.020 


40 


92100 


K 


25 


2.5 


30 


20.7 


.0023 


.04 


A 


KMl 


.020 


75 


92101 


K 


SO 


2.5 


50 




.0047 


.07 


B 


KM2 


.020 


150 


92102 


K 


itio 


2.5 


90 




.0094 


.10 


C 


KM3 


.020 


300 


92103 


K 


35 


2.5 


55 




.0037 


.04 


B 


KM2 


.025 


110 


92104 


K 


70 


3.0 


85 


61.0 


.0076 


.05 


C 


KM3 


.025 


300 


92105 


K 


145 


3 


140 


141.8 


.015 


.08 


D 


KM4 


.025 


650 


92106 


K 


285 


3 


300 


264.1 


.035 


.14 


E 


Kl«5 


.025 


1275 


92107 


450 


3,0 


425 


436.3 


.053 


.20 


F 




.025 


2000 


92108 


K 


.. lOD 


3.5 


130 


90.7 


.012 


.04 


D 


KM4 


.032 


600 


92109 


K 


165 


4.0 


240 


' 152.0 


.027 


.07 


E 


KM 5 


.032 


1300 


92110 




4.0 


350 


263.9 


.041 


.10 


F 




.032 


2150 


92111 


K 


40 


4.0 


70 


tr.9 


.006 


.03 


C 


KM3 


.032 


300 


51590 


12 


5.0 


44 


20.3 


0038 


03 


G 




.032 


150 


92112 


K 


100 


5.0 


200 


90.7 


021 


.04 


E 


KM5 


.042 


1250 


92113 


170 


5 


300 


159.7 


.032 


.05 


F 




.042 


2100 


92114 


K 


?5 


5.0 


100 


54.9 


.009 


.02 


D 


KM4 


.042 


650 


92115 


95 


7.0 


225 


96.0 


.025 


.03 


F 




.051 


2300 


92U6 


K 


55 


7.0 


150 


49.1 


.015 


.02 


E 


KM5 


.051 


1300 


92117 


55 


10 


175 


55.9 


.019 


.02 


F 




.064 


2750 



See page 5 for Nores 

RELATIONSHIPS BETWEEN REFERENCE AND OPERATING CONDITIONS 



Inductance vs. DC Current 
(At Reference ET) 



2.00 
1.75 
l.SO 
1J5 
1.00 





































— 


'■m 


>rfl 
■4C 

























































































Inductance vs. Operating ET 
(At Reference Iqc) 



11^ 
uj|uj 



Max. Operating ET vs. Frequency 
(At Reference Ipc) 



. .2S .90 .75 1.00 1.25 1.50 

OPERAtInO DC CURRENT , 
REFERENCE Iqc 



top 
hcf 



I 




2.00 








LU 


UJ 


1 7b 


o 
z 


UJ 
O 

z 


1 60 




LU 




oc 


q: 

UJ 


1.25 


UJ 


!::• 


1.00 


% 


OC 








.78 








UJ 


Ul 

o 


50 




z 




< 




.25 




g 










O 


o 




z 


z 













































t 




. R 


>e 












■4( 


■c 









































































25 50 76 1.00 1 25 1.50 



OPERATINGET, 
REFERENCE £T 



2.00 
1.75 

1.50 
1 25 
1.00 



































































































— 



































































20 30 40 50 60 70 80 90 It* 

OPERATING FREQUENCY— Wto 



Pulse Engineering 



P.O. BOX 12235 SAN DIEGO, CA 92112 619-268-2400 



1-34 



QUALITY COILS SINCE 1946 

258 East Second Street 
Mineola. New Yortc 1 1 501-3508 



CADDELL- BURNS)) 



Area Code 516 746-2310 



MINIATURE HIGH CURRENT CHOKES 

1.0|tH - lOOmH. 10% TokHrance. naeomnwndBd Mounting Pilch — JBir 

TYPE 7070 TYPE 7060 (EPOXYENCAPMUaEOVHWIOII) 

#22 »lWOBl»Hnn» d Copper #22 AWQ Bva Tlnwd Coppar 

# d D © 

NOTES: (FOR BOTH TYPES) 3. Incremental current (INCR I) is the mirtmum current st wtilch the 

1. INDUCTANCE: inductance will be decreased by S%liomltsMtW(2wo-OC)v*i*. 
For 1 .OiM thru 8.2fiH; etiective Inductance measured on Boonton 4. Oteiectric WithitpiMing VoMaM — 1000 VRMS. 

260A Q-meter at 7.9 MHz In accordance with MIL-C-15305. 5. Operating tempaiatuiB range -5S* to ■4-IOS'C. 
For 10/iH thru lOOmH: inductance (Ls) measured on General 6. Materials- 
Radio 16508 Impedance Bridge at 1 KHz. Coll Form- Ferrlte 

2. Current rating (Rated IDC) is based on 0.25 watt power dissipation Cover: TYPE 7070- PVC shrink tuba-flame tatardant ULlype 
for appioximalely 20°C temperature rise. Depending on the fr-i per MIL-l-230$3 
•pplmillanvtNl*i>nHi'nqrb»«pai«MMtiptoli^ TYPE 7080 - Eooxy eneapsultted. 

camri. Magnet Wire: Per FED SPEC J-W-001 177/9(MIL-W-683 Type B) 



STANDARD VALUES: (Electrical characteristics are Identical for both types. Other values are available on special Oder.) 



DASH NO. 


NOMINJU. 


MAX.DCR 


MIN4HF 

'M 


RATED IDC 


INCR 1 






NOMINAL 


MAX.DCR 


MIN.SRF 


RATED IOC 


INCRI 


INDUCTANCE 


OHMS 


ma 


ma 




DASH NO, 


INDUCTANCE 


OHMS 


iMl 


rn 


ma 


-01 


I.OmH 


.010 


156 


5,000 


6400 




-31 


330t.H 


.72 


1.4 


580 


320 


.02 


1.2 


.011 


148 


4.800 


6,000 




-32 


300 


.79 


1.3 


SSO 


300 


-03 


1.5 


.012 


128 


4,600 


5,000 




-33 


470 


.88 


1.2 


530 


270 


■M 


1.8 


•013 


120 


4,400 


4.500 




-34 


560 


1.2 


1.1 


460 


250 


-OS 


2.2 


.014 


108 


4,200 


4.100 




-35 


680 


1.6 


1.0 


410 


230 


-06 


27 


.016 


100 


4,100 


3,600 




•36 


820 


1.7 


.96 


360 


210 


-07 


33 


.016 


96 


4,000 


3,200 




-37 


1,0mH 


1.9 


.86 


380 


190 


-08 


3.9 


.017 


90 


3,800 


3,000 




-38 


1.2 


24 


.76 


320 


170 


-09 


4.7 


.022 


65 


3,400 


2,700 




-39 


1.5 


2.6 


.64 


300 


150 


-10 


58 


.028 


76 


3,000 


2,500 




-40 


1.6 


3.1 


.60 


260 


140 


-11 


8.8 


031 


70 


2.800 


2,300 




-41 


2,2 


4.5 


.54 


240 


120 


-12 


8.2 


.035 


51 


2,700 


2,000 




-42 


2.7 


5.8 


.44 


210 


110 


-13 


10 


.038 


35 


2,600 


1,900 




-43 


3.3 


8.1 


.43 


180 


1W 


-14 


12 


043 


21 


2,400 


1,700 




-44 


39 


8.9 


.40 


170 


95 


-15 


15 


049 


14 


2,300 


1,500 




-45 


4.7 


10 


.38 


160 


68 


-16 


18 


.054 


10 


2,200 


1,400 




-46 


5.6 


11 


.35 


150 


79 


-17 


22 


.059 


6.0 


2,100 


1,300 




-47 


6.8 


15 


.29 


130 


72 


-18 


27 


.070 


65 


1,900 


1,100 




-46 


8.2 


17 


.26 


120 


65 


-19 


33 


.077 


61 


1,800 


1,000 




-49 


10 


22 


.24 


110 


58 


-20 


39 


.084 


5.7 


1,700 


940 




•50 


12 


26 


.23 


100 


54 


-21 


47 


.093 


5.1 


1,600 


670 




•51 


IS 


34 


.19 


86 


48 


-22 


56 


.12 


4.3 


1,500 


790 




-52 


18 


39 


.17 


80 


44 


-23 


88 


.13 


3.6 


1,400 


710 




-S3 


22 


54 


.16 


68 


40 


■24 


82 


.18 


3.2 


1.300 


660 




-54 


27 


62 


.15 


84 


38 


-25 


10O 


.24 


3.0 


1.000 


5W 




-55 


33 


a 


.12 


56 


32 


-28 


120 


.32 


2.7 


880 


540 




-96 


3S 


93 


.11 


52 


X 


-27 


ISO 


.43 


21 


760 


480 




-S7 


47 


120 


.086 


48 


27 


-28 


ISO 


.48 


1.7 


720 


440 




-58 


56 


130 


.082 


44 


25 


-29 


220 


.56 


1.6 


670 


400 




-50 


88 


190 


am 


38 


23 


-30 


270 


.62 


1.5 


640 


360 




-80 

-61 


82 

100 


210 

270 


.060 

.074 


35 

30 


21 
19 



TYPICAL Q CURVES (Type 7070/7080) 



100 




1-35 



QUALITY COILS SINCE 1946 



(C^i CADDELL- BURNS)) 



258 East Second Street 
Mineola, New York 11501-3508 

Area Code 516 746-2310 



HIGH CURRENT CHOKES 

1<^*H-1.0H.10% Tolerance. Recommended Mounting Rtcti — 1.25" 
TYPE 6860 TYPE 6870 (epoxy encapsulated version) 

#20 ma Ban Tinnsd Copper #20 MWQ Bam Tinmd Copper 



A. 



. 1.25 MIn. 

Typ. 



|<- 1.03 Mix. 



l.lSMIn. 
" T»p. 



4. Dielectric WithstarKling Vcttage — 1000 VRMS. 



NOTES: (FOR BOTH TYPES) , . ^- - ™^ .»™, 

1. Inductance (La) measured on General Radio 1650B Impedance 5. Operating temperature range — SS* to + lOSt:. 
Bridge at 1 KHz. " 



2. Current rating (Rated IDC) is iMsed on 0.5 watt power dtosipation 
for approximately 20°C temperature rise. Depending on the appli- 
cation, these units may be operated at up to twice the rated currant. 

3. Incremental current (INCR I) is the minimum currant at which the 
inductance will be decreased by S% frpm its mWd (zero-DC) value. 



6. Materials 
Coil Form: Ferrite. 

Cover: TYPE 6860 - Polyester alpha-cellulose. 

Coating: Polyurethane per MIL-1 -46058. 
TYPE 8870- Corar i Coating: Epoxy encapsulalsd. 
Magnet m»- P«t FEDSP^ J4V^ii7^9 (MiLw«^ Type B) 



STANDARD VALUES: (Electrical characteristics are Identical lor both types. Other values are available on special order.) 





Itoiiilul 


Mn. oca 


Mill. UF 


•ittd IOC 


INCR 1 




IfliMtaiKt 


Ollllll 


MU 




ma 


—01 


10 »H 


.023 


45 


4600 


3200 


—02 


12 


.025 


40 


4S00 


2900 


—03 


IS 


.030 


32 


4100 


2600 


—04 


16 


.032 


21 


3900 


2400 


—05 


22 


.035 


12 


3700 


2200 


—06 


27 


.036 


8.5 


3600 


2000 


—07 


33 


.043 


5.8 


3400 


1600 


— 0« 


39 


.047 


3.5 


3200 


1700 


—09 


47 


.054 


3.2 


3000 


1500 


—10 


56 


.060 


2.9 


2900 


1400 


—11 


66 


.068 


2.7 


2700 


1200 


—12 


62 


.073 


2.5 


2600 


1100 


— IJ 


100 


.098 


2.3 


2300 


1000 


—14 


120 


.14 


2.1 


1900 


930 


—15 


150 


.16 


1.9 


1700 


630 


—16 


160 


.20 


1.5 


1600 


760 


—17 


220 


.26 


1.3 


1400 


680 


— U 


270 


.31 


1.3 


1300 


620 


—19 


330 


.35 


1.2 


1200 


560 


—20 


390 


.38 


1.1 


1100 


SIO 


—21 


470 


.44 


1.0 


1050 


460 


—22 


560 


.48 


.90 


1000 


430 


—23 


660 


.63 


.80 


890 


390 


—24 


620 


.87 


.72 


760 


350 


—25 


1.0 mH 


.96 


.65 


720 


320 


—26 


1.2 


1.3 


.62 


620 


290 


—27 


1.5 


1.4 


.56 


600 


260 


— 2» 


1.8 


1.7 


.S3 


540 


240 


—29 


2.2 


2.3 


.44 


470 


220 


—30 


2.7 


2.6 


.39 


440 


190 


—31 


3 J 


3.5 


.36 


360 


180 



DatliNt. 


Nemliial 


Mai. sell 
Olw 


Mia. MF 

Hib 


>atad IDC 

M4 


INCH 1 


—32 


3.9 nH 


3.6 


.34 


360 


160 


—33 


4.7 


4.3 


.32 


340 


150 


—34 


5.6 


5.6 


.26 


300 


140 


—35 


6.8 


6.3 


.24 


260 


120 


—36 


8.2 


6.6 


.21 


240 


110 


—37 


10 


9.7 


.20 


220 


100 


—36 


12 


11 


.19 


210 


92 


—39 


15 


15 


.17 


180 


84 


—40 


18 


20 


.14 


160 


75 


—41 


22 


24 


.13 


140 


68 


—42 


27 


26 


.12 


130 


«2 


—43 


33 


35 


.10 


120 


56 


—44 


39 


38 


.95 


110 


51 


—45 


47 


50 


.80 


100 


47 


—46 


56 


55 


.72 


95 


43 


—47 


68 


76 


.66 


81 


39 


—48 


82 


66 


.62 


76 


35 


—49 


100 


99 


.57 


71 


32 


—50 


120 


110 


.52 


67 


29 


—51 


150 


200 


.47 


SO 


26 


—52 


160 


220 


.43 


48 


24 


—S3 


220 


300 


.38 


41 


22 


—54 


270 


320 


.35 


40 


20 


—55 


330 


420 


.32 


35 


16 


—56 


390 


480 


.29 


32 


16 


—57 


470 


670 


.26 


27 


IS 


—58 


S60 


730 


.24 


26 


14 


—59 


680 


870 


.19 


24 


12 


—60 


620 


950 


.16 


23 


11 


—61 


1.0 H 


1100 


.17 


21 


10 



TYPICAL Q CURVES (Tvoe 6860/6870) 




1-36 



h a p r — ei Hatlva Poiwr MOSFETs 



Part Number 


PACKAGE 


Ron (9) 
at(lDs, Vq8«x¥^ 


Votts(iiiax) 


Mfg" 


N Channel 


BUZ71A 


TO-220 


0.12(6A, Vqs= 10V) 


50 


MOT/SI/SM 


BUZ21 


TO-220 


0.1 (9A. Vgs = 10V) 
0.2 (5A, Vgs = 5V)* 


100 


MOT/SI/SM 


IRF513 


TO-220 


0.8 (2A, Vgs= lOV) 
1.2{1A, Vgs = 5V)' 


100 


ID /CI ir^C/KA^T 

In/ol/ot/MU 1 


IRF530 


TO-220 


0.18(8A, Vgs= lOV) 
2.0 (4A, Vgs = 5V)* 


100 


IR/SI/GE/MOT 


IRFS40 


TO-220 


0.085 (8A, Vgs = 10V) 
0.1 (5A, Vgs = 5V)* 


100 


IR/SI/GE/MOT 


IRF620 


TO-220 


0.8 (2.5A, Vgs= 10V) 
1.3 (2.5A. Vgs = 5V)' 


200 


IR/SI/GE/MOT 


IRF640 


TO-220 


0.18 (IDA, Vqs = 10V) 


200 


IR/SI/GE/MOT 


IRFD121 


4p DIP 


0.3{1.3A, Vgs= 10V) 


60 


IR/GE 


RFP12NCeL 


TO-220 


0.2(1.3A, Vgs = 5V) 


80 


RCA 


PChanml 


IRFD9120 


4p DIP 


0.6(1 3A, Vgs = -10V) 


-100 


IR/GE 


IRF9520 


TO-220 


0.6 (3.5A, Vgs = -10V) 


-100 


IR 


IRF9540 


TO-220 


0.2(10A,Vgs = -10V) 


-100 


IR 


IRF9543 


TO-220 


0.3(10A, Vgs = -10V) 


-60 


IR 


IRF9620 


TO-220 


1.5 (3.5A, Vgs = -10V) 


-200 


IR 


RFP6P08 


TO-220 


0.6 (Vgs = -lOV) 


-100 


RCA 


MTP2P45 


TO-220 


6(1A. Vgs = -10V) 


-450 


MOT 


MTP8P08 


TO-220 


0.4 (4A, Vgs = -10V) 


-80 


MOT 



* Typical specification, not guranteed by manufacturer. 

" Manufacturer code: IR = InternationsI Rectifier, SI - Siliconix, MOT = Motorola, GE = General Electric. SM = Siemens, RCA = RCA 



Raotniers for DC-DC Converter Circuits 



Part Number 


Iavg (amps) 


Vf (Volts) 


PRV (VOLTS) 


Type 


PACKAGE 


1N914 


0.05 


1.0 


75 


Silicon 


Glass 


1N4148 


0.05 


1.0 


75 


Silicon 


Glass 


1N4935 


1 


12 


200 


Silicon 


Plastic 


1N5817 


1 


0.45 


20 


Sctiottl<y 


Plastic 


1N5818 


1 


0.55 


30 


Schottky 


Plastic 


1N5820 


3 


0.475 


20 


Schottky 


Plastic 


1N5821 


3 


0.5 


30 


Sctiottky 


Plastic 


1N5822 


3 


0.525 


40 


Sctiottky 


Plastic 


1N5823 


5 


0.36 


20 


Schottky 


Metal 


1N5824 


5 


0.37 


30 


Sctiottky 


Metal 


1N5825 


5 


0.38 


40 


Sctiottky 


Metal 


UDS620 


6 


0.48 


20 


Schottky 


TO-220 


UDS640 


6 


0.48 


40 


Schottky 


TO-220 


UES1001 


1 


0.895 


50 


Silicon 


Bead 


UES1002 


1 


0.895 


100 


Silicon 


Bead 


UES1003 


1 


0.895 


150 


Silicon 


Bead 



1-37 



A Short Battery PrimBr 



PrimaryBatterlas 

DryCmlls 

There are three popular cell types based on zinc and 
carbon: the standard LeClanche dry cell, the "heavy duty" 
zinc chloride cell, and the alkaline manganese cell. As 
shown in Table 1 , there is about a 3 to 1 difference in 
capacity between the alkaline and LeClanche at the 100 
hour discharge rate. The zinc chloride battery falls about 
midway between the other two. The most significant differ- 
ence between the characteristics of these three chemis- 
tries is their response to high load currents, and their 
response to continuous versus pulsed applications. 

In very low drain applications such as 1 mA from a D cell, 
the LeClanche cell has about 1/2 the capacity of the 
alkaline (7Ah vs. 16Ah). When the load current is in- 
creased to 80mA, the duty cycle begins to play an impor- 
tant role. The alkaline battery loses virtually no capacity 
when operated continuously at 80mA, but the LeClanche 
cell capacity drops from 4Ah to 2.3Ah as the duty cycle of 
the 80mA load is increased from 1 h/day to 24h/day. The 
zinc chloride cell has 6.2 Ah and 6.0Ah capacity under 
80mA load, 1 h/day and 24h/day respectively. 

Summary; The alkaline cell has about twice the capacity 
of a LeClanche under very light loads and is over 6 times 
better under continuous duty high current loads. 

Mercury 

This cell has a very stable output voltage of about 1 .35V, 
except for those cells which have a small amount of man- 
ganese dioxide added, which raises the open circuit volt- 



age to 1 .4V. It has good storage characteristics, retaining 
85% to 90% capacity after two years at 20°C, and about 
80% after one year of storage at 45°C. Mercury cells are 
generally not recommended for use below 0°C. The "9V" 
size 6 cell mercury battery has an output voltage of 7.5 to 
8.0V for virtually all of its life, and has about 575mAh 
capacity. The capacity of mercury batteries is nearly inde- 
pendent of duty cycle, except at very high discharge rates. 
It is generally more expensive than alkaline cells, which 
have nearly the same performance, except that the output 
voltage of alkaline cells changes more as the eell is dis- 
charged. 

Silver Oxide 

Primarily used for miniature button and coin cells such 
as those used in watches and hearing aids, the silver oxide 
cell has aflat 1 .55V discharge. They are best for light loads 
of C/50 or less. It retains about 70% of its capacity when 
operated at 0°C, and about 30% at -20°C. 

Litltium Manganese Dioxide (LiMnOz) 

There are two basic types of LiMn02 cells. A pressed 
powder cathode is used in low discharge rate cells such 
as the "coin" cells. Flat and cylindrical cells with higher 
discharge current ratings use a thin electrode pasted on a 
supporting grid structure. The open circuit voltage is 
sliglitly higher than 3.0V. The output voltage is relatively 
flat at 2.8V to 3.0V up to the last 20% of the discharge 
period. Like most lithium chemistries, LiMn02 cells have 
very good storage characteristics, with about 85% of ca- 
pacity remaining after 6 years storage at 20"C. 



Performance of Primary (Non-Rechargeable) Batteries 



Chemistry 

Anode/Cathode/Eloelrolyts 


OpeniCircult 
V 


LoadedV 


Capacity 
(Ah at 100 hr 
rate) 


Energy 
(Watts -hr) 


Weight 
(giams) 


Energy 
Wh/kg 


Density 
Wh/Liter 


Alkaline Zn/Mn02/K0H 


1.58 


1.5-1.1 


14 


17 


132 


125 


315 


Carbon Zinc (LeClanche) 
Zn/MnOa/NH4CL,ZnCl2 


1.55 


1.5-1.0 


4.5 


5.4 


95 


55 


100 


Mercury Zn/HgO/KOH 


1.35 


1.3 


15 


18 


166 


100 


450 


Lithium Sulfur Dioxide 
Li/SOs/LiBr 


3.0 


2.8-2.7 


8 


22 


95 


275 


440 


Lithium Thionyl Chloride 
Li/SOCLa/LiALCU 


3.9 


3.9-3.5 


14 


45 


113 


375 


850 


"Lithium poly-carbonmonoflouride 
nLi/(CF) n/ -butyrolactone 


3.0 


2.6 


10 


26 


94 


275 


500 


"Lithium Manganese Dioxide 
Li/Mn02 


3.25 


3.0-2.0 


14 


26 


130 


230 


500 


'Extrapolated from data for smaller cells. 


Performance of Secondary (Rechargeable) Batteries 


Chemistry 

Anode/Cattiode/Eleetrolyte 


Open Circuit 
V 


Loaded V 


Capacity 
(Ah at 100 hr 
rate) 


Energy 
(Watts -hr) 


Weight 
(grams) 


Energy Density 
Vnnkg WhAJter 


Nickel Cadmium Ni/Cd/KOH 


1.35 


1.25 


4.4 


5.3 


140 


40 


120 


Lead Acid Pb02/Pb/H2S04 


2.1 


2.0 


2.7 


5.4 


182 


30 


100 



1-38 



This is the most mature of the high energy density, high 
discharge rate lithium chemistries and has been exten- 
sively used in military applications such as sonobouys, 
radios, and beacons. Early LiSOz had some safety prob- 
lems, but manufacturers now extensively test their designs. 
Indeed, many data sheets have more information about 
crush tests, nail-through-the-battery tests, and incineration 
tests tfian information about discharge characteristics. 

Large LiSOz cells with high discharge rate capability 
have safety devices such as high temperature fusible links, 
over-pressure safety vents, and time delay fuses to prevent 
catastrophic rupturing (battery manufacturers apparently 

do not like the term explosion). 

The capacity of LiS02 cells is about 25% less than its 
major competitor, lithium thionyl-chloride (LiS0Cl2) LiS02 
cells have excellent storage characteristics, and maintain 
a high percentage of capacity over a wide temperature 
range. Typical cell sizes range from 300mAh upwards to 
many tens of amphere hours. The open circuit voltage is 
about 3.0V, and the voltage during discharge is relatively 
flat. 

Uthlum thionyl-chloride (LISOCk) 

Presently the highest energy density system available, 
LiSOCl2 is the choice over LiS02 in many new applications. 
In general, LiS0Cl2 cells have about 1/3 more capacity for 
a given volume or weight than do LiSOa cells, but energy 

densities vary slightly between manufacturers. 

Typical cell capacities range from several hundred mAh 
through 20Ah, but there are cells up to 8.000 ampere hours 
available. See "Lithium cells suit high-energy military 
needs", Don Powers, EDN April 85. The open circuit volt- 
age is 3.9V, and the discharge voltage is a constant 3.5 to 
3.9V, depending on the discharge rate. High discharge 
rate D size cells can be operated up to 10A, 

Lithium Poly-Carbonmonofluoride fLiCFn) 

These are available in both coin cells and cylindrical 
cells up to 1.2Ah. LiCFn cells are well suited for CMOS 
RAM backup applications since the self discharge rate is 
typically only 0.5% per year of storage at room tempera- 
ture. The cylindrical cells have a high pulse current capa- 
bility of 1A from a 1.2Ah 2/3A cell (17mm diameter by 
33.5mm high, 13.5 grams). 

SBGondaryBattBries 

The two most popular rechargeable chemistries are 
lead acid and nickel cadmium. 

HUekel Cadmium 

Nickel Cadmium, or NiCad, cells and batteries are avail- 
able in sizes from about lOmAh to over lOAh, with a wide 
variety of packaging styles. lOmAh to 150mAh batteries 
designed for memory backup are available with pins for 



are fticitiy ltf|Jc^u^cJyt^u jsuu-o ui ucno, ciiiu uuiii nave 

the same 1.2Ah rating as industrial grade sub-C cells. 
Industrial grade C cells have around 2.5Ah capacity, and 
D cells about 4Ah to 4.8Ah. 9V NiCad batteries come in 
both 6 cell and 7 cell versions, with nominal terminal 
voltages of 7.2V and 8.4V respectively. Since the output 
discharge characteristics is very flat, even a 7.2V output 
voltge is in most applications an adequate replacement for 
the 9.5 to 6V output of a 6 cell LeClanche or alkaline battery. 
NiCad 9V batteries, though, have only 65mAh to lOOmAh 
capacity, much iowerthan the 500+mAh ratings of alkaline 
9V batteries. 

Sealed C and D cells are typically recharged at the 0. 1 C 
rate for 14 hours. NiCad batteries in memory backup 
applications are usualy continuously current trickle- 
charged at 0.002C to 0.1C (where C is the cell's rated 
capacity). Standard cells are normally charged at 0. 1 C for 
1 4 hours, since this allows a very simple charging circuit - 
batteries can be overcharged at 0. 1 C for extended periods 
without drastic reductions in life. Special, fast rate batter- 
ies can be recharged in 20 minutes with a charge rate of 
4C, but high rate chargers must have sophisticated meth- 
ods of detecting end-of-charge, such as sensing the in- 
crease in temperature that occurs when full charge has 
been reached. Other methods of terminating fast-charge 
include temperature compensated voltage detection, and 
detection of the voltage reduction that occurs after full 
charge has occurred. 

Cell capacity is typically reduced to 50% of its initial 
value after 500 to 1500 deep discharge cycles, or after 5 
or more years of continuous trickle charge at 0.005C. 
NiCad batteries have a self-discharge rate of 0.5% per day 
at 23°C when near full charge, and retain 20% to 40% 
capacity after 5 months. At 30°C, 50% to 80% charge is 
retained after 30 days. 

The open circuit voltage of a fully charged NiCad cell is 
about 1.3V, and the discharge voltage is 1.24V ± lOOmV 
for virtually the entire discharge cycle. After the cell volt- 
age has fallen to around 1 . 1 V, the rate a change of the cell 
voltage increases rapidly Cells may be completely dis- 
charged virfthout damage, but reverse charging at more 
than -200mV for extended periods will permanently dam- 
age cells. This reverse charge condition most often occurs 
in multi-cell batteries in which the capacity of the various 
cells is not well matched. 

NiCad batteries come in both sealed and vented types. 
A sealed cell is a closed environment, and allows the 
escape of gas only under abnormal conditions which 
cause safety vents to open. The vented cell allows gases 
to escape from from the cell during normal operation. 
Sealed cells are most common in the sizes from D cell and 
below, while vented cells are used in very large batteries 
in such applications as engine starting and mobile X-Ray 
equipment. Vented cells must be periodically inspected 
and the electrolyte replenished. 



1-39 



Lead Acid Batteries 

Lead acid cells come in many forms, the most common 
one being the automobile battery, which is typically a 
vented lead-acid battery. Smaller cells, such as D and X 
come in fully sealed packages. Typical sealed lead-acid 
battery capacity is 2.5Ah (lOhr rate) for D cells, and 5Ah 
for X cells. The open circuit voltage of a lead-acid cell can 
be used to estimate the charge state. For a Cyclon brand 
cell from Gates, the 25°C open-circuit battery voltage is 
about 2. 1 8V when fully charged, declining linearly to about 
1 .98V wtien 1 0% of capacity is left. 

The minimum voltage allovi/ed during discharge is nor- 
mally 1 .6V, and lead-acid batteries should not be allowed 
to self-discharge below 1 .8V. If allowed to self-discharge 
below 1 -BV while in storage, the battery will take longer than 
normal to recharge and the next discharge cycle cannot 
deliver the rated capacity. Subsequent cycles, however, 
will result in an increase in capacity to the rated capacity. 
As with all batteries, the rate of self discharge is a strong 
function of temperature. At 5 months of storage at 20°C, 
the typical battery will have 60% capacity remaining. At 
40°C, however, the battery would be fully discharged after 
5 months. 

Lead-acid batteries have extremely low internal imped- 
ance, and D cells can deliver up to 100A for short periods 
of time. 

Since the terminal voltage of a lead-acid battery rises 
sharply as it nears 1 00% charge, the most common charge 
circuit is a simple constant voltage supply. A constant 
2.35V charge will recharge a battery to 90% within 2 hours, 
and the battery can be left float charging at 2.35V indefi- 
nitely to maintain full charge. If the battery temperature will 
vary significantly, the float voltage should have a temper- 
ature coefficient of -2.5mV/°C/cell. Typical float life is 5 to 
8 years at 25°C and 2.35V float voltage, decreasing to 2 
years for 2.35V float voltage at 50°C. 

For deep discharge service that need a fast cycle time, 
the charge voltage can be increased to 2.45V to 2.7V for 
even faster charging, but continuous float charging at more 
than 2.4V is not recommended. Typical cycle life is 2500 
charges for full discharge, and over 1 000 for a 25% depth- 
of-discharge. It is important to fully recharge lead-acid 
cells, with a 2.35V optimum for batteries that are cycled 
once per week, and 2.45V for batteries that are cycled 
once per day. 



1-40 



DESIGN BMTRY 



ELECTRONIC DESIGN EXCLUSIVE 



CMOS curbs the appetite 
of power-hungry 
dc-dc converter chips 



Working with CMOS rattier than the standard 
bipolar process cuts the typical operating current of 
a dc-dc converter more than a hundredfold. 



Designing dc-dc converters involves two basic 
steps: Selecting a converter control chip and 
adding the required external components, 
such as coils, resistors, and capacitors. The efficiency 
of the control-circuit IC determines how well the con- 
verter does its job. For a battery-powered system, 
high efficiency means that battery life is extended 
because voltage is converted to the desired value with 
minimum losses. In the case of ac-powered systems, 
efficiency translates into cooler adjacent com- 
ponents. 

Bipolar control chips for dc-dc converters usually 
pull about 12 mA, with a minimum required oper- 
ating voltage of 3.5 V. Quiescent current is on the 
order of several hundred microamperes. In contrast, 
the first CMOS converter control IC drastically 
changes such customary values, setting new stan- 
dards for these devices. The MAX630's typical 
operating current comes in at 70 nA, its minimum 
operating voltage is merely 1.8 V, and the chip's 
quiescent current is a miserly 0.5 ^A. 

In addition, the 8-pin device needs no base current 
for its n-channel MOSFET output transistor, which 
supplies up to 300 mW when converting 5 V to 15 V. 
And output power is virtually unlimited when the 
chip is used with one external power-boosting tran- 
sistor or power MOSFET. 

The chip can best be described while in secQaa, s&y 

Charlie AHmi 



in a voltage-regulating loop (Fig. 1). When 5 V is first 
applied, current flows through inductor L and diode 
D, supplying the chip with 44 V for startup. The de- 
sired output voltage is selected by changing the value 
of feedback resistors Ri and R2. 

Comparator 1 determines whether a specific frac- 
tion of the output voltage is equal to the 1.3-V inter- 
nal reference. When the converter's output voltage is 
too low, the comparator's output is high and the 
40-kHz oscillator pulses are allowed through the 
NOR gate latch, turning on output MOSFET Q,. As 
long as the output voltage is less than the desired 
voltage, Qi enables the inductor to be driven from the 
5-V supply with pulses at the oscillator frequency. 

Dalhwring storad energy 

Each time Qi is turned on, the current increases 
through L, storing energy. When Qi turns off, the po- 
larity of the voltage reverses across the inductor (a 
result of L di/dt). The voltage at Lx then increases 
until D is forward-biased and current is delivered to 
the output. 

When Qi is on, the current rises linearly because 
di W 

= jj. At the end of the on-time (14 us for a 40 Idiz, 
55% duty-cycle osdUator), I = ^ = ^li^^^= 

150 mA. The energy in the inductor is P = g LI^ = 

5.25 mW-s. 

Qi is turned on and off 40,000 times every second, 
and at maximum load the power tran^erred throng 



' November 14, 198S 



1-41 



I 



DESIGN ENTRY 



De-dc converter IC 



the coil is 40,000 X 5.25, or 210 mW. Since the in- 
ductor supplies only the voltage above the input 
voltage, at 15 V the dc-dc converter can supply 
210 mW/(15 V - 5 V) or 21 mA. The inductor fur- 
nishes 210 mW, the battery directly supplies another 
105 mW (that is, 21 mA X 5 V) for a total output 
power of 315 mW. If the load draws less than 21 mA, 
the IC turns on its n-channel MOSFET oti'^ot m>n- 
trol only often enough to keep the voltage at a con- 
stant 15V. 

Thus, contrary to what might be expected, reduc- 
ing the inductor value increases the available output 
current. In other words, lowering L increases the 
peak current, thereby increasing the available 
power. 

When the output voltage reaches the desired value, 
/ R \ 

1.3l(l + ^ ), the comparator's output goes low and 

the oscillator pulses no longer turn on Qi. The output 
current is then supplied by filter capacitor C, which 
limits ripple to about 50 BiV. As the Output volt^e 



drops below the comparator threshold, Qi is again 
switched on, repeating the cycle. On average, the 
duty cycle at the output is directly proportional to the 
output current. 

An n-channel MOSFET with an on-resistance of 
about 4 Si and a maximum current rating of 250 mA 
(peak) controls the chip's output. MOSFETs have 
two distinct advantages over bipolar transistors. 
Their higher speed, which reduces switching losses 
and allows for smaller, lighter, and less costly mag- 
netic components is the benefit generally mentioned 
with reference to high-power switchers. It must be 
kept in mind, though, that if a low-cost molded in- 
ductor is employed, circuit efficiency comes in at 
roughly 15% . An inductor with a lower series resis- 
tance, however, boosts efficiency to around 90% . In 
highly efficient low-power dc-dc converters, the ad- 
vantage is that MOSFETs require no base current. 
Alternatively, their bipolar kin must use a portion of 
the input power for that purpose, reducing circuil 
efficien<gf. The accompanytog power Ima is most sot- 



low battery 
O detector output 




Vo,. 15-V 
O at 20 mA 



1. Using the MAX630 in a voltag«-ragulating loop delivers 15 V from a 5-V souroe. The divided 
output voltage is applied to comparator 1, where it is checlced against the 1.3-V reference 
voltage. The comparator output enables the oscillator pulses, turning on Q-, and allowii^ cur- 
rent to store energy in inductor L. When Qi is off, that energy is applied to the output. 



ElMlranic DM^n • NovBtnber 14, 1985 



1-42 



dent in voltage-boosting systems, such as up- 
converters. In fact, the chip's low operating current 
and MOSFET output control features superior effi- 
ciency in such applications. A chip carrying a bipolar 
transistor, though, could use up to 10% of the total 
input power. 

The oscillator frequency is determined by a single 
external component, a low-cost ceramic capacitor. A 
47-pF capacitor sets the frequency to 40 kHz, a rea- 
sonable compromise between the smaller switching 
losses associated with lower frequencies, and the 
smaller inductor found at higher frequencies. 

On-chip convenience 

Two of the converter's features simplify power 

supply design— a low-battery detector and a shut- 
down mode. Specifically, the first compares the volt- 
atie on the Low Battery input with the internal 1.3-V 
reference. The detector's output is an open-drain 
n-channel MOSFET. The low-battery detector is also 
called into play in other voltage-monitoring oper- 



ations such as determining ac line-power failure in 
battery-backed systems. 
The second feature employs the Itim to shut down 

the device. When in that state, the chip turns off the 
analog bias generator and draws less than 
1 mA of quiescent current. The shutdown condition is 
entered whenever the Ic pin is left floating or is 
driven below 1 V. 

Some battery-powered systems, however, call for 
short bursts of high current. The extra circuitry de- 
signed to meet that need (Pig. 2) converts —3 V to 
-1-5 V in the buck-boost or flyback mode (see "Dc-dc 
Onverter Clonflgurations,'' p. 178). 

The left half of the circuit is similar to that of the 
5-to-15-V converter, and supplies 15 V for the gate 
drive of the external power MOSFET. This gate drive- 
ensures that the external power MOSFET is fully 
turned on and presents a low resistance. 

The right half of the circuit is a -3 V to +5 V 
buck-boost converter. An advantage of this circuit is 
that when the chip is turned off the output falls to 



r" 

I J- 

I 47 ^F. 
. 25 V 



3-V 
lithium 
cell 



MAX630 

+ Vs Vf, 



I ^ 47 pF 



Lx MAX630 



T 



47 pF 



; I 280K 



n 



1N5817 



-1-5 V at 0.5 A 

»o 



470 1 
cF 




2. High current lor short periods is obtained by adding a second section to the basic dc-<lc converter. The 
first section furnishes a 15-V output from a -3-V lithium cell and controls an sxisrttM pOWar MOSFET. 
The second is a buclc-boost converter, which supplies +5 V from —3 V. 



Elwtronle DMign • Novembw 14, 1985 



1-43 



V. On the other hand, in the standard boost circuit 
(Fig. 1 again), the output is Vbatt ~ 0.6 V with the 
chip shut down. Also, when the buck-boost converter 
is shut off, it draws less than 10 ^^A. 

The inductor and output filter capacitor values 
have been changed to accommodate the increased 
power levels. At the indicated values, the circuit sup- 
plies up to 500 m A at 5 V, with an efficiency of 85% . 

An alternative approach to high power conversion 
(—3 V to +5 V) uses a single chip and an inductor 
with two windings. One winding supplies 10 to 15 V 



that drives the power MOSFET gate; the second 
winding delivers power for the 5-V output. Since the 
MOSFET gate drive is only the battery voltage mi- 
nus one diode drop during startup, the MOSFET 
must be a low threshold device. On the other hand, 
the circuit that pairs up the converter chips will start 
and operate with power MOSFETs that have high 
threshold voltages. 

The converter IC ensures a continuous supply of 
regulated +5 V, and automatically switches over be- 
tween line power and battery backup (Fig. 3). When 



Dc-dc converter configurations 



Dc-dc converters come in three basic topologies: 
buck, boost, and buck-boost— each of which meets a 
particular need. When the output voltage is greater 
than the input, the converter is usually operated in 
the positive voltage boost circuit (see the figure). 
The buck circuit is employed when the input voltage 
is always greater than the desired output voltage. 
Finally, the buck-boost circuit inverts the input 
voltage, and can be used with an input voltage that is 
either greater or less than the desired output. 

Dc-dc converters also can be classified according 
to the method by which they control their output 
voltages. The two most common approaches are 
pulse width modulation (PWM) and pulse frequency 
modulation (PFM). Pulse-width-modulated 
switchers (current-mode control being one variant) 
are well established in high-power switching sup- 
plies that work off the ac line. 

Both PWM and PFM circuits control the output 
voltage by varying the duty cycle. In the former, the 
frequency is held constant and the width of each 
pulse is varied. In the latter, the pulse width is held 
constant and the duty cycle is controlled by chang- 
ing the pulse repetition rate. 

The MAX630 refines the basic PFM approach by 
supplying a constant frequency oscillator. The chip's 
output MOSFET is switched on when the oscillator 
output is high and the converter's output voltage is 
lower than desired. If the output voltage is higher 
than wanted, the MOSFET output control is dis- 
abled for that oscillator cycle. This "pulse skipping" 
varies the AV^gge da^ egde aod thus controls the 



output voltage. 

Unlike the PWM ICs that use an op amp as the 
control element, the converter chip uses a com- 
parator to check the output voltage against an inter- 
nal reference. That arrangement reduces the die 
size, the number of external components, and the 
operating current. 



aH 



Control 
section 



Boost converter 



Control 
section 



Buck converter 



2_r 



Control 
section 



Buck-boost converter 



|v„| 



►0 + 



O Ml r onl e Dnign • November 14. 1985 



4>44 



the line-powered input voltage is 5 V, it furnishes 
4.4 V to the chip and trickle charges the battery. The 

device runs continuously, boosting the 4.4 V to 5 V. 
When that line-powered 5-V input falls below the 
3.6-V battery voltage, the battery supplies the power 
to the chip. The converter boosts the battery voltage 
to 5 V, delivering a continuous dc supply to the unin- 
terruptible 5-V bus. Since the 5 V output is always 
supplied through the chip, there are no power spikes 
or glitches during power transfers. 

Keeping an eye on the battery 

The device's low-battery detector monitors the 
line-powered 5-V line, and the low-battery detector 
output can shut down unnecessary sections of the 
system during power failures. Alternatively, the low- 
battery detector could monitor the Nicad battery 
voltage and warn of loss of power when the battery is 
nearly discharged. 

Unlike battery backup systems that use 9-V bat- 
teries, this circuit does not need 12 or 15 V to recharge 
the battery. Therefore, it can be used to supply a 5-V 



backup for modules or cireait'Cjuci«<m which only a 

5-V supply is available. 

A common problem in large electronic systems is 
that, although multiple power supply voltages are 
used, they are not always available where they are 
needed. Often only +5 V is distributed, but one 
section or printed circuit card needs both +5 V and 
+15 V. The ready availability of power converters 
enables the designer to have the needed voltage 
available at his fingertips. □ 

Charlie Allen has served as the applications engineer- 
ing manager at Maxim for the past year and a half. 
Before that, he held the equivalent position at Intersil. 

He received a BSEE from Michigan State University 
and has published several technical articles in the pcLSt 
few years. 



Line-powered 5 V O— 



3.6-V 
nickel- 
cadmium 

battery 

mounted T 
on pc board I 



470 



1N5817 

-Wr- 





Lx 


MAX630 


+ Vs 






Low battery 




input 




Low battery 


V,, 


detect 




OND 





1 



K> UMntamiptlMe 



:47pF 



»^ Power F 



3. The MAX630 also acts as an uninterruptible S-V power supply. It converts either 
the line-powered 5 V or the 3.6-V Nicad battery input to 5 V. The Power Fail output 
goes lew when Hie line-p o we r e d S-V input 'talle. 



Elselfsaie DMign ■ Novwnbar 14, 1986 



1-45 



I 



Dc/dc converter ICs 



Chip-level converters 
administer local 
dc dosages 



Whether operated from a 
battery or an off-line power 
supply, dc/dc converter ICs are 
an economical alternative to 
multiple-voltage power supplies 



David Bingham, Staff Scientist 
l\^axim Integrated Products 



The availability of standalone 
power-supply chips will revo- 
lutionize the conventional 
method of structuring power-supply 
systems. Increasingly, the ubiqui- 
tous 4-5 V will solo as the only 
bussed voltage while the less com- 
mon and lower secondary dc volt- 
ages are generated where they are 
needed by dc/dc converter ICs. For 
the moment, these chips and their 
menage of external parts wjM rcanan 



+5-V,50-mA 
OUTPUT ^ 







SENSE 


V|N (TOS) 


''OUT 


LBO 


LBI 


VSET 


GND 


SHDN 



□ 



N/C 



3-' 



nam 



board-level circuitry, but the indus- 
try is gravitating toward generating 
the secondary voltages right on the 
chips that need them. 

Putting an end to overkill 

Almost without exception, multi- 
ple dc power-supply voltages are re- 
quired in electronic equipment, 
whether computers, housrfiold ap- 
pliances, industrial data acquisition 
systems, or military mobile radios. 
There is typically one dominant dc 
voltage for the digital electronics 
and one or more secondary dc volt- 
ages for the analog circuitry. An ob- 
vious example of such a system is a 
computer in which the processor, 
memory, and other logic circuitry 
are operated from a -F5-V supply 
and some of the interface circuitry 
(both analog and digital) is rtm off 
various other dc voltages such as 
-1-10 V, -1-12 V, ±15 V, and so on. 

In the past, the most cost-effective 
way to obtain the multiple dc volt- 
ages has been to generate them in 
the system's main power supply at 
power levels that exceed what is ac- 
tually needed for many applications. 
Today's more cost-effective strategy 
involves conscripting dc/dc con- 
verter ICs to convert the main 
(bussed) dc power-supply voltage 
into the required secondary volt- 
age (s) . Typically, the converter ICs 
are mounted on the same board with 
the circuitry that requires the non- 
standard power-supply voltages. It's 
a practical maneuver thanks to a 



Fig. 1. The MAX666 is a CMOS linear regulator that 
Idles at 4 iJ.A yet can deliver an output 
current from 5 tiA to 50 mA. 



+I.5-V to +16.5.V 
I INPUT 



ELECTRONIC PRODUCTS / May 1, 1987 



t-46 



new series of CMOS dc/dc converter 
ICs that Maxim recently introduced. 
Intended for low- to medium-power 
applications, each member of this 
new chip battalion integrates most 
of the components or glue that was 
needed by earlier-generation con- 
verters. This results in a low compo- 
nent-count design, high power-con- 
version efficiency, simplicity of use, 
and low cost. Because of their high 
efficiencies in particular, these novel 
dc/dc power-supply circuits are a 
wise choice for battery-operated mil- 
itary systems — or for any other bat- 
tery-operated system for that matter. 

Linear, switcher, or charge pump 

Maxim's family includes the three 
basic tjfpes of dc/dc converter cir- 
cuits: the linear regulator, switcher, 
and charge pump. Before choosing 
between them, designers should be 
aware of the advantages and disad- 
vantages of each, as outlined in 
Table 1. Because none can fulfill the 
needs of every application, eadi has 



found its niche — a situation unlikely 
to change for some time to come. 

The linear regulator in particular 
was the first to show up extensively 
in electronic equipment. It has a fine 
pedigree, initially being integrated 
onto silicon in the mid 1960s by 
Fairchild Semiconductor in the now 
famous /tA723. Subsequent genera- 
tions of linear regulator ICs have 
extended the level of available out- 
put power and, because of this higher 
integration, have culminated in 
three-terminal regulator ICs that re- 
quire few, if any, external compo- 
nents. 

More recently, CMOS technology 
has brought about a reduction in the 
quiescent (idling) current of linear 
regulators. For example, Maxim's 
MAX663 and MAX666 ICs have 
slashed this ciurent to 4 /lA typ so 
that the only real power loss occurs 
in output pass transistors. In addi- 
tion, the MAX666 has an output cur- 
rent that can range from 5 juA to 50 
mA, and includes alluring goodies 



Table 1. Comparison of Dc/dc Converters 



Fnittra 


Llnnr 
ngiltUoa 


Cliarge pamp 


SwUctar 


Output voltage 
regulation 


Excellant 


Poor 


Excellent 


Voltage step-up 


No 


Yes, but only in 
discrete multiples 
of Input voltages 


Yes 


Voltage st^fdewn 


Yes 


Yes. but only In 
discrete fractions 
of Input voltage 


Y«s 


Currtnt step-up 


No 


Yes, but only In 
discrete fractions 
of Input current 


Yes 


Power conversion 
efficiency 


Poor 


Excellent - can 
approach 100% 


Good 80% 


High power 
control 


Yes 


Not suitable 


Excellent 


Inductor required 


No 


No 


Yes 


Output noise 


Low 


Includes clock 
frequency plus 
harmonics 


Includes clock 
frequency plus 
harmonics, hf hash 


Minimum of 

external 

components 





2 capacitors 


1 Inductor 
1 capacitor 



like shutdown, low-voltage deteo^ 
tion, and output current limiting 
(see Fig. 1) . A new feature, dual 
mode operation, proffers selection of 
either a fixed 5-V output or — with 
the addition of two external resistors 
— any output voltage from 2 to 15 V. 

In general, linear regulator ICs 
are most suitable for the battery op- 
eration of equipment, such as run- 
ning a 5-V system from a 9-V bat- 
tery. Figure 2 shows a battery- 
backup power supply using a 
MAX666 and a 9-V transistor radio 
battery. Resistor senses the un- 
regulated dc from the line supply 
and inhibits the output of the MAX- 
666. A detector informs the system 
if the backup battery is malfunc- 
tioning. The quiescent current 
drawn from the battery is typically 
3 to 4 /I A. If a nickel cadmium stack 
is used, then the optional charging 
circuit of Rj and diode may be 
added. 

Linear regulators are also prudent 
where noise suppression is impor- 
tant. Other uses include the genera- 
tion of say -(-10 V or -t- 12 V from an 
existing -1-15-V supply at the board 
level rather than at the main power 
supply. 

The two drawbacks of the linear 
regulator are its low power-conver- 
sion efficiency and the fact that its 
oufput voltage is always less than 
its input voltage. If the ratio ap- 
proaches unity, then power conver- 
sion efficiencies will be proportion- 
ately high. For an efficient regulator 
such as the MAX663 the power con- 
verdon ^dency, assuming equal 
input and output cartea^, is: 

Eflfeaency = ^^221x100% 

♦IN 

This works out to an effidraicy of 
approximaiely 50%, assuming, say, 
a 10-V input and a 5-V output. 

Switching regulators are more effi- 
cient than linears. If a switching 
regulator is used to convert, say, 
-(-15 V into -f5 V, thai the conver- 
sion efficiency will be about 80%. 
The figure for a linear regulator is 
33% using the formula shown (5/ 
15 V) X 100%. Hence, switchers are 
called upon extensively for high- 
efficiency dc/dc power converdon, 



ELECTRONIC PRODUCTS / May 1, 1967 



1-47 




3-TERMINAL 
POSITIVE 
REGUUTOR 



>330K 



10 n< 



lOOK 





^ 8 


1 




2 


7 


3 


6 


4 


5 



22K<Ri 



1 



■ +5 V 



BAHERV 

MALFUNCTION 

INDICATION 



>GND 



NOTE: Dl, Ri OPTIONAL -IF NEEDED 

TO CHARGE BATTERY 



9-V 
BATTERY 



Fig. 2. This uninterruptible +5-V power suppiy is constructed around a MAX666 and a 9-V battery. 
It ac power Is lost, then the I^AX666 will convert the battery voltage into +5V. The chip's low-battery 
detector circuitry informs the system it the baclfup battery is malfunctioning. 



and they have the added assets of 
being smaller and cheaper. (Note 
that off-line switching power sup- 
plies are basically dc/dc converters 
since the ac line voltage, after being 
rectified and smoothed somewhat, is 
connected to the input of a dc/dc 
converter from which the desired 
output voltage is obtained) . Also, 
switchers are much more versatile 
than both linear regulators and 
charge pumps and are particularly 
fine where stepup and voltage inver- 
sion with reasonable precision is re- 
quired. (They do, however, cost 
more than linear legulator ICs.) 



A switching power converter, un- 
like the linear regulator, operates in 
a discontinuous mode. In its sim- 
plest configuration — a two-phase 
mode — energy is taken from an in- 
put power source and stored in the 
magnetic field of an inductor in one 
phase. At the end of this phase a 
current, I, will be flowing in the in- 
ductor, L, which will have a stored 
energy of V2 LI-. At the beginning of 
the second phase, the inductor is re- 
cormected through a switch to the 
output reservoir capacitor. The cur- 
rent will have a value of I at the be- 
ginning of the second phase and will 



-I-L5-V to +16.5-V- 
INPUT 



330 ,xH 



LBI 




COMP 


LBO 




vfb 


GND 




CP 


U 




VOUT 


mam 



-^5•V, SIM 
OUTPUT 



either approach or decrease to zero 
at the end of it. Energy will thus be 
' transferred from the magnetic field 
of the inductor to the reservoir ca- 
pacitor. The function of this capaci- 
tor is to store the packets of energy 
received and produce a constant 
voltage during each complete period 
of operation. Thus the switcher re- 
quires at least two external storage 
elements — an inductor and a capaci- 
tor — because large amounts of en- 
ergy still cannot be stored on a mon- 
olithic IC. 

Although the internal operation of 
the switcher is discontinuous, as 
viewed from the output load it ap- 
pears to be continuous. Furthermore, 
the switcher is extremely flexible in 
function because of the diversity of 
ways — called topologies — that the 
inductor (s) can be connected to the 
input supply tend to the output. 

Among switdiing regulator ICs, 
the MAX631 is typical of what can 
now be achieved using conventional 
CMOS (see Fig. 3) . Its utility lies 



I 



100 iif Fig. 3. The MAX631 switching regu- 
lator serves well as a voltage 
t>ooster. It can supply a +5-V output 
voltage from an Input voltage 
as low as +1.5V. 



H.ECTRONIC PRODUCTS / May 1, 1987 



1-48 



to +16.5-V INPUT 
(NOM +5 V) 



+ 1 5-V to +16.5-V INPUT 
(NOM +5 V) 



+15-V OUTPUT 



13.8-V OUTPUT 




+ 15 V OUTPUT 



(O) 




Fig. 4. Boosting a nominal Input of +5V to +15V Is an easy job tor 
the MAX633 swi teller (a). If a second — but less accurate — higher 
voltage Is needed, then the circuit shown in (b) can be used to derive 
both +1Sand -13,8 V from a nominal +5-V input. Dual ±15-V sup- 
plies can be had by using a more precise +5-V input (c). 



in its ability to boost a voltage as low 
as 1.5 V up to +5 V. All of the neces- 
sary circuit components except those 
storing energy (the inductor and 
reservoir capacitor) are contained 
on chip. From an applications point 
of view the MAX631 switcher dupli- 
cates the niceties of the MAX666 
linear converter. Both have low-volt- 
age detectors, operate with mini- 
mum quiescent currents, and feature 
dual mode operation. 

The MAX632 and MAX633 are 
sister chips to the MAX631 and can 
be drafted to boost a 1.5-V input to 
-1-12 and -1-15 V, respectively. Us- 
ing the circuit of Figure 4a, designers 
can enlist the MAX633 when a regu- 
lated -t- 15 Vis needed and a nominal 



+5 V is available. The only addi- 
tional components are an inductor 
and a capacitor. Hiis same circuit 
could also operate from a two-cell 
battery stack to provide -1-5 V using 
the MAX631. 

Generating a negative voltage 

To generate a crude — 15 V in ad- 
dition to -I- 15 V, the circuit of Figure 
4b can be put into service. A charge 
pump inverts the -)-15-V output 
(which also powers the MAX633 af- 
ter the circuit has started up). It 
consists of an on-chip power inverter 



that swings between ground and the 
-(-15-V output. Two external diodes 
and two capacitors complete the cir- 
cuit. The output voltage will be less 
than —15 V, however, because of the 
forward-voltage drop across each of 
the diodes. Instead, the negative out- 
put voltage will have ah open-circuit 
value of approximately 13.8 V, and 
it will, of course, be unregulated. 

Figure 4c shows how to generate 
both a -I- 15-V and a —15-V supply 
by replacing the inductor with a 
transformer and adding another ca- 
pacitor and a diode. The accuracy of 
the — 15-V supply will not be as good 
as the -1-15-V supply but should be 
adequate for most applications. Note 
that this circuit requires a precise 
+5-V input since the negative out- 
put has a power-supply rejection ra- 
tio of less than unity. 

Other CMOS dc/dc converters 
from Maxim provide stepdown and 
inverting outputs, together with 12- 
or 15-V dual-mode output voltages 
of either polarity. Figure 5a shows 
how to derive -1-5 V from an input 
voltage range of +5.5 to -1-16.5 V 
using the MAX638 stepdown or 
"buck" switcher. If —5 V is needed, 

+3.0-V to +16,5-V INPUT 
(NOM -1-5 V) 




Fig. 5. The MAX638 stepdown switching 
converter can be conscripted when +5 V 
Is needed and +15 V Is available (a). 
It can also Invert +5Vto -S V(b). 



ELECTRONIC PRODUCTS / May 1, 1987 



Dc/dc converter ICs 



Table 2. Comparison of Inverting Converters 





ICL7660 

eharge pump 


MAX638 
hnwftlni ewltdier 


Output voltage 
accuraqr-ao load 


2% typ 


2% typ 


Output Impedance 


600 


10 


Supply rejection 


OdB 


70 d6 


Useful output current 


20 mA 


75 mA 


Maximum power- 
conversion efficiency 


9S%at2mA 


85% at 35 mA 



then the circuit arrangement of Fig- 
ure 5b can be used instead. 

One of the drawbacks of using a 
switcher as a low-power dc/dc con- 
verter is that an inductor is manda- 
toiy. Because inductors are the least 
ooiiinian components in electronic 
eqaqnaent, designers have been re- 
luctant to employ them. However, a 
wide range of ine3q)«isive inductors 
from potted miniatures to small tor- 
oids are available. The potted va- 
riety resemble resistors and 
can handle milliwatts of power, 
while the toroids are usable at levels 
of several watts. 

The second switcher bugbear is 
the fact that it produces both elec- 
trical (conducted) noise and elec- 
tromagnetic (radiated) noise. The 
noise at the output of a switcher and 
the noise fed back into the input 
supply will consist of its clock fre- 
quency plus harmonics and some- 
times subharmonics. In some sys- 
tems additional filtering may be 
needed to reduce this noise, thus up- 



ping the cost. 

The third type of dc/dc converter, 
the charge pump, is really a modified 
voltage doubler — or multiplier— 
which has been around for 80 years. 
Like the switching regulator, the 
charge piunp operates in a discon- 
tinuous mode that has two phases. 
In one, a flying capacitor is con- 
nected to the input supply. In the 
second, this capacitor is reconnected 
through switches to an output res- 
ervoir capacitor. 

This output device serves the 
same function as the reservoir ca- 
pacitor in the switcher — ^namely, to 
provide a continuous or dc output 
during both phases. The output volt- 
age of a simple charge pxmip can 
therefore be either an inversion of 
the input voltage or a doubling or 
halving of the input, depending on 
how the interconnecting switches are 
configured. Recruiting more capaci- 
tors and switches yields any multi- 
ple or positive fraction of the input 
voltage. If both stepup and stepdown 



techniques are used together, then 
virtually any output voltage can be 
obtained. 

The plus side of charge pumps in- 
cludes high voltage and power con- 
version efficiencies, which can ap- 
proach 100% at low power levels, 
and the need to add only two inex- 
pensive capacitors. Demerits are a 
lack of output regulation, input volt- 
age tracking, and the fact that they 
produce switching noise. In general, 
however, their noise problrans are 
much less severe than the switchers', 
and in most applications it is not 
even a consideration. 

Probably the most conrnicHi home 
of charge pumps has been aboard n- 
chaimel RAMs. This circuit arrange- 
ment generates on chip a voltage of 
—3 to —4 V from the -1-5-V power- 
supply rail. The negative voltage can 
then back-bias the substrate^ whidi 
effectively reduces junction capaci- 
tances to improve switching speeds. 

Standalone converters 

More recently, CMOS charge 
pumps have become available as 
standalone ICs, the trailblazer be- 
ing the ICL7660. Since its introduc- 
tion in the late '70s, the ICL7660 has 
been used by the millions for the 
local generation of a negative volt- 
age from a system's main (positive) 
power source. It is most frequently 
called upon to provide —5 V from 
the main -1-5-V supply (see Fig. S) . 

Not surprisingly, power-supply 
designs employing the ICL7660 have 
been the lowest-cost solutions for in- 
terface drivers such as EIA RS-232- 
C and various analog circuits, includ- 
ing operational amplifiers, analog- 
to-digital converters, and so on. But 
the ICL7660 does have its faults, too. 
For cma thing, its output is not well 
regulated. Secondly, it is a tracking 
converter: its output voltage changes 
int>p<Htionately with its input volt- 
age. Also, it cannot supply more than 
about 20 mA of output currrat. Most 
oC tiiese limitations can be overcome 
by tlie use of a switching regulator 
such as the MAX638. Table 2 com- 
pares the features of the MAX638 
with those of the ICL7660. 

New CMOS charge-pump ICs 
have been slow in arriving because 



+ 



JT 



C N/C 
-C CAP+ 
-C GNO 
-T CAP- 



V-l- J« — 

osc 3n/c 

LV DN/C 

VoutH — 



-+5-V INPUT, 



5-V.20-IIIA 
OUTPUT 



+ 



Fig. 6. The ICL7660 charge-pump converter, together with two external 
capacitors, can be employed to derive -5 V from a +5-1/ supply. However, it 
is a tracking converter and has an output that ts poorly regulated. 

ELECTRONIC PRODUCTS / May 1, 1987 ^ 



Dc/dc Qpnyerter ICs 



of their susceptibility to latchup — a 
nuisance that occurs in a CMOS cir- 
cuit when its inputs or outputs are 
forward biased, tripping the device 
into a high-conductance state dmi- 
lar to a conducting SCR. This con- 
dition can only be remedied by re- 
moving the input power supply — ^not 
a very practical solution. But latch- 
up mechanisms are now much better 
understood by IC makers, who can 
take steps to guard against it. New 
charge-pump ICs such as the MAX- 
680 tap both positive and inverting 
pumps to supply ±10 V from a +5-V 
input. Looking ahead, the improved 
CMOS charge-pump circuitry will 
have a dramatic effect in anotber 
arena, as well. 

Included on chip 

Certain standard IC functions re- 
quire an unusual — -but not neces- 
sarily highly accurate — dc power, 
supply voltage (s). Take, for exam- 
ple, RS-232-C line drivers whose out- 
puts must drive a load to a{q>n»i- 
mately ±10 V. These voltages are 
not critical but must be within a 
range of ±5 to ±15 V. Increasingly, 
where the market for such an IC is 
sufficiently large and the economics 
amenable, chip makers are going to 
include a dc/dc power converter 
right on the same chip. Charge 
pumps are a practical choice for such 
converters owing to their high power- 
conversion efficiency, low power 
levels, and low cost. 

The MAX232 pioneers a new se- 
ries of ICs that include their own 
power supplies. The chip's two RS- 
232-C transceivers have been inte- 
grated along with a double charge 
pump to enable operation from a 
single -1-5-V supply. Four external 
capacitors — two for each charge 
pump — must be connected to the 
MAX232. 

But external capacitors are not 
needed by the MAX233, which is a 
hybrid packed into a 20-pin DIP 
along with a modified MAX232 that 
uses a high on-chip chopper fre- 
quency plus a proprietary lead 
tmme. □ 



1-51 



DC /DC converters 
adapt to the needs of 
low-power circuits 



Hi^h cost, quiescmt current, and circuit 

complexity have often restricted switchin^i 
power supplies to hi^rh-power applications, 
for which the switchers' hi£fh efficiency, 
wide input range, and reduced size and 
weight offset their drawbacks. Now, howev- 
er, you can employ switchers in low- and 
medium-power applications as well. 

Len Sherman, Maxim Integrated Products 

Designers of dc/dc-conversion products are now ad- 
dressing the special requirements of low- and medium- 
power applications. As a result, you can apply switching 
techniques' advantages in battery-powered portable 
equipment, telemetry devices, and consumer products. 

A key requirement for designers of battery-powered 
products is that they minimize the number of cells used 
in the product. Substituting, for example, two large 
cells for a stack of six or seven smaller ones yields not 
only reductions in size and weight but also increased 
reliability and energy density. An efficient, low-power 
step-up voltage converter used in conjunction with a 
few high-capacity, low-voltage cells makes such a trade 
feasible, especially in an application where a stack of 
expensive rechargeable batteries would be the alterna- 
tive. 

The circuits shown in Figs 1 through 7 are all 
EDN Januaiy 7, 1988 



come 



1 — nr 



J 330 pF ^ 



12V. 25 mA 

o 



2-2 jxF 





-VouT 


Muns 


U 






GND 






-lav. 15 m* 
O 



1 







NCO 


-lam 








OND 




1' 



-O FROM 1» 
OUTPUT 




<b) 'CADELL BURNS #7070-30 



Fig 1 — You can tailor this ±12V supply to provide either indepen- 
dently regulated outputs (a) or a tracking negative output (b). The 
inductors don 't exact too great a size penalty: Eaek measures enly O.t 
in. long by 0.26 in. in diameter. 



1-52 



The flyback configuration keeps circuitry 

compact, and it adapts not only to voltage 
boostin£i but to buck and buck/boost config- 
urations as well. 



flyback-type switching dc/dc converters (the same type 
that generates 10- to 20-kV supplies for television, 

video display terminals, and oscilloscopes) that operate 
at 50 kHz (see box, "Flyback converters' internal 
operation"). The flyback configuration keeps the cir- 
cuitry compact, and its versatiUty allows it to accom- 
plish more than simple voltage boosting. 

Derive ±12V from digital system's supply 

Often, a digital system powered by a 5V supply 
includes a few analog functions that require ±12V. The 
circuit shown in Fig 1 uses two dedicated 8-pin convert- 
ers—the MAX632 and MAX636— to derive 25 mA at 
12V and 15 mA at -12V from a 5V logic supply. You can 
configure the circuit for independently regulated out- 
puts (Fig la) or for tracking regulation (b). 

The positive converter's efficiency is 85%; the invert- 
er's is 75%. You can improve these efficiency figures 
slightly by using Schottky diodes rather than the 
MAX632's internal diode and the 1N4148 signal diode 
connected to pin 5 of the MAX636. If you opt to use a 
Schottky diode with the MAX632, connect it in parallel 
with the chip's internal diode (that is, between pins 4 
and 5). 

With several popular types of high-current rectifier 
diodes, such as ones in the 1N4000 Series, efficiency 



and overall performance are poor for high-frequency 
(greater than 10 kHz) dc/dc conversion. Many of these 
diodes were designed to pass high current only at 120 
Hz; therefore, they waste energy at 50-kHz operating 
frequencies. In addition, these slow rectifiers might 
also allow the inductor's discharge voltage to reach 
excessive levels before the rectJS^ tiirns on and dimete 
current to the load. 

Small-signal diodes, such as the 1N4148, are fast 
enough and work well in appUcations that require less 
than 50 mA. High-speed rectifiers, such as the 1N4935, 
are suitable in applications that require as much as lA. 
Schottky diodes provide the best performance with 
respect to speed and forward voltage drop, and they 
can significantly improve efficiency in low-voltage, 
high-current applications. However, you'll have to de- 
cide on the basis of your individual application whether 
their higher cost and relatively low reverse breakdown 
voltage eliminate the Schottky diodes from considera- 
tion. 

External MOSFET increases power 

If your application requires higher power than Fig I's 
circuit provides (if, for instwce, you need the power for 
a data-acquisition board or a high-level industrial con- 
troller), then you can modify the circuit by adding an 



UAX642 
COMP 



J»330 
„ ^ dF 1N4935 _ 

6 (\ —^ \* 100 mA 

IBF530 I X 




■CADDELL-BURNS #6860-10 
■■CADDELL-BURNS #6860-11 




(b) 



TRACE 


HORIZONTAL 


VERTICAL 


A 


5 ,,SEC/DIV 


5V/DIV 


B 


5 ^SEC/DIV 


0.5A/DIV 


C 


5 fiSEG/OIV 


SOnMDIV 



Fig Z — With the addition of a tew external components (a), the circuit of Fig I can supply currents of 200 mA at 12V and 60 mA at 
Tmcet A, B, and C (b) represent ike gwHeh voUage, imhietor current, and outpad ripple for the 12V supply. 



-12V. 



1-53 



EDN January ^, 19S8 



external power MOSFET, as shown in Fig 2a, and 
obtain 100 mA at 12V and 60 mA at - 12V. The power 
MOSFET drops the 12V converter's efficiency to 80%, 
but driving the pamar IfOSFETT doesn't require aay 
additional parts. 

The scope photo (Fig 2b) shows some of the key 
waveforms in the step-up circuit. Trace A is the voltage 
waveform at the drain of the IRF530 MOSFET (under 
full load), trace B is the inductor current, and trace C is 
the ripple voltage at the 12V output. The ringing found 
on trace A near the end of each discharge cycle is 
normal and is due to the inductor's interaction with 
stray capacitance when the inductor current decays to 
nearly zero. As you can see from trace C, this ringing 
has no effect on the output waveform. 

Compemiite for ffi dnqM 

Not only might you need to derive ±12V from a 5V 
supply, you might also need to derive a regulated 5V 
level from a nominal 5V supply that suffers from an 
unacceptable voltage drop because of IR effects in long 
power-distribution cables. You can efficiently boost the 
voltage back to a regulated 5V by using the circuit 
shown in Fig 3. 

That circuit operates at input voltages as low as 4.5V. 
The transformer's 3.2:1 turns ratio allows the circuit to 
supply more than the MAXGSl's usual output current 
without requiring external power transistors. This cir- 
cuit provides as much as 150 mA of output current at 
SV. You can wind the transformer on a 14x8-mm pot 
core, or you can obtain the transformer by ordering the 
standard part number listed in the schematic. 

When the MAX631's Lx switch turns off at each half 



I 



Vour 


u 


MAX631 








QND 





T 



3-2:1.0 TURNS RATIO. 
I 220-nH SECONOARV 

Lli._»lj 1N5817 



1000 pF 
-tt— 



_ 5V. 
~° 150 mA 

SfC 220 ifF 



•AIE MAGNETICS #327.0115 



cycle of its 50-kHz clock, the reflected voltage in the 
transformer's primary generates a 9V supply voltage 
for the MAX631 at the Vqut pin. Operating the 
MAX631 at 9V rather than at the 4.5V provided at the 
inpiQt moreases the gate-source voltage of the internal 
MOSFET, consequently reducing the MOSFETs on- 
resistance. This circuit requires the external feedback 
resistors at Vfb because, unlike the previous circuits, 
this circuit doesn't allow you to use Vqut as the feedback 
input for the regulator. 

Derive 12V from 8 to 15V input 

The simple boost converters of the previous examples 
are inadequate for some battery-powered applications. 
For example, the unregulated output of a 12V sealed 
lead-acid battery varies from worst-case peaks of 15V 
down to as little as 8V when it is deeply disdiarged. 
Therefore, you can't derive a regulated 12V output 
from a 12V lead-acid battery by using a simple boost 
converter, such as one of those illustrated in Figs 1 and 
2, because a boost converter can't accept an input 
voltage that is greater than its output voltage. Con- 
versely, a buck converter can't accept an input voltage 
that's less than its output; therefore, a simple buck 
converter won't work either. A buck/boost converter, 
as the name implies, is a combination of buck and boost 
circuitry that successfully addresses the challenge of 

Text continued on pg 150 



v», 8 TO lev o- 



Vour 


Lx 


LBI 




MAX641 




LBO 


EXT 


SNO 


Vn 



110k 




i k 1N4148 



•GOWANDA ELECTRONICS #28103 



Fig 3 — Thi* simple circuit boosU a supply voltage that might have 
tagged mtbttoHtiaUy because cf IR drops in long cables. 



Fig 4 — A buck/boost converter can accommodate wide input-voltage 
swings, such as the 8 to 1 5V awing typical of a 12V sealed lead-add 
battery. The IX)W BATT outvut indicates when input voltage drops 
below SV. PuUing SHUTDOWN low turns tffthe dmui. 



EDN January 7, 1988 



1-54 



Flyback converters' internal operation 

the accompanying article). When 
EXT is activated, the MOSFET 
turns on and off at the oscillator 



In a flyback converter, voltage 
applied to an inductor or trans- 
former primary via a switch 
causes inductor current to rise 
for a fixed period of time. When 
the voltage is switched off, the 
magnetic field stored in the 
transformer collapses, causing 
the secondary to supply current 
to the load. With the MAX640 
and MAX630 Series devices, this 
switching occurs at 50 kHz. You 
can use these devices to step up 
the voltage, step it down, or in- 
vert it just by changing the con- 
figuration of the switch (transis- 
tor), coil, and steering diode. 

Fig A illustrates the 
MAX64rs internal operation. 
When the output voltage drops 
below the preset (or externally 
set) value, the error comparator 
switches high and connects the 
internal oscillator to the Lx and 
EXT outputs. EXT is typically 
connected to the gate of an ex- 
ternal n-channel power MOSFET 
(although the external MOSFET 
isn't necessary for most of the 
low-power circuits discussed in 



frequency. 

When EXT is high, the 
MOSFET switches on, and the 
inductor current increases line- 
arly, storing energy in the coil. 
When EXT switches the 
MOSFET off, the coil's magnetic 
field collapses, and the voltage 
across the inductor changes po- 
larity. The voltage at the catch 
diode's anode then rises until the 
diode is forward-biased, deliver- 
ing power to the output. As the 
output voltage reaches the de- 
sired level, the error comparator 
inhibits EXT until the load dis- 
charges the output capacitor to a 
point at which the error compa- 
rator connects the oscillator to 
the Lx, and EXT generates out- 
put once again. 

The MAX641 doesn't have a 
ViN pin. Input power to start the 
dc/dc converter is supplied via 
the external inductor (and exter- 
nal diode, if used), to the Vqut 
pin. If you use an external catch 



100k2 




' COMPARXKXI 



I 
I" 



(5V) 



-Lc, 

~ 100 pF 



Fig A — TUm Mock diagram iUustratet the MAXen's operation. For many lew-power 
appUcatiom, tke mtermU MOSFET and Sehottky diode are unnecessary. 



diode, connect its cathode to 
VouT- Once the converter is 
started, it's powered from its 
own output voltage. This boot- 
strap design ensures that the 
external MOSFET has the maxi- 
mum gate drive and, conse- 
quently, the minimum Ron- 

One external component that 
you must select is the inductor. 
Although the inductance of many 
types of coils, such as RF chokes 
and air-core inductors, frequent- 
ly falls in the appropriate range 
for dc/dc converters (50 to 500 
(tH), these inductors typically 
saturate at only a few milliamps 
and therefore are not a good 
choice for your dc/dc-converter 
design. 

A saturated inductor ceases to 
behave as an inductor. It can no 
longer store energy in its mag- 
netic field, so the mechanism 
that normally limits the inductor 
current no longer operates; all 
that limits the current is the se- 
ries resistance. This resistance is 
quite low; consequently, the cur- 
rent can rise to an excessive, 
and possibly destructive, level. 

The scope photo in Fig B 
shows the switch voltage (trace 
A) and inductor-current wave- 
forms (trace B) for an inductor 
that's well on its way to satura- 
tion. Compare these waveforms 
with the normal performance il- 
lustrated in Fig 2b on pg 146. 
The A and B waveforms in both 
photos are of the same A and B 
nodes of the 12V boost circuit in 
Fig 2a. Fig B reflects the ef- 
fects of using an inductor with 
an inadequate current rating in 
Fig 2a's circuit. 

When you look at Fig B, youll 
see that, ia the middle tiie 



mm Jamiary 7, 1988 



1-55 



level, the current waveform's 
slope increases markedly, indi- 
cating the onset of saturation. 
At this point, the effective in- 
ductance of the coil decreases 
because the current through the 
inductor has risen to the satura- 
tion level. The rising edge of the 
switch- voltage waveform is much 
slower in Fig B than in Fig 2b 
because the inadequately rated 
inductor takes several microsec- 
onds to come out of saturation. 

An inductor doesn't saturate 
as long as its operating current 
is less than its rated maximum 
current. At first glance, it would 
seem easy enoi^ to specify the 
maxunum current rating for 
your inductor, but what you 
have to watch out for in your 
dc/dc designs is that the peak 
inductor current is often four to 
six times the converter's average 
current output. In the case of 
flyback converters, this peak 
current flows not just under 
peak load conditions, but each 



on. For this reason, you must 
give careful consideration to the 
current rating of your converter 
circuit's inductor. 

Besides the care required in 
the selection of inductors, anoth- 
er often-overlooked area of con- 
cern in dc/dc-converter design is 
that encompassed by grounding, 
shielding, and bypassing. The 
quality of ground connections is 
key to the performance of dc/dc 
converters. Because the peak 
current in an inductor or switch 
(transistor) can reach several 
amps, you must provide these 
points with very-low-impedance 
paths to the supply common. Fbr 
example, in the inverting circuit 
of Fig 2a, the coil current typi- 
cally exceeds lA. For best re- 
sults, use separate paths to 
ground for the high-current 
paths so that they are separated 
from the chip's power and feed- 
back connections. If you don't 
have the option of separate 
traces, then use as heavy a sin- 



carry the high current back to 
the supply. 

Loop instabilities, caused by 
interactive ground connections 
or stray capacitive pickup, can 
also severely limit Uie perfor- 
mance of an otherwise sound dc/ 
dc-converter design. Some of the 
symptoms of these problems are 
high ripple voltages at the out- 
put, efficiency that's lower than 
expected, and "motorboating," 
or low-frequency oscillation. 

Motorboating occurs when the 
control loop of the dc/dc convert- 
er produces pulses in periodic 
clusters of 10 to 20 pulses rather 
than at more or less random in- 
tervals. Motorboating can be 
caused by one or more of the 
following phenomena: stray pick- 
up at the feedback node, un- 
wanted feedback to the refer- 
ence, and feedback via the 
ground or power-input pin. 

If the cause is stray pickup at 
the feedback node, add a lead 
compensation capacitor (100 to 
1000 pF) from the feedback ter- 
minal or COMP pin to the circuit 
output or reduce the size of your 
connections at the feedback 
input in order to reduce stray 
capacitance to ground. If un- 
wanted feedback to the refer- 
ence is the culprit, bypass the 
reference and power-input pins 
to ground (using 0.1 to 1.0 jiF). 
If your circuit is suffering from 
feedback via the ground or pow- 
er-input pin, bypass the power- 
supply input (1.0 to 10.0 |iF). 
You should also separate high- 
ground-currrat connections from 
the reference, feedback, chip- 
ground, and chip-power connec- 
tions. 



A 



B 




TRACE 


HORIZONTAL 


VERTICAL 


A 


5 ,iSEC/DIV 


5v;div 


B 


5 ,;SEC/DIV 


5A;div 



Fig B — The marked imertate in the eurrent vmieform'x slope (trace B) iUuttratee the 
onset of saturation for an inductor with an inadequate current rating. Trace A 
reprenenie switch voUage. 



EDN January 7, 1988 



T 



Ibu must sometimes develop 5V from a 
nomimd 5V ii^ta timt has sagged became 
of IK drop m Un^ pomr-distributim 
lines. 



the wide input-voltage swing associated with the sealed 
lead-acid battery. 

The circuit of Fig 4 is a buck/boost converter that 
provides 100 mA at 12V and accepts 8 to 16V inputs. 
Both ends of the circuit's inductor are switched by 
separate power MOSFETs, which the MAX641 drives 
directly via its Lx and and EXT outputs. These outputs 
operate out of phase, so the p- and n-channel FETs turn 
on at the same time. When both the n- and p-channel 
FETs turn o£r, the two Schottky diodes steer the coil's 
discharge current to the 12V output. A slight drawback 
of this circuit is that the converter's efficiency is less 
than that of a pure buck or boost converter, because the 
two MOSFETs and two diodes increase losses in the 
charge and discharge current paths. Nevertheless, the 
circuit still delivers 100 mA at a respectable 70% 
efficiency figure. 

An additional benefit of this type of circuit is that you 
can control its operation with a 'TTL-level signal. Over- 
riding the Vfb input with a high-level TTL signal (such 
as the diode-coiqiled inverter output in Fig 4) fools the 
MAX64r8 mtemal feedback dreoitry into thinking that 
the output is too high, so the chip turns off both 
MOSFETs. The circuit's idle current is around 400 jjlA. 

Obtain SOV from a 12V supply 

If you need to generate voltages higher than the 5 
and 12 V levels of the circuits shown in Figs 1 through 4, 
consider a configuration such as the one shown in Fig 5. 
It provides a SOV output from a 12V input and is 
simpler than Fig 4's circuit: Because the output is 
higher than the input, a simple boost configuration 
suffices. 



Van 

MAX641 



EXT 
V»» 



T 



1N4935 



■eOWANDA ELfCTRONICS *2B103 



■ 'I 



SOV. SOmA 

— — o 



6SuF 
lOOV 



Fig 5— Only the power MOSFET, catch diode, and ouiput-fUter 
eapaeUor need to leithxtand high voitaget in this SOV supply air- 
euit 



The circuit uses an 1RF530 n-channel MOSFET in 
conjunction with a MAX641 dc/dc controller. In this 
circuit, the SOV output is not connected directly back to 
the VouT pin because that pin has a maximum voltage 
rating of 18V. The circuit uses an external resistive 
divider network to provide feedback to the Vfb input. 
The VouT pin obtains power for the MAX641 directly 
from the 12V supply. The only components that must 
withstand high voltages are the MOSFET, the steering 
diode, and the output filter capacitor: Th^re rated at 
lOOV, 200V, and lOOV, respectively. 

A different twist to high-voltage dc/dc conversion is 
the requirement to power low-voltage logic circuitry 
from a high-voltage source — for instance, the telephone 
system's -48V battery voltage. The circuit of Fig 6 
uses a basic boost configuration to convert -48V to SV. 
A small-signal, high-voltage pnp transistor shifts the 
feedback signal from the SV output to the MAX641, 
whose ground terminal (pin 3) is tied to the -i-iSV 
input. The output, at 5V with respect to ground, forces 
about 43 ^lA through the 100-kn sense resistor and the 
emitter of the 2N5401. This current is sent through the 
30-kn input resistor'at Vfb, placing this pin 1.3V almve 
the ground pin (or at —46.7V). Because the internal 
reference of the MAX641 is a 1.3V bandgap reference, 
the 1.3V bias level at the feedback input closes the 
feedback loop. 

This biasing scheme allows the EXT output to direct- 
ly drive the n-channel MOSFET, switching the inductor 
to the -48V input without level shifting of the 
MOSFET's drive signal. The 330-pF capacitor provides 
feedforward compensation, which stabilizes the regula- 



1N4106 



VouT 

MAX641 



EXT 



aoK 




DALE #TE-3 04. 3 mH 



Fig S — Telecomm applicatioiu often require you to develop your 
logic-level supply from -iS^. Suitable for such appliaUians, this 
circait delivers SV at 500 mA. 



EDN January 7, 1968 



A buck/boost converter can deal with the 
wide input-voltage swirigs associated with 
sealed lead-acid batteries. 




Fig 7— This circuit (a) provides SO mA at 15V with an isolation rating of 500V— a function of the transformer and opto-isolator. In the scope 
photo (b), traces A, B, and C represent the switch voltage, primary current, and output-voUage ripple. 



tor's control loop and improves the regulator's tran- 
sient-load re^awe. 

Generating an isolated supply 

In large analog systems and in industrial-control 
systems, you must often provide power that is electri- 
cally isolated from the main system's power source. 
This isolation is necessary to prevent ground loops, to 
protect measurement hardware from dangerous volt- 
ages, and to reject common-mode signals. The circuit in 
Fig 7a generates a regulated 15V, 50-mA output that is 
fiilly isolated from the 12V input supply. The circuit's 
output power is supplied by a 14x8-nmi pot-core trans- 
former, and the feedback signal returns to the uniso- 
lated side of the circuit via an opto-isolator. 

Although the peak primary current of the transform- 
er is within the ratings of the MAX641 converter IC's 
internal switch, you must use an external transistor to 
drive the transformer. The reason you need this exter- 
nal transistor is that when the transistor turns off, the 
15V secondary voltage is reflected to the primary, 
placing 30V across the transistor. This 30V exceeds the 
MAX641's 18V rating. The transformer primary's volt- 
age, current, and ripple voltage are illustrated in traces 
A, B, and C, respectively, of the Fig 7b scope photo. 

To transmit the feedback signal across the isolation 
barrier, the 15V output is divided and compared with 



the 2.75V reference of a TL431 shunt regulator. When 
the voltage at the TL43rs reference input exceeds 
2.75V, the TL431 draws current through the opto- 
isolator's photodiode. The opto-isolator's transistor 
then pulls the COMP input of the MAX641 high, 
turning off the EXT output. The COMP input connects 
to the MAX64rs internal voltage divider, and thus the 
opto-isolator's transistor can control the MAX641. The 
components specified in Fig 7a provide an isolation 
rating of 500V. BM 



Author's biography 



Leonard H Sherman is a senior mem- 
ber of the technical staff at Maxim In- 
tegrated Products in Sunnyvale, CA. 
Leonard recrired his BSEE from MIT. 
and he has one patent to his credit. 
Leonard enjoys playing volleyball and 
collecting old hi-fi equipment in his 
spare time. 




EDN January 7, 1988 



other Power Supply Circuits 

Extending The Voltage Rating Of The MAX680 2-3 

Regulated Charge Pump Delivers 50mA 2-4 

Paralleling MAX680 Charge Pumps 2-5 

Paralleling ICL7660s 2-5 

Combined Positive Supply Multiplication and Negative Voltage Conversion 2-5 

±5V Regulated Supplies From A Single 3V Battery 2-6 

Positive and Negative 0.5A Boosted Regulators 2-6 

±5V Power Supply Using One 9V Battery 2-7 

Supervisory Circuit Monitors 2 Voltages 2-7 

Power Supply Fault Monitors 2-8 

Conabination Low Battery Warning and Low Battery Disconnect 2-8 

CMOS Regulators Operate with High Input Voltage 2-9 

Low Drop-Out Regulator 2-9 

Ultra Low Drop-Out Regulator ' 2-10 

Power Fail Warning and Power-Up/Down Reset 2-11 

AC Power Fail and Brownout Detector 2-11 

Simple High/Low Temperature Alarm . . 2-12 

3 State Battery Indicator 2-12 

Battery Switchover Circuit 2-13 

AC To DC Regulators 2-14 

Triac Control Powered From MAX61 1 2-16 

Optically-Isolated 20A Load Pulser 2-17 

MakelCL7660RunOn 10nA 2-18 

Analog Supervisory Chip Keeps Microprocessor Out of Trouble 2-20 

Transistor Powers Low-Drop Out Regulator 2-24 



2-1 



2-2 



Mx^iMl Th0 Vottmgm Kmlhiig OIThe MAXeao 



You can extend the voltage output of the MAX680 by 
almost 100% and not exceed electrical limits. Figure 2-1 
and 2-2 show how 5V can be turned into ±14.5 or ±1 9.5V 
respectively all without the use of inductors. 

In conventional applications, the MAX680 converts to 
±10V by first doubling +5V to +10V and then inverting 
+1 OV to -1 OV. In this application the normal switched cap 
charge pump operation is followed by a doubler section 
for ±1 9.5V or 1 /2 doubler section for ±1 4.5V outputs. The 
diodes must be able to switch in the range of 25ns. 

The graph shows the output voltage vs. output current 
for both ±19V and ±15V with silicon or schottky diodes- 
Voltage conversion efficiency is better than 95% with no 
load. 





Vbc 


V* 


Cl* 




C2* 




cr 


MAXm 










V 




TT— AJIcapsarelOuf 
J} AII<lio(lesaie{N4t4aoibeget 



Figure 2-2. 



11_3 





vcc 


Vt 






cr 






AMXEM 

MAxeeo 


Cl* 








V 



Figure 2-1. 



J- 



AllapsarelOuF 
AII(llalesaalN5817 



OUTPUT VCH.TACEVS. OUTPUT 
CURRENT FROM V» TO V- 




LI»0CUHI8(r(in«) 



Figure 2-3. 



2-3 



A +10V 50mA regulated charge pump can be con- 
structed from the MAX641 and MAX628 IC's. 

The MAX641 has an internal oscillator that operates at 
50kHz and is modulated at EXT for regulation. This pin can 
be used to drive the inputs of the MAX628 power inverter, 
and buffer. The outputs of these drivers are used to drive 
the doubler circuity. The driver outputs are 180° out of 
phase to each other. CI charges up from D1 when the 
MAX628 pin 7 is at ground. At the same time the C2 cap 
is discharging through the diode D3 into cap C3 when pin 
5 is at 5V. In the other half cycle when pin 7 is at +5V cap 
CI discharges through D2 into cap C2 because pin 5 is 
now at Ground. With this alternating action the cap C3 is 
recharged every 20|iis. 

For a 50mA output the caps need to have a low ESR 
such as tantalum and the diodes need to be Schottkys. 
Theferrite bead is needed to keep the spiking down. 

The output waveform with a 50mA load is shown below. 
Figure 2-6 shows the conversion efficiency the circuit for 
5V in and 10V out. Output voltages up to 15V can be 
supplied with less output current. The output voltage is 
determined by the equation below. 



Ri = R2 { 



Vqut 
1.31V 



-1) 





Ven20mV/(Iiv 
Horu!S(lvis/Uiv 



Figure 2-5. Output Noise with 50 mA Load 



MAX641 REGULATED CHARGE PUMP STEPUP 
CONVERTER EFFICIENCY 





































va-5V 
voui=iov 



























































































Figure 2-6. 



20 30 40 

UMOCUHIBITImA) 



[ 3 I 8 AacM>S/K10|lfTiWrrMjUtt 



Rgure2-4. 



2-4 



PmralMUis MAXeso Charge Pump* 



Paralleling multiple MAX680s reduces the output resis- 
tance of both the positive and negative converters. The 
effective output resistance is the output resistance of a 
single device divided by the number of devices. As 
illustrated, each MAX680 requires separate pump 
capacitors CI and C2, but all can share a single set of 
reservoir capacitors at V+ and V-. 



Cl- 


Vt 

cu 


C2- 


mm 


V- 







01- 


V. 


C24 


cu 


J 

C2- 


uum vcc 


»- 


6ND 





^22|if 



2*f 1 



VCCIK 
GNO 



Figure 2-7. 



Paralleling multiple ICL7660's reduces the output resis- 
tance. Each device requires its own pump capacitor CI, 
however the reservoir capacitor, C2, serves all devices. 
Tlie equation for calculating output resistance is shown. 

Rout (of ICL7660) 



ROUT = 



n (number of devices) 



ICL7660 
CAP* 

GND ^ 

CAP- VOUT 



T ^ " 



„.„ 10.7660 

CAP+ . 

n 

GND 

CAP- Voul - 



7T 



Figure 2-8. 



. eolfibftwtf PsiflMw Suptfi^ Mli»||Mie«ttMi and NmgmOvB Viofia«e Convarslon 



Tliis dual function is illustrated in Figure 2-9. In this 
circuit, capacitors 01 and 03 perform the pump and reser- 
voir functions respectively to generate a negative voltage. 
Capacitors 02 and 04 are pump and reservoir capacitors 
for the multiplied positive voltage. This configuration, how- 
ever, does lead to higher source impedances of the 
generated supplies. Due to the finite impedance of the 
common charge pump driver. 

The output voltages are: 

+OUT = 2ViN - 2Vfd 

-OLrr=-viN 

where Vfd is the forward voltage of diode D1 and D2. 




2-5 



±SV Regulated Supplies From A &ngle 3V Battery 



This circuit shows a complete ±5V power supply using 
one 3V battery. The MAX680 provides +6V at V which is 
regulated to +5V by the MAX666 and -6V which is regu- 
lated to -5V by the MAX664. The MAX 666 and MAX664 are 
pre-trimmed and require no external setting resistors, min- 
imizing parts count. The combined quiescent current of 
the MAX680, MAX663, and MAX664 is less than 500nA, 
while the output current capability is 5mA. The input to the 
MAX680 can vary from 3V to 6V without appreciably affect- 



ing regulation. With higher input voltage, more current can 
be drawn from the outputs of the MAX680. With 5V at Vcc, 
10mA can be drawn from both regulated outputs simul- 
taneously. Assuming 150Q source resistance for both 
converters, with (IL* + IL) = 20mA, the positive charge 
pump will droop 3V, providing +7V for the negative charge 
pump. The negative charge pump will droop another 1 .5V 
due to its 10mA load, leaving -5.5V at V-. sufficient to 
maintain regulation for tfie MAX664 at tfiis current. 



100||F 



JT 

lOOtif ^ 



Figure 2-10. 



ioomf: 



cr 


vtc 


CI' 




V 


C2* 


MAXSSO 








cr 


GND 



tavF: 



d= 01|iF 



MUOOM 

vm vouT 
m> sat vsEi 



GND SDN VSET 



Vout! 



;iOMf 



—j_ GND 



1tlMf 



Po^wm fuicf; Jici^tf 0>itA iBocwted Regulatora 



SHUTDOWN 



MM663 Voim 



SHDN SENSE 
GND tfSEI 




100Q 



I 



lOiiF 



*5V OUTPUT 
0.5A 



lOnF 



SHOD 


GND 




VSET 


MJDOM 


VOUTI 


MAxem 






V0UT3 




SENSE 


ViN 





IOmF 



-5V OUTPUT 
5A 



Figure 2-11. Positive Regulator Witt) Boosted Output, Current 
Limit, and Low Iq Shutdown 



Figure 2-12. Negative Regulator With Boosted Output and Low 
la Shutdown 



2-6 



±syPpw9r Supiify Using One 9VMtatt9nf 



The ICL7660 converts the +9V battery voltage to -9V. 
The MAX666 and MAX664 regulate the ±9V to ±5V w/hile 
the MAX666 also monitors the 9V battery voltage and 
issues a Low Battery warning signal when the battery 
nears rts end of life. 

The MAX666 and MAX664 draw less than 12|iA maxi- 
mum operating current each, while the ICL7660 typically 



draws IIOnA. For low negative output currents, the 
ICL7660's operating current can be reduced by adding 
an external capacitor at OSC, pin 7, to lower the internal 
oscillator frequency. With a 1 kHz oscillator frequency, the 
ICL7@60 typically draws 40nA. 



^ sv 

1 



R1 

2.m 



u 




ISO 




SENSE 


Vm 


A/uaajM VDur 
MWSSS 


LBI 


GND SHDN Vsn 



2 RCL 

VW- 

18Q 




Figure 2-13. 



Supervisorjf Circuit Monitors 2 VMmgot 




Figure 2-14. 



2-7 



Po¥mr SuM^ FmM MoiMol* 




OVER 
VOLTAGE 
DETECTOR 
Vu»5.5SV 
Vl-5.«V 



0UT1 GND 0UT5 



7.5M ■ 
•5* ' 



UNDER VOLTAGE 
DETECTOR 
Vu- 4.55V 
Vf4.«V 



' OK 



27* 

*SV -Wvn 



HVST2 HVSTI 

S6T2 stri 

0UT2 GND OUTt 



Figure 2- 15. Fault Monitor tor a SIrtgle Supply 



Figure 2- 16. Multiple Supply Fault Monitor tor±SVancl± 1SV 



.ConMmtlon Low Bmtteiy Wmmkig tmd Lam Bmtteey 



Nickel Cadmium (NiCad) batteries are excellent 
rechargeable power sources for portable equipment, but 
care must be taken to ensure that NiCad batteries are not 
damaged by overcharge. Specifically, a NiCad battery 
should not be discharged to the point where the polarity 
of lowest capacity cell Is reversed and that cell is reverse 
charged by the higher capacity cells. This reverse charg- 
ing dramatically reduces the life of a NiCad battery. This 
circuit both prevents reverse charging and also gives a 
low battery warning. The typical low battery warning 



voltage is 1V per cell. Since a NiCad "9V" battery is 
ordinarily made up of 6 cells with a nominal voltage of 
7.2V, a low battery warning of 6V , with a small hysteresis 
of 100mV, is appropriate. To prevent over discharge of 
the battery, the load should be disconnected when the 
battery voltage falls to 1V x (n-1), where N = number of 
cells. In this case, low battery load disconnect occurs at 
SV. Since the battery voltage rises when the load Is 
disconnected, 800mV of hysteresis is used to prevent 
repeated on-off cycling. 



6 570k; 

MCAO — 
CELLS - 



HYSTl 


Vt 


HyST2 


SET! 




SET2 




0UT1 


GND 


0UT2 



1 JJ 



■ 720* > <M 



LOWSATTaVSHUTOmm 



2N4237 



VlH 


0UT1 


0UT2 

SENSE 


SHUID(MN 






GND 



' tSVAM 



Figure 2-17. 



2-8 



<Sllff OS Aeiwiatoiv Opemj^ with fffsli l^iHft Voftaige 



The MAX666 linear regulator/low battery detector is 
ideal for many battery powered applications since both its 
quiescent and operating supply current are 12nA maxi- 
mum, independent of output current. This low current is 
possible through the use of CMOS circuitry. In some 
applications, however, the 1 6.5V maximum operating volt- 
age of the MAX666 would be exceeded. 

Here, an external N-channel JFET in a cascode con- 
figuration increases the voltage handling capability of the 
circuit to the drain-gate breakdown voltage of the FET. 

For example, with the J 106 FET, up to 25V input can be 
applied. The J106 has 6 ohms on resistance, and the 
minimum input-output differential of the MAX666 is 0.6V to 
0.8V, so the MAX666 plus J 106 combination circuit can 
deliver +5V output with input voltages as low as 5.6V for 
very low currents, and 6.25V for up to 40mA of current. 

Using a 30Q. ON- resistance 2N4391 to replace the 
J 106 increases the maximum allowable input voltage to 
40V, while increasing the minimum input-output differen- 
tial to 2V at 40mA, or 1 V with 1 0mA output current. Operat- 
ing current is 12nA maximum, independent of ©ytput 
current. 



VOLTAGE 



VIN 


VOUT 


SHUTDOWN 


SENSE 


l^jl MAX666 




VSET 


IBO 


GND 





am. 



Q1=J106FORV|N = 6.25VT025V 
= 2N4391 F0RV|N=7VT040V 



Figure 2-18. 



Low Drop-Out Regulator 



A CMOS monolithic regulator combined with an exter- 
nal PNP transistor, forms a very low drop-out regulator. 
The composite regulator can supply several hundred 
milliamps at 5V from an input as low as 5.3V. Such low 
drop-out performance suits battery-powered applica- 
tions, because it extends the useful life of batteries having 
sloping discharge curves, such as sealed lead-acid and 
lithium batteries. 

The monolithic regulator derives its supply current from 
the base circuit of the external PNP transistor. The feed- 
bac)<-resistor ratio sets tf>e output voltage: 

VoUT= 1.3Vx(R1+R2)/R1. 

If the output-voltage feedback to the chip's Vset input 
is below the bandgap-reference voltage (1 .3V), the supp- 
ly current into Vin (the PNP transistor's base current) 
increases. The transistor multiplies this base current by 
beta and delivers it to the load. The circuit's quiescent 
current is a function of the transistor's beta and load 
current. 

When there's no load, the quiescent is typically 10|iA. 
For larger load currents, the quiescent current is simply 
the load current divided by the transistor's beta. When 
you enable the chip's shut-down input, the circuit con- 
sumes 6mA typ. R4 supplies current to the chip under 
no-load conditions. 



R3 limits the transistor's base current. The chip's Vout 
pin will try to raise its voltage level to that of the Vin pin 
when the output voltage of the chip is low. Reducing R3 
has the effect of supplying larger base current to the 
external transistor. 

You can substitute a 2N2945 for the 2N2907 shown in 
Figure 2-19. With this substitution, the circuit supply a 5V, 
100mA output from a 5.1V input. 



SHUTDOWN 5 


SHDN 






Vin 














1 


SENSE 


ADO 
















2 


Vout 






VSEI 












> R3 




GND 






> Ik 




4 




















Figure 2-19. 



g*9 



Ill 



UlUm Low Drop-out l^gulmlor 



All commercialiy available low drop-out positive voltage 
regulators uses PNP bipolar transistors as pass transistors 
because they are easy to drive. The voltage on the base 
is lower than the output voltage so one can completely 
saturate the pass transistor (less than 0.4V drop). On the 
other hand the drop through the pass element of an NPN 
output stage will always be higher than the VBE(sat) drop 
(1.2V min), as there is generally no higher voltage avail- 
abiie than tiie input voltage. 

The best pass transistor (i.e. with the lowest ON resis- 
tance) would be an N channel MOSFET (Vdrop=Iout 
Ron), but we then have to generate a Vgs voltage that is 
higher than the output voltage by at least 3 to 4V, depend- 
ing on the output current. 

To achieve that, this design uses a MAX680, that 
generate +10V from a +5V input. It supplies a MAX666, 
CMOS positive voltage regulator, that drives an N-channel 
Logic Level FET (RFP25N06L). As the MAX666 supply 
current is very low {^Q^^A), the drop through the voltage 
doubler is very low and so the output of the MAXesO is 
twice the input voltage (10V in the case of a 5V regulator), 
sufficient to drive the power MOSFET. 



The output witage is set by the feedbacl< resistors R1 

and R2 

V0UT=1.3vi5^ 

R3 prevents the MOSFET gate from floating when the 
regulator is OFF. With a 500mA load, the drop-out voltage 
is only lOOmV, and the quiescent current is typically 
1mA, thanl<s to the CMOS technology of the fOlaxim's 
MAX666 and MAX680. 

The MAX666 incorporates a low battery detector, 
whose output (LBO) goes low when the voltage at LBI 
goes below 1.3V. This may be used to detect pass 
MOSFET saturation, when Vin is less than VouT -nlOOmV. 
This detector may also be used as shown here, to shut 
down the MAX666 when an overvoltage occurs. When the 
input voltage will go above the voltage level set by R5 and 
R6, LBO, tied to the shutdown input SHDN, goes high and 
shuts down the MAX666 and, prevents excessive dissipa- 
tion for the pass transistor. R7 provides current to flow 
through the MAXesO inthat c^e. 



Vcc: min = V(XjT*100mV 



01 

RFP25N06L 





Vin 




VOUT 




SHDN 
LBO 




SENSE 


IC2 

UAxeee 


LBI 


em 


VSET 



R1 
' 390K 



Figure 2-20. A monolithic charge pump doubler IC 1 generates a voltage high enough to efficiently drive a power MOSFET Q 1, used 
as the pass element in an ultra-low dropout positive voltage regulator. 



2-10 



vvnen xne unreguiaiea uo inpui voiiagtj laiis ueiow o.uv, 
the Power Fail Warning signai goes high. The 7805 wlli 
continue to suppiy +5V for a short period of time, drawing 
Its power from the 4700|iF filter capacitor, This gives the 
M-P time to save data In CMOS RAM or EEPROM and to 
perform an orderly system shutdown. Since the 7805 will 
deliver a 5V output until its input voltage falls to 7.3V, the 
7805 will provide 1 A for at least 3.5ms. 

When the 5V output falls below 4.5V, the Reset or Write 
Enable output from the ICL7665 goes low. This signal can 
be used to reset the nP on power-up, or to gate off the 
Write and Chip Enable signals to EEPROM and CMOS 

RAM during power-down. 

The ICL7665A 0UT2 is set to trip when the 5V output 
has decayed to 3.9V. This output can be used to prevent 
the microprocessor from writing spurious data to a CMOS 
memory, or can be used to activate a battery backup 
system. 



4700 



715k 









HYST1 




HYST2 










ICL7665 




SET1 




SET2 


0UT1 


GND 


0UT2 



Figure 2-21. 




^ RESET 
10k< OR 

> VmiTESMLE 



AC Power Fall and BtwHoioot Detaetor 



By monitoring the secondary of the transformer, this 
circuit performs AC power failure warning. With a normal 
1 10VAC input to the transformer, 0UT1 will discharge CI 
every 16.7ms when the peak transformer secondary volt- 
age exceeds 1 0.2V. When the 1 1 0VAC power line voltage 
is either interrupted or reduced so that the peak voltage 
is less than 10.2V, CI will be charged through R1 . OUT2, 
the Power Fail Warning output, goes high when the voltage 
on CI reaches 1.3V. The time constant R1 x CI deter- 
mines the delay time before the Power Fail Warning signal 
is activated, in this case 42ms or 2 1/2 line cycles. Op- 
tional components R2, R3 and 01 add hysteresis by 
increasing the peak secondary voltage required to dis- 
charge CI once the Power Fail Warning is active. 



tlOVAC 
MHz 




7805 
5V 

REGULATOR 




R1 ; 
130k; 



POWER 
FAl 

WAMNB 



Figure 2-22. 



2-11 



A simple high/low temperature alarm uses a low cost 
NPN transistor as the sensor arid an ICL7665 as the 
high/low detector. The NPN transistor and potentiometer 
R1 form a Vbe multiplier whose output voltage is deter- 
mined by the Vbe of the transistor and the position of R1's 
wiper arm. The voltage at the top of R 1 will have a tempera- 
ture coefficient of approximately -5mV/°C. R1 is set so that 
the voltage at SET2 is equal to the SET2 trip voltage when 
the temperature selected for the high temperature alarm 
desired. R2 can be adjusted so that the voltage at SET1 is 
1 .3V when the NPN transistor's temperatue reaches the low 
temperature limit. 




Figures-^. 



.3 &tam Battery ImH^Oar 



!fLEO >130k >130k >1M 



Vbatt>2.8VLED0N 
VBAn< 2.35V LED OFF 
2.8V >VBATT> 2.35V LED 



SET1 




SET2 


ICL7665 




HYST1 




0UT1 

m 


0UI2 



I 



Figure 2-24. 



This circuit performs two functions: switching the power 
supply of a CMOS memory to a bacl<up battery when the 
line-powered supply is turned off, and lighting a low-bat- 
tery-warning LED when the backup battery is nearly dis- 
charged. The PNP transistor, Q1, connects the 
line-powered +5V to the CMOS memory whenever the 
line-powered +5V supply voltage is greater than 3.5V. 
The voltage drop across Q1 will only be a couple of 
ifeundred mV since it will be saturated . Whenever the input 
voltage falls below 3.5V. 0UT1 goes high, turns off Q1 
and connects the 3V lithium cell to the CMOS memory. 



The second voltage detector of the ICL7665 monitors 
the voltage of the lithium cell. If the battery voltage falls 
below 2.6V, 0UT2 goes low and the low-battery-warning 
LED turns on (assuming that the +5V is present, of course). 

Another possible use for the second section of the 
ICL7665 is the detection of the input voltage falling below 
4.5V. This signal could then be used to prevent the 
microprocessor from writing spurious data to the CMOS 
memory while its power supply voltage Is outside its 
guaranteed operating range. 




3V 

LITHIUM 
CELL 



FigurB 2-25. Battery Switchover Circuit 



2^3 



AC To DC RBBVk^tMV 



Simple Line-Powered 5V Supply 

Figure 2-26 shows a 50mA, 5V power supply using tine 
fuil wave MAX610. Typicai component values for both 
1 1 0VAC and 220V AC 50/60Hz operation are shown, if less 
than 50mA of output current is needed, the value of CI can 
be reduced. For 5V at 35mA from a 1 10V AC input, C1 = 
^^lF. If only 15mA is needed then 0.47|xF will suffice. The 
MAX610/61 1/612 will not reliably supply more than 50mA. 

The output of this power supply is NOT ISOLATED from 
the power line: the MAX61 and any equipment powered 
by the MAX610 must be enclosed to avoid shock 
hazards. To avoid a second potential shock hazard, in- 
clude the optional 1 MQ. resistor shown in dotted lines. This 
resistor will discharge the voltage left on 01 when the 
1 10/220VAC is disconnected. 

110/220VAC to SV, Half Wave Hectiflcation 

Figure 2-27 shows a 50mA 5V power supply using the 
half wave MAX61 1 . The circuit differs from Figure 2-26 in 
that the 5V output is referenced to one side of the 1 1 0VAC 
power line. This circuit is generally preferred for systems 
that control triacs, where it is desired to have V- connected 
to the power line. Note that for a given amount of output 
current, the value of CI must be twice the value used in full 
wave circuit of Figure 2-26, As with all MAX610 family 
circuits that do not use a transformer to isolate the circuit, 
this circuit is NOT ISOLATED from the power line. 

Minimum Component Count SV, 10mA Power Supply 

For output currents of less than 10mA capacitor CI of 
Figure 2-26 can be omitted, resulting in the circuit shown 
in Figure 2-28. The available output current is determined 
by the value of R1. For example, with R1 = 8,2kQ, the 
available output current is 1 0mA, while the power dissipa- 
tion in R1 is 1.3W. Double both the resistance value and 
the wattage rating of R1 for use with 220VAG input. 



Rl CI* 
47 2,7liF 
1/2W 150VRMS 



11 A/AC 

eoHz 



1M 



m- 



AC1 


VOUT 


men 


VSENSE 


N/C 


ouv 


BO 




V- 


v+ 



• FOR 220VAC 50Hz INPUT: 

Buioon.iw 

C1 = 18mF,280VRMS 

FOR 220VAC 60Hz INPUT: 
B1 = lOOQ, 1W 
C1 = li|iF,2 



1 



TOuP 

■ BSet 



Figure 2-27. 1 10/220 VAC to 5V, Half Wave Rectification 




AC1 


VOUT 


VSENSE 


MAX610 


MS 




m 


VSET V- 


Vt 




7uf 



Rl' CI 

47 1.Sl 

isovSms 



117VA0 
80Hz 




• FOR 220VAC50H2 INPUT: 
Rl.lOOn, 1W 
C1 = lnF,280VRMS 

FOR 220VAC60HZ INPUT: 

Ri>iecn.iw 



Figure 2-28. Minimum Component Count 5V, 10mA Supply 



Figure 2-26. Simple Line-Powered 5V Supply 



removed the NiCad battery will supply current through 
diode D1, and MAX610 output will remain a constant 5V. 
The MAX610 will continue to deliver 5V out until V is 
approximately 5.8V and the battery voltage is ap- 
proximately 6.5V. Alkaline 9V or NiCad 8.4V batteries are 
also suitable; R2 should not be used with the non-rechar- 
geable 9V alkaline battery. 

Polarity Insensitive Battery Powered Supply 

Figure 2-30 shows a -i-5V power supply which will work 
even if the battery is installed backwards: the full wave 
bridge rectifier of the MAX612 is well suited for battery 
powered circuits since its quiescent current is only 70^^A. 
The M AX6 1 can also be used if the battery vol^ge is less 
than 10V. 



-» 



VSET V- Vt 



2 

-'I 1+ 



lOuF 



VOUT' 

IVBATTBIYI-O^V 



Battery Charger 

The -f6.7V open circuit or float voltage of Figure 2-31 is 
set by R2 and f^3; the maximum charging current of 60mA 
is set by the value of CI . Since, unlike transformer driven 
battery chargers, CI conducts current throughout most of 
each line cycle, the ratio of the RiVIS charging current to 
the average charging current is only about 1.2;1, and 
capacitor C2 is optional. 

Iavg(max) = ViN X 5.56 fiN X C (maximum ctiarging 

current) 

fiN = Input Frequency 
Irms = 1.2 Iavg; without C2 
Irms = Iavg; with C2 

The half wave MAX61 1 can also be used in this circuit, 
but the value of 01 must be doubled and the ratio of RMS 
current to average current increases to about 1.7:1. 



R1 01 
1/2W 175VRMS 



117VAC 

em 

INPUT 



IM 



ACl 


VOUT 




VSENSE 


MAX610 




AC2 


oDv 


VSET 




V- 


Vt 



C2 . 
W 



/V7 /TV 



UNINTEB- 
flUFTABlE 
+SVPC 
OUTPUT 



. R2- 
. 1.8k 



7.2V 

NICAD BATTERY 



Figure 2-30, Polarity Insensitive BSttery-Powered Supply 



R1 CI 
47 15uF 
1/2W 150VRMS 




Figur0-2-31. Simple Battery Charger 



Figure 2-29. Uninterruptable 5V Power Supply 



2-15 



Triae Confrof Powmred From WUkXei 1 



Note that V- is tied to the same point as one side of the 
power line and the MT1 of the triac. The 12V output at the 
MAX61 1 V+ is used to provide a high level drive for the 
triAc gate. The OUV output can be used to disable the triac 
whenever the 5V output falls below 4.65V. This puts the 
triac into the OFF state during brown-outs, power-up and 
power-down. 



47 

1/2W 



CI 
2.7Mf 



n7V»c 
POWER 
UK 



1M 



AC 
LOAD 



TO 

AC LOAD 



AC1 


vour 




«BISE 


ha; 


OUV 


RD 




V- 





I 1 L^VW- 



6 I . CONTROL 
' LOGIC 



5V 

LOGIC 
LEVEL 



LEVEL SHIFTER 
OR OPEN 
COLLECTOR 
BUFFER SUCH 
ASMC14504 
ORMMMC907 



Figure 2-32. 



2-16 



This power switching circuit can be built into a handy 
piece of portable lab gear for testing power devices and 
equipment. It can be used to generate an on/oft switching 
signal to test load transient response tinnes, transformer 
characteristics, or to control small DC motors or similar 
loads. A power N-channel MOSFET is controlled by an 
external logic signal such as a function generator; when 
the input is at a logic "high", the MOSFET is ON and has a 
resistance of less than 0.1Q. 

Optical Isolation, provided by a common 4N26 op- 
tocoupler, allows the MOSFET source to be tied to a voltage 
other than ground. The degree of Isolation will be deter- 
mined by transformer winding insulation in the power supp- 
ly, which is rated at 5CX)V (the optocoupler has an order of 
magnitude higher rating). Isolation gives nearly complete 
flexibility for DC loads; as long as the MOSFET D-S and 
D-G voltage ratings are observed, one can have a +500V 
difference between the logic input and MOSFET outputs. 

Switching speeds are shown in the photo ; with 6 Amps 
of load current, the output will respond in less than 20jiS. 
Faster response can be realized by using a high speed 
optocoupler (for example: an HP6N138), and by adding 
collector base anti-saturation clamps (schottky diodes) to 
the input inverter transistor and phototransistor. 

The pulser was built in a 2.5" by 5" by 4" enclosure using 
isolated BNC and banana jacks for I/O connections. 




TRACEA=2AMPS/0I 



TRACFB-aHOW 



TRACEA.LOAOCURHNT 
IWEB.LOSIC INPUT 



Figure 2-33. 




Figure 2-34. 



iM» ICLTSAi mm On 4fl|i4 



You can improve the efficiency of an ICL7660 voltage- 
conversion circuit by lowering the oscillator frequency and 
increasing the external capacitor values. Though useful for 
modest levels of lo, this technique is not clearly described 
in the data sheet. 

The ICL7660's conversion efficiency depends on its 
quiescent supply current, which in turn depends on the 
internal charge pump's drive frequency. The chip's oscil- 
lator and divide-by-two circuit normally sets the frequency 
between 4 and 5kHz. Using the recommended lOnF 
values for the flying capacitor and the reservoir capacitor, 
this configuration consumes about 70nA of quiescent 
supply current uiiils \^m^iti§ & cmmm\(S&f0 2Qm^ of 
output current. 

Increasing the frequency by overiding the oscillator with 
an externally applied signal causes a proportional increase 
in the quiescent current. Or, connecting an external oscil- 
lator capacitor to pin 7 (Figure 2-38) slows the oscillator, 



causing supply current to approach a minimum value of 
about IOmA at 40Hz (Figure 2-37). 

Slowing the oscillator improves the efficiency, but to 
avoid acorresponding increase in the output ripple voltage 
you must also make an inversely proportional change in 
the values of the external flying capacitor and reservoir 
capacitor. For example, setting the oscillator to 400Hz by 
connecting lOOpFto pin 7 requires 100|iFforthe flying and 
reservoir capacitor. Such an arrangement still provides 
20mA of output current but consumes only one fifth the 
quiescent current (15|iA). 

Note that you can reduce the capacitor values if lower 
lo is allowed. Setting the oscillator to 40Hz, for example, 
(by connecting lOOOpF to pin 7) provides the highest 
efficiency possible. Leaving the flying and reservoir 
capacitors at 100|iF gives a maximum low of 2mA, a 
no-load quiescent current of 10nA, and a power conversion 
efficiency of 98%. 









cumw 




X 

(MPACfflWCE 









! 

s 



4K 400 

CHABGE-PUMPFKOUENCrOb) 



ftriNs ■ 



ICLTm 



•SEE TEXT FOB VALUES 



-L •OSCIUATOR 

lapAcmifi 



^ -BESEBVOIII 

CAPACirai 



Figure 2-38. Adding an oscillator capacitor to the typical ICL7660 ap- 
plication lowers the oscillator frequency, which for lower values of h 
results in more efficient voltage conversion. 



Figure 2-37. The 'capacitance" curve relates the value of oscillator 
capacitor chosen in higure 2-38 to the resulting charge-pump frequen- 
cy. The 'current' curve relates charge-pump frequency to the resulting 
quiescent supply current (left vertical axis). 




2-19 



DESIGN ENTRY 

Analog supervisor chip Iceeps 
microprocessor out of trouble 

Charlie Allen 

Maxim integKited noduek 



Goal: to sharply reduce the complexity, component 
count, and space of standard microprocessor su- 
po-visory circuits while improving the accuracy 
and reliability of reset and battoy-switchover cir- 
cuits. Add to that a watchdog timer and write pro- 
tection. The result: the MAX691 and MAX690 mi- 
croprocessor supervisory ICs, which pack many 
common housekeeping functions into 1 6-pin and 8- 
pin packages. 

Because the needs of microprocessor systems de- 
fined the ICs, the super- 



To protect processors, 
a mixed bag of 
bloclcs. including 
thresliold detechrs, a 
power-switcfiover cir- 
cuit, and a watcttdog 
timer, unite on one IC. 



visory circuits contam 
several seemingly dis- 
tinct fimctions that mi- 
croprocessors com- 
monly need (Fig. 1). 
For one, die chips have 
a precise 4.6S-V thresh- 
old detector and a 50- 
ms timer that generate 
an accurate reset signal 
for any power-up, pow- 
er-down, brownout, or momentary-interrupt con- 
dition. For another, power-switchover circuitry of- 
fers a battery backup for CMOS RAMs or real-time 
clocks. On top of that, an uncommitted 1.3-V 
threshold comparator can serve m a power-failure 
warning indicator or monitor for the backup 
battery. 

To keep the microprocessor from writing incor- 
rect data into a CMOS RAM or EEPROM, during 
power-up, power-down, or a brownout, the 
MAX 691 has chip-enabling circuitry. The circuit 
forces a Chip Select output enable high whenever 
the + 5-V supply falls below 4.65 V. Moreover, the 
chip's watchdog timer monitors software execu- 
tion, resetting the microprocesscff tf execution is 
disrupted for any reason. 

The reset and watchdog time-out periods have 
three pin-selectable timing options. The first is 
based on an on-chip osdilatw and needs no exter- 
nal components. The second uses an external clock. 
Finally, the designer can cboote the minimum reset 



pulse width and watchdog time-out period by tun- 
ing the oscillator with one external capacitor. 

The eight-pin MAX690 has fewer timing options 
for the watchdog timer and reset-pulse width and 
no chip-oiaUe gating circuitry. 

The KSik ftmction relies on a reference-voltage 
technique with much more reliability than simple 
RC circuits, which work well if a change occurs 
abruptly between completely off and + 5 V. But if 
the power is slowly applied or lost, or if a brownout 
or momentary loss occurs, the RC circuit does not 
properly reset the system. The reset section con- 
tains a bandgap reference, a voltage divider that es- 
tablishes the 4.65-V reset detection threshold, and a 



Chip Enable 
input 



OSCIN 
O 



Watchdog 
input 



Power failure 
input 



Vbatt 9 BATTON 



Reset 
generator 



Timebase 
for reset 
and 



watchdog 



Waichdog 
transition 
detector 



Watchdog 
timer 



MAX691 
MIcroprocMtOf 



Chip Enable 
output 

O 

Low Line 
O 



— o 

Reset 
— O 



Watchdog 
output 
O 



Power failure 

outptjt 
O 



1. The basic (unctions provided t>y Maxim's 
MAX691 micropfocessor supervisory iC are 
bottary bacfc-up tor Ve» leeel rmI mi i. atnl 
woIgJmIqo flnkiQ todpiuw pMpei,4|imiiifimw^.v 



D a cli oiil c P lB n • April 30, 1987 



2-20 



MSraMBmY ■ Microprocessor supervisor 



SO-ms retriggerable monostable oscillator. 

The voltage detector forces the Reset output low when- 
ever the -t-5-V input drops below 4.5 V. The circuit 
holds Reset low until the supply stays above 4.75 V for 50 
ms, ensuring that the microprocessor receives the mini- 
mum reset pulse width specified by the manufacturer. 
The designer can extend this pulse width by adding a ca- 
pacitor to the oscillator input pin or shorten it by over- 
driving the oscillator input. The voltage detector also 
serves a second purpose: forcing the Chip Enable output 
high whenever the + 5-V input is incorrect. 

Although the 4.65-V threshold is a nominal value, the 
4.S-V minimum and 4.7S-V maximum are guaranteed be- 
cause the thresholds are trimmed at the wafer level Trim- 
ming involves fusible metal links like those on bipolar 
PROMs. A Low Line output offers an instantaneous view 
of the voltage-detector status. The Reset output, how- 
ever, goes high only after the input voltage has been at a 
valid level for 50 ms. 

The Reset pin offers a "weak output," which works as 
an active CMOS output driving high or low or as a wired- 
OR output when connected to open-collector outputs. 
The jHn can also supply the pullup current needed by the 
opoi-collector outputs connected to the bus. This dual 
capability is possible because the pin is a CMOS output 
but with only a limited source-current capacity. 

When connected to a higfa-impedance input, the weak 
output drives with full CMOS output swings of ground to 
Vqq. But when connected to an open-colle<Jtor or wired- 
OR bus, the limited source-current output lets the weak 
output be pulled down by any device with a sink current 
of only 10 fiA. Anotherbenefit is the output's guaranteed 
minimum 1-^A pullup current, which eliminates the 
need for an external pullup resistor on a mred'OR bus. 



OWDI 




10.24 kHz from 
intamal oscillator 
or externally set 
frequency fromOSC IN 
pin 



> 




Watcfidog 


Oil 


counter 


PP 


R 





Long/sfion 
flip-flop 
R 



2. The chip's watchdog circuitry looks for periodic strobes from the program. 
If no strobe Is received In the allotted time, the Watchdog Fault Oulisut, WOO, 
goes high, and Reset Issues a SO-ms reset pulse. 



The battery-switchover circuitry, although shown in 
the block diagram as merely an SPDT switch, is more 
compUcated than that. In practice, a voltage comparator 
checks Vcc against the battery voltage. As long as the 
supply is higher than the battery, V^c connects to the out- 
put terminal, V^^,. The connection, however, is through a 
pnp transistor whose base-drive modulation circuitry sat- 
urates the transistor white inininuzing 1»se conent. 

SHORT-CIRCUIT PROTECTION TOO 

When faUs to within 100 mV of the battery volt- 
age, the circuit turns off the base drive, and a 400-fl MOS 
switch connects the battery to W^. With the MOS switch 
the voltage drop is about 4 mV, compared to about SOO 
mV across the diode switch used in a discrete circuit typi- 
cally found in battery-backup circuits. The base-drive cir- 
cuitry includes a thermal-shutdown circuit that reduces 
base drive if the junction temperature is too high, thereby 
lending short-circuit protection to V^^,. 

With present, battery current is a maximum of + 1 
;xA and typically is a 10-nA charging current. This level 
extends battery life while remaining within the allowable 
charge current of even the smallest lithium batteries. 

When Vqc- falls to about 700 mV below'battery voltage, 
a second comparator shuts down all circuitry not needed 
in the battery-backup mode. In this low-quiescent-cur- 
rent state, the typical draw on the battery is about 600 nA, 
ensuring a long battery life. 

The chip's Battery On pin, which has a sink current of 5 
mA, indicates whether Vcc °^ 'he battery is powering 
Vjj^,. It can directly drive the base of an external pnp tran- 
sistor if the battery-backed power bus needs more than 50 
mA of output current dunng normal operation. 
An internal imp transistor, meanwhile, is guaranteed 
to have a maximum voltage 
drop of 300 mV at 50 mA, a 
level that will run several 
CMOS RAMs if their Chip 
Enable mputs fimction to re- 
duce the average current. A 
0. 1 -fi.F bypass capacitor at the 
output suppUes the high-cur- 
rent spikes the RAMs draw 
for a few nanoseconds during 
each access cycle. 

Besides working with bat- 
teries, the chip's power- 
switchover circuitry suppUes 
short-term power backup 
with standard capacitors or 
the new farad-size units. 

The third major section of 
the chip is the watchdog tim- 
er, a function often desired 
but seldom found (see 



Watchdog 
time-out select 



Watctldog 
lime-out 
selector 
logic 



Goes high 
_ at the end 
of watchdog 
time-out 



\ period 



R S 
Watchdog 
fault 
flip-flop 
Q 



Watchdog 
fault 
oijtput 



BacftonlcDMign • April 3a 1967 



2-21 



ing. When that input floats, two internal resistors bias it 
at an in valid logic levd detected W inteinal voltaf e com- 
parators (Fig. 2). 

On the job, the microprocessor drives the WDI pin 
with an I/O line that is periodically strobed. At each 
strobe, the supervisory chip resets the timer. If the micro- 
processor fails to strobe WDI for the programmed time 
period, a watchdog fault occurs. Typical reasons for a 
failure to strobe include hardware problems, a temporary 
disruption caused by voltage transients, and software er- 
rors that put the microprocessor ifi an endless loop. 

ALARM ACTIVATED 



ing capacitance to the Oscillator Input reduces its fre- 
quency and stretches the time-out period. For exapplCi a 
2-nF capacitance lengthens the time-out to 10 s. 

Typically, the MAX690 monitors V,,^, for a one-board 
controller system and generates a 50-ms reset pulse when 
needed (Fig. 3). An -I- 8-V dc source fed to the 7805 three- 
terminal regulator is scaled by two external resistors and 
applied to the chip's Power Fail Warning detector, which 
has a 1.3-V threshold. 

As a result, when the raw dc falls below 8 V, the super- 
visory chip's Power Fail Output goes low, interrupting 
the microprocessor through its nonmaskable interrupt 



If a watchdog fault occurs, the chip sends a 50-ms reset 
pulse and the Watchdog Fault Output, WFO, goes low. 
The output remains low, and the chip periodically pulses 
the Reset line until WDI is again strobed. For the greatest 
rehability, the Watchdog Fault output can activate an 
alarm and trigger hardware that places the equipment 
controlled by the microprocessor into a fail-safe mode. 

The designer can set the time-out period in several 
ways. One of two internally preset time delays can be se- 
lected with a logic level on the Oscillator Input pin while 
the Oscillator Select pin is high. Slow-response systems, 
such as instruments that update displays, usually can tol- 
erate errors for several seconds. In this type of s^teiii, the 
nominal 1.6-s watchdog time-out suffices. 

On the other hand, an airplane autopilot or a program- 
mable controller must quickly reset after a malfunction. 
Such systems usually need a 
100-ms or faster time-out pe- 
riod. Since most systems have 
special power-up routines 
that run after a reset, the chip 
waits up to 1.6 s for them, 
even if the 100-ms time-out 
period is chosen. 

A designer has two ways'to 
externally set the exact time- 
out period. One way is to 
overdrive the Oscillator Input 
pin with an external clock. Be- 
cause the watchdog timer is 
an oscillator and a counter 
rather than the RC mono- 
stable circuit, a 200-ns pulse 
can reset the timer. The de- 
signer can then use a decoded 
Write signal to drive WDI. 

The alternative is to select 



780S 

3- terminal 
regulator 



Power failure 
detect 



MAX6M 
risrapracna 
nipervtier 



0.1 )»F 

—r 



warning 

WD 



1 



Power Micro- 
to processor 
CMOS power 
RAM 



Microprocessor 



l/OHne 



3. In a circuit with a three-terminal voltage regula- 
tor, the iVIAX690— a simplified version of the 691— 
sends a power-failure warning to the microproces- 
sor as soon as the raw 8-V dc begins to drop. 



+5V 
Vcc 



Vcc BATTON 



MAX691 
Microprocessor 
supervisor 



osc 

IN 



WOl 

PFO 



IJowLine 



1 R 



CMOS 
RAM 



Address 
decode 



System 
status Indicators 



Audible 
alarm 



Ao- A„ 



I/O 
NMI 
Reset 



Other 
system 
reset sources 



4. With its Oscillator Select pin tied low and Oscillator input pin left floating 
the MAX^I has a 2&-ms reset pulse, a 50-ms watchdog period during no^ 
mal eperotfon, and a 200^ watchdog pwlod otter any reset. 



DKtONINTinr ■ Microprocessor supervisor 



(NMl). If the voltoge continues to fall, the regulator's 5-V 
output wUl begin to drop. When it reaches 4.65 V, the su- 
pervisory chip asserts Reset, halting the microprocessor 
and preventing further access to the RAM. As \cc *P" 

preaches the battery voltage, the chip replaces with 
the battery at Vj,^, ensuring continued power to the 
CMOS RAM. When V^c falls to 700 mV below the bat- 
tery, the chip shuts down all of its own unneeded circuit- 
ry, reducing its current drain to 600 nA. 

RAM POWER RESTORED 

When the dc voltage begins to build up again, the se- 
quence reverses, except that Reset stays low for 50 ms af- 
ter Vcc rises alwve 4.65 V. When 5 V is again present, V^, 
restores power to the RAM, guaranteeing a maximum 
voltage drop of 300 mV betwee* Vcc ^out *« 
age 50-mA current. 

A more sophisticated system based on the MAX691 
has the Battery On output driving an external transistor 
to increase power on the battery-backed bus to 250 mA 
(Fig. 4). Also, the Watchdog Fault Output sounds an ex- 
ternal alarm if recovery from a malfunction is impossible. 
In this system, if Vcc at invalid level, the Chip En- 
able gating circuit blocks write cycles to the CMOS RAM 
or real-time clock, preventing the microprocessor from 
corrupting the data in the RAM during power-up, power- 
down, or a t»tiwnottt. 



Tying Oscillator Select low and leaving Oscillator In- 
put floating reduces the reset time-out to 25 ms. This con- 
figuration also sets the watchdog time-out to 50 ms dur- 
ing normal operations and 200 ms immediately after a 
reset. 

The reset bus contains a manual switch and a 0.1 -jiF 
capacitor that make possible manual system resets. This 
circuit contains a simple method of generating a power- 
failure warning, needing only the -(-5-V input and two re- 
sistors. The resistors set up a warning threshold of 4.8 V. 
The processor has only the time it takes Vcc todropSPoaa 
4.8 to 4.65 V to save any data into RAM. 

Because all the sections of the MAX690 and 69 1 are in- 
dependent, any unnecessary fimctions can be ignored. 
For example, a designer who does not want battery back- 
up and power-failure warning can diminate the battery 
and the two resistors and connect the battery and Power 
Failure Inputs to ground. If the watchdog timer is not de- 
sired, the Watchdog Input is left floating. □ 

Charlie Allen has been applications engineering manager 
at Maxim for three years Before joining Maxim, he did 
similar work at Intersil. Allen has a BSEE from Michigan 
State University. 



Nearly every designer has operated 
equipment that can lock up, needing a 

reset to restore normal operation. The 
watchdog circuit's job is to detect 
such malfunctions and to automati- 
cally issue reset commands. 

Performance of this task can take 
many forms. The most sophisticated 
is a separately executing micropro- 
cessor that independently calculates 
results and compares them with the 
master computer's actions. At the 
lower end are schemes that demand, 
within a specified time, a response to 
an interrupt issued by the watchdog 
circuit. In between are circuits that is- 
sue a pseudorandom number or bit 



Watehctog on guard 

stream that the microprocessor must 
match to avoid a fault indication. 

The most common watchdog cir- 
cuit, though, checks the microcom- 
puter's operation by monitoring an 
I/O line that is toggled under pro- 
gram control. This scheme assumes 
that if the processor periodically tog- 
gles the I/O line properly, then it is 
correctly executing the program. 
Such a circuit can tell if the micropro- 
cessor is stuck in a loop so long as the 
loop does not toggle the I/O line. 

A watchdog circuit needs software, 
the simplest being a few lines of code 
that toggle the I/O line. The code 
must be in a section of sofiwaie that 



executes firequently enough that the 
time between toggles is less than the 
watchdog time-out period. Typically, 
the watchdog software is in the sys- 
tem or supervisory software, either in 
a section that responds to a periodic 
interrupt or in the section that exe- 
cutes when the system is idle. 

Another common software tech- 
nique controls the I/O line from two 
sections of the program. The software 
might set the I/O line high while op- 
erating in the foreground mode and 
set it low while in the background or 
an interrupt mode. Then both modes 
must execute correctly or else the 
watchdog tuner issues a reset {Ndae. 



ElMtonieDMlgii • April 30, 1987 



2-23 



DESIGN IDEAS 



EDITED BY CHARLES H SMALL 

Transistor powers low-dropout regulator 



James E Dekis 

Maxim Integrated Prodtucts, Sunnyvale, CA 
and Terry Blake 
Motom^a, Schamnb&rg, IL 

The monolithic regulator chip in Fig 1, combined with 
an external pnp transistor, forms a very-low-dropout 
regulator. The composite regulator can supply several 
hundred milliamps at 5V from an input as low as 5.3V. 
Such low-dropout performance suits battery-powered 
applications, because it extends the useful life of batter- 
ies having sloping discharge cur^, Wtkag' s^ed 
lead-acid and Uthium batteries. 

The monolithic regulator derives its supply current 
from t^e base; drouit <d the external pnp ^ansistor. The 
feedba^^iwstw x«tiQ iete the ou^ut indti^: 

VoDT=1.3Vx(R,-(-Rj!)/R,. 

If the output- voltage feedbadt to the chip's Vset input is 
below the bandgap-reference voltage (1.3V), the supply 
current into Vin (the pnp transistor's base current) 
increases. The transistor multiplies this base current 
by p and delivers it to the load. The circuit's quiescent 
current is a function of the transistor's p and load 
current 

When there's no load, the quiescent current is typi- 
cally 10 (lA. For larger load currents, the quiescent 
current is simply the load current divided by the 
transistor's p. The regulator chip can sink 40 mA max. 
When you enable the chip's shut-down input, the circuit 
consumes 6 typ. R4 supplies current to the chip 
under no-Icod eoncKMons. 



9 TO 5.2V 
O 




V0IIT-5V 

IT 200 mA 



Fig 1 — A monoUUiic regulator chip driving a iummg load seta the 
base current ofm tqs^fnmi, mrie»rp9V pnp transisterr; the rentU it a 
very-low-dropaut reguiaiorfiir baderieg whose output voltage droopi 
under load. 



R3 can limit the transistor's base current. The chip's 
VouT pin will try to raise its voltage level to that of the 
Yin pin when tiie output voltage of the chip is low. 
Reducing Rs has the effect of supplying lai^r base 
currents to the external transistor. 

You can substitute a 2N2945 for the 2N2907 shown m 
Fig 1. With this substitution, the circuit will supply a 
5V, lOO-mA max output from a 5.1V input. BDM 



2-24 



Analog'tO'Digital 
Converters 

A/D, D/A Question/Answer Primer 3-3 

Combining MAX 150's for 9-Bit Resolution 3-12 

Fast Sample and Infinite-Hold 3-12 

8-Btt Analog Multiplier 3-13 

Telecom A/D Converter 3-13 

4-Channel Fast Sample and Infinite-Hold 3-14 

12-Bit Infinite-Hold Sample-and-Hold 3-15 

Sample-and-Hold to High-Speed A/D Interfaces 3-16 

Single Chip A/D with Track-and-Hold . 3-18 

Single +5V 1 2-Blt A/D Operation 3-18 

Optocouplers Isolate Data-Converter Signals 3-19 

500kHz /VD Conversion with Two MAX1 62 ADCs 3-20 

Testing A/D Noise and DNL Errors 3-21 

/V/D Converter Input Transients 3-23 

Driving a SAR NO Input 3-24 

A/D Input Amplifier Selection 3-25 

Microporcessor Based DIVIM Circuit 3-26 

+5V Powered DVM with ±3.5V Input Range 3-26 

4-20mA Cun-ent Loop Powered Indicator 3-27 

Single Chip DVIVI Applications 3-28 

Add a Range Switch to Your DPM 3-30 

Portable Digital Thennometer 3-31 

True RMS Digital Meter 3-32 

Low Cost Temperature Meter 3-32 

RID Temperature Meter • 3-33 

Operating DVM A/Ds without Reference Capacitor ^ . 3-33 

8 Point Sensor Linearizer 3-34 

Logarithmic Ratio Meter 3-35 

Extending A/D Common Mode Range 3-35 

Add Display-Hold to MAX1 39 and MAX140 A/D 3-36 

Digital Refrigerator Thermometer 3-37 

How Will Your A/D Really Perform? 3-38 



3-1 



3^2 



4/DV QUESTION/AMSWER PRIMER 



What follows is a discussion of some basic data acqui- 
sition topics in question and answer form. Its intent is to aid 
tfiose wfio fiave not fiad recent experience witii analog-to- 
digital and digital-to-analog conversion designs. The terms 



"A/D" and "ADC" are frequently used for "analog-to-digital 
converter", while "D/A" and "DAC" are used for "digital-to- 
analog converter". 



How significant is analog-to-iUgttml converter type 
ivfien considoring differsnt A/Ds? How do they compare? 



Manufacturers typically don't provide details on internal 
IC operation In applications literature unless the A/D in 
question uses some exotic conversion technique. Although 
specifications alone are usually enough to define the A/D 
or D/A you need for a particular application, an awareness 
of the strengths of different IC designs can be very helpful, 
at least from the standpoint of picking a performance 
range. A/Ds fall primarily into three categories: successive 
approximation, integrating, and flash types. 

Successive Approximation The most commonly en- 
countered type of ADC is that employing a successive-ap- 
proximation register (SAR). SAR designs have from 8- to 
12-bit resolution and operate at a wide range of speeds 
from 10 to 100 jis. Conversion is accomplished by step- 
ping through a sequence of trial-and-error comparisons 
between tfie unknown input signal and a series of binary- 
weighted reference levels. The result of each successive 
comparison serves to narrow the range of reference level 
used for the subsequent comparison. 

A block diagram of a typical SAR ADC is shown in Fig. 
3-1. The 12-bit device contains a 12-bit DAC, control logic, 
and output latches. Conversion is performed by compar- 
ing the unknown analog voltage with the DAC output. 
When this matches the unknown voltage, conversion is 
complete and the digital number corresponding to the 
analog voltage is presented at the output. 

The number of bits of resolution provided by the con- 
verter is equivalent to the number of comparisons made. 
The primary advantages of this technique are that (1 ) only 
one comparator is needed for the conversion and (2) 
higher resolution does not greatly increase the conversion 
time. 

For example, a 10-bit ADC will only be ten-eighths 
slower than an 8-bit device of the same basic type because 
only two additional comparisons are needed to obtain 4 



times the resolution. The binary nature of the SAR search 
also makes the converter ideal for irrterfacing to computers 

and microprocessors. 

Unfortunately, the SAR converter requires a large num- 
ber of steps to complete an approximation routine and 
therefore is susceptible to error if the analog input changes 
in the middle of the SAR search. For this reason, noise 
rejection usually is not high. For certain inputs, a sample- 
and-hold stage or filter may be needed to stabilize the input 
signal while AD conversion is under way. 




MAX163 




coNm 

LOGIC 



CLOCK 
OSCILUTOfl 



011 m 



ij.ni 121 

04 ' 



,03/11 00/8 



7? 

— BUSY 

^CS 
20 =s 



Heat 



Figure 3- 1 . Successive Approximation Register (SAR) analog-to-dlgi- 
ta! converter (AIX) with on-chip track-ancPhold. 



3^ 



laiegimtingCm»f9F^em IntegratingADCs, indudiiuo sin- 
gle-, dual-, and multi-slope designs, are most commonly 
found in digital meters and instrumentation systems. They 
are relatively slow, but this Is usually not a problem be- 
cause the results are used primarily for visual readout. The 
strong point of an Integrating ADC Is high resolution, offer- 
ing as many as 20 bits of digital data (6 decimal digits). 
Low-cost monolithic converters of this type commonly han- 
dle ±2000 counts, which is equivalent to 12 bits. 

The most popular type of integrating converter is the 
dual-slope design, in which the unknown signal ramps the 
Input of an Integrator up from OV for a time set by a fixed 
number of clock cydes. A reference voltage of oppose 
polarity then discharges the integrator and returns it to 
zero. The discharge time, which Is proportional to the input ' 
voltage. Is measured by counting the number of clock 
pulses (Fig. 3-2). 

The dual-slope integrating ADC, by nature, has high 
noise rejection because the output represents the average 
value of the input signal over the integration time. This 
circuit is able to ignore changes in its integrator and clock 
because both are used to measure the reference, as well 
as the Input, during each conversion cycle. This way many 
drift and error terms cancel. 

A major disadvantage of the integrating ADC is the 
difficulty often experienced in interfacing the device with a 
microprocessor because of the converter's slow speed 
and sometimes unusual output format. Obtaining higher 
resolution also requires longer integration times and there- 
fore significantly longer conversion periods. Each addi- 
tional bit of resolution typically doubles the AD conversion 
time, although some new "multi-slope" topologies have 
reduced conversion times. 



INTEGRATING CAPACITOR 

^1— 



T 



^ — wv- 




CONTROL LOGIC 
ANOaOCK 



mm. REFERBKEdtMnSflATE. 
HdKRATE 




_rLrLrLn...rTJTrLrLn 
^1^ 



Hxfld number 

of clock pulSES 



Numtwiol clock pulses 
proportional to Vin 



Figure 3-2. Simplified block diagram of dual-slope integrating ADC 



Flash Conversion Flash ADCs are the fastest devices 
presently available in either a discrete or a monolithic form. 
The operating principle of the flash converter is in some 
ways opposite that of the SAR. Rather than using one 
comparator repeatedly to make a number of comparisons, 
a flash converter uses a large number of comparators to 
make all the checks at once. 

A consequence of this technique (besides high speed) 
Is a relatively high cost per bit. The number of required 
comparators increases geometrically with greater resolu- 
tion. For example, a 10-bit flash converter would require 
1023 comparators. For this reason, flash converters are 
not commonly employed for applications that demand 
more than 8-bit resolution. They are, however, widely used 
in high speed 6- and 8-bit applications such as video signal 
processing. 

Some new ADC devices combine flash and SAR tech- 
niques to provide high speed without using huge numbers 
of comparators. One example of this approach Is the 
half-flash ADC, which performs an 8-bit conversion by 
combining the results of two 4-bit flashes. Figure 3-3 
shows the basic concept of the half-flash converter. This 
principle has been expanded to 10 bits with the MAX151 . 



VllB<-) 



\ DB0-0B7 
\ DATA OUT 
/PINS 2-5, 




CS no NT 



Figure 3-3. Half-flash ADC. This 8-bit converter uses 32 comparators 
in two 4-bit flash circuits 



How <lo«s A/D and IVA eonwerter rasofution nlatB to accuracy? 



Resolution is the number of segments into which a data 
converter divides an analog signal. It is quite a bit different 
from accuracy, which for an A/D is the converter's error in 
deciding a signal's magnitude. With a D/A, accuracy is the 
error in generating a specific output voltage or current. 
Accuracy and resolution USUALLY have comparable mag- 
nitudes in a particular converter, but not always. In higher 
resolution (12 bits and up) devices, 0.025% or greater 
untrlmmed accuracy adds cost to the IC. For example, a 
low cost 1 2-bit A/D can resolve a 1 V input range to within 
2.5 mV, but more often than not the digital output won't be 
accurate to that amount without some circuit adjustment. 

High accuracy without trimming can of course be had 
in many data converter products, but usually at significant 
cost. In many applications, the expense of tfiis initial accu- 
racy is often wasted. If the device is linear, (more on 
linearity later) its absolute error spec is a moot point if other 
parts of the system require calibration anyway. A good 
example of this is the A/D used in supermarket weigh 
scales. The scale's required accuracy is 0.01 pounds out 
of 25, which can't be achieved without some type of 



calibration because of transducer errors. Since other parts 
of the circuit need trimming anyway, A/D error can be 
adjusted as part of the system. In such a case, a less costly 
A/D, with greater absolute error, does just as well as one 
with zero gain error. A converter with tighter accuracy only 
reduces the required trim range, so the extra expense of 
untrimmed accuracy makes sense only if adjustments are 
eliminated altogether. This is also true for DACs. One 
example, the MX7531J D-to-A converter, has 12 bit reso- 
lution but only 8 bit accuracy. It provides 12 bit resolution 
at reduced cost, so if the application requires manual 
adjustments anyway, the DAC's accuracy compromise 
doesn't affect performance. 

To be complete, it should be also be pointed out that 
there are some instances where having an accuracy spec 
that exceeds resolution is also useful. One such instance 
is when a digital- to-analog converter sets an op amp or 
some other amplifier's gain. There may be only a small 
number of settings required (for example, 8 gains equals 
only 3 bits of resolution), but the accuracy of each set gain 
might be quite high. 



What Is tho dWerencB between bipoUur mid CMOS D/A converferB? 



From an applications standpoint, the semiconductor 
fabrication process employed in a particular integrated 
circuit is usually of academic interest only and is not as 
important as actual specifications and performance. How- 
ever, in the case of CMOS and bipolar D/A converters, 
there are some operational differences related to fabrica- 
tion which warrant attention. 

Bipolar D/A converters rely on a process that is much 
the same as that used for standard linear devices such as 



transistors and op amps. The performance depends on 
matching current sources that can also be switched at high 
speeds (Figure 3-4), The magnitudes of these current 
sources are binarily weighted and each is controlled by a 
digitai input bit. The DAC's output current is then the sum 
of the current sources that have been switched on, A 
voltage reference, which is occasionally included on chip 
(as in the MX565), sets the full mslte output. 




Figure 3-4. 12-bit current-output DAC made with bipolar processing contains active transistor current sources. 



3-5 



4- 



CMOS DACs may have either a current or voltage out- 
put. Common current-output types, such as the MX7541A, 
differ from bipolar converters in that they are "passive" in 
the analog signal path (Figure 3-5). This means that the 
output is controlled by matched resistors and analog 
switches rather than active transistor current sources. Ex- 
cellent on-chip resistor matching provides precision to 14 
bits, as with the MX7538, and beyond. Current-output 
CMOS DACs are often called "multiplying D/A converters" 
because the reference input accepts a wide variety of 
signals which are then controlled by the digital input code. 
Voltage-output CMOS DACs, such as the 8-bit MX7224, 
have more limited reference flexibility, but are often more 
convenient to use because they include buffered voltage 
outputs. 

Other advantages of CMOS DACs over bipolar are lower 
power consumption, single supply operation, and excel- 
lent gain stability with temperature. They are also more 
common in multiple configurations, such as with the 
MX7228, which has eight voltage-output 8-bit DACs on one 
chip. A disadvantage of current-output CMOS parts is that 
their output compliance as current sources is poor be- 
cause they are not active. This means that output current 
is linear only when the DAC output is terminated at OV. 
Consequently, current-output CMOS DACs nearly always 
need an output ampUf ier {Figure 3-6). 

Though somewhat less versatile than CMOS, bipolar 
DACs such as the MX566 are typically faster with better 

settling characteristics. They sometimes can be used in 
multiplying applications as well, but only in a limited fashion 
because reference bandwidth and polarity are often re- 
stricted. The active current output on a bipolar DAC has 
one advantage; in some situations a suitable voltage output 
can be generated without an op-amp by simply terminating 
the DACs current ou^4 w(tti a Fe@istor. 




ion 1» 10k 




DIGITAL INPUTS 



Figure 3-6. A 12'blt CMOS current-output DAC with op amp for voit- 



3H6 



f 



ean non-linearity (most oHen referred to as "linearity") specs hide? 
How tufe monotonieity and "no missing codas' datarminad? 



There are several different methods of defining data 
converter linearity (or non-linearity). Each definition has its 
own justification, but the result of such variety is confusion. 
One device can give rise to several different linearity num- 
bers, under a variety of specifications. It pays to be familiar 
with how a nunaber is generated if it is going to be com- 
pared with other specs. Two common ways of qualifying 
linearity specs are "beSJ^gtraight line fit" and "endpoint tit' 
(see Figure 3-7). 

The best straight line approach makes no claims about 
zero (offset) error, full-scale erroi«, or the slope of the 
transfer function. It simply quantifie&Kjn LSBs or %, the 
A/D's maximum deviation from a straight-tine^hat best 

approximates the function (i.e. provides the lowest error). 
The actual location of the ideal line is not defined. This is a 
"pure" linearity spec since it includes no other errors. It also 
usually gives the best looking (lowest) number for a given 
device. 

Endpoint fit, on the other hand, uses the actual end- 
points of the converter's transfer function (see alaove sec- 
tion) as the ideal line before measuring deviation. The line's 
slope and position are not adjusted to minimize the error. 
The number generated from this technique is usually larger 
than that derived with the best straight line approach. 



SPECIFYING LINEARITY 




Figure 3-7. 'Best Straight Line' and 'Endpoint' Linearity produce differ- 
ent specifications for the same A/P 



Concern with linearity often hinges on whether a device 
has "no missing codes" (in the case of an A/D) or is 
"monotonic" (for DACs). This means that the output of a 
converter will increase or, at the very least, stay the same 
as the input increases (Figure 3-8). Manufacturers (includ- 
ing Ivlaxim) often state this as a guaranteed condition ("no 
missing codes", "guaranteed monotonic") on the data 
sheet, while others provide a specification called "differen- 
tial nonllnearfly. Some provide both. 




100 
{NPUT 



Figure 3-8. Nonmonotonic D/A Converter (a) and A/D Convener with 
iMssing Code (b) 



Differential linearity describes the deviation of each 
analog "step" from its ideal size of 1 LSB (Figure 3-9). A 
differential nonlinearity (DNL) spec of "0.5 LSB" means that 
all steps are at least 0.5 LSB and no more than 1 .5 LSB. 
DNL of 1 LSB or less guarantees monotonieity or "no 
missing codes". It says that all steps are at least LSB and 
no more than 2 LSB. A step of LSB, though usually not 
desired, does (barely) satisfy monotor^icity requirements. 




ALSB-onraanBL 



Figure 3-9. Differential Linearity Error 



3-7 



This specification, sometimes referred to as "Absolute 
Accuracy' lumps all A/D errors (zero error, nonlinearity, 
reference error, etc.) into one. It is the largest difference 
between the ideal and actual analog input voltage that 
results In each output code. A fact that sometimes causes 



confusion is that a range of input voltages and not just one 
specific voltage, produces a given output code. For this 
reason the "ideal" input voltage for a code is defined as the 
midpoint of the voltage range for that code. 



In many measurement applications, you have no control 
over the speed of an input signal. Measuring a signal while 
it is changing is not unlike photographing an object while 
it is moving: distortion and error are likely. Sample-and- 
holds (also called traci<-and-holds) "freeze" varying signals 
so that they can be measured. Input filters also sometimes 
do this but many times the resultant speed reduction is 
unacceptable. 

A varying input is most likely to cause conversion error 
in a successive approximation (SAR) A/D, unless it has an 
internal track-and-hold circuit. Flash A/Ds are typically free 
of this problem because they are already sampling by 

nature. With integrating A/Ds, typical input signals are slow 
enough to not be a problem. Without the benefit of a 
sample-and hold, input changes are simply averaged over 
the A/D integration time. This produces no "catastrophic" 
errors for transient Input signals. In fact, it is often desirable 



IVhen are sample-and-holds needed in data acquisition? 
What are the consequences of not using them? 



for noise rejection purposes. Sampling is only needed with 
integrating A/Ds if the instantaneous value of the input, 
rather than an average value, is required. 

In an SAR A/D, it is assumed that the input will not 
change by more than 1/2 LSB during an entire conversion 
cycle. Since each "guess" in an SAR search tells the A/D 
converter what its next step will be, an input shift in the 
middle of the comparison seqCience can play havoc with 
the conversion process. When this happens, all that is 
known for sure is that the digital output lies between the 
minimum and maximum values that the input had during 
the conversion. These bounds are not very helpful if large 
input transients occur at inopportune times. The output will 
neither represent the input's average value nor will it rep- 
resent the value at any predictable time. A sample-hold, or 
an A/D with an internal sample-hold such as the MAX163, 
is needed. 



. Mow are ratlemebto 



uamful? 



When measuring physical quantities, the signals of in- 
terest are either absolute voltages which correspond to a 
physical quantity, or they are in the form of a varying 
impedance or ratio which must be externally driven to 
obtain a signal. The first type of signal requires that the A/D 
be able to measure absolute levels to the desired accu- 
racy. If, for example, a tachometer generator outputs 1 volt, 
an A/D must know that it is 1 volt within tolerable error. The 
second type of signal does not require the A/D to have 
absolute accuracy if it can somehow provide its own frame 
of reference. This is the key to ratiometric measurements. 
An analog between ratiometric and absolute signals can 
be found by comparing pan balances to spring scales. 



Only the spring scale knows what force is being applied to 
it in an absolute sense. The balance must be given a 
reference much in the same way that an external A/D 

reference is used for a ratiometric measurement. 

In an ideal ratiometric measurement, the transducer and 
data converter use the same reference. If the reference 
level changes, there is no effect on the digital output. 
Neither the transducer nor the A/D may know what "1 volt" 
is, but this is not of consequence since they are using the 
same scale. In most cases, this sidesteps the need for a 
precision time- and temperature-stable reference voltage. 
In some instances, even the system power supply voltage 
will do. 



If everything in nature were TTL compatible, signal 
conditioning would be unnecessary. As it is, signals from 
various analog sources are often not conveniently created 
with respect to the measuring system's ground. Such sig- 
nals frequently arrive with large offsets or common mode 
noise which need to be removed. In other cases, the 
difference, and not the absolute magnitude of two quanti- 
ties may be of interest, as with differential pressure or 
temperature. 



How are differential inputs used? 

In all these cases, analog electronics can be added to 
make the differential measurement. Having it incorporated 
into the A/D converter, however, reduces parts count and 
improves reliability. Differential inputs provide a means of 
canceling noise or offsets common to both input lines. The 
device responds only to the difference between signals on 
its plus and minus inputs, and rejects common-mode sig- 
nals that appear on both pins. 



You should choose an instrumentation amplifier when 
differential inputs are not available on a selected A/D, and 
the difference function is still needed. An instrumentation 
amp is not simply a high performance op amp. Devices 
referred to as such are actually mislabeled. An instrumen- 
tation amplifier is a differential input device with high im- 
pedance inputs and either a fixed or adjustable stable gain 
than can be conveniently set with one or two resistors. 

Although an op-amp is a differential input device, pre- 
cise differential closed-loop gain can't be set without four 



closely matched resistors. Though this configuration is 
often used, it can't be easily adjusted and has fairly low- 
impedance inputs. Instrumentation amps are widely used 
to amplify low level differential signals such as those gen- 
erated by pressure transducers, weight sensors (strain 
gauges), many temperature sensors and devices which 
rely on low level bridges for linear output. Many of these 
types of signals are too low level to be converted by an A/D 
directly. 



. IVhen is signal isolation nocossary? 



In signal conditioning, input isolation is the next giant 
step beyond differential inputs. It is used where the signal 
to be measured is not or cannot be electrically connected 
to the data acquisition system in any way. This is widely 
done in medical electronics and in industrial .environments 
where the input may be "hot" to an AC power line, eittier 
inadvertently or by design. Also, isolation is gaining wider 
use in low-level data acquisitions where the common-mode 
signals may not be high, but where it nevertheless is useful 
as a means of avoiding ground loops and noise pickup. 
This is especially true in large systems where many signals 
from remote locations are returned to one point. Each 

1011F 

Hh 



return line is likely to be at a slightly different potential, and 
the possibility of interference and/or damage could exist 

without individual channel isolation. 

In many applications, there is no need to convert back 
to analog form if an A/D conversion will be the end result 
anyway. In these cases, considerable expense can be 
saved by the use of serial output A/D or V/F converters. The 
outputs of these devices can easily be isolated with small 
transformers or optical isolators and can then be read in 
digital form. Serial output devices work especially well 
because only one data line needs to be Isolated. (See 
Figure 3-10). 



HH 

0.1|if 



UAX171 




tmooGx 



Figure 3-10. The MAX1 71 snplBes analog isolation by combining a 12-bit serial AID and opto-couplers in one package 

3-9 



specifications such as Zero and Full Scale Error, Integral 
Non-linearity (INL), and Differential Non-linearity (DNL). 
Such parameters are widely accepted for specifying per- 
formance witfi DC and slowly varying signals but are less 
useful in signal processing applications where the A/D's 
impact on the system transfer function is the main concern. 
The significance of various DC errors does not taistate 
well to the dynamic case, so other tests, as described 
below, are required. 

Signahto-Noise Ratio and EffBctive Number of Bits 

The ratio of the RMS amplitude of the fundamental input 
frequency to the RMS amplitude of all other A/D output 
signals is the Signal-to-Noise Ratio (SNR). The A/D output 
band is limited to frequencies above DC and below one 
half the A/D sample (conversion) rate. This usually (but not 
always) includes distortion as well as noise components. 
For this reason the ratio is sometimes referred to as "Sig- 
nal-to-Noise + Distortion". 

The theoretical minimum A/D noise is caused by quan- 
tization error and is a direct result of the A/D's resolution: 
SNR = (6.02N + 1 .76)dB, where N is the number of bits of 
resolution. A perfect 12-bit A/D can, therefore, do no better 
than74dB. Figure 3-11 shows the result of sampling a pure 
1 0kHz sinewave at a 1 0OkHz rate with the MAX1 67. An FFT 
plot of the output shows the output level in various spectral 
bands. 

By transposing the equation which converts resolution 
to SNR, we can, from the measured SNR, determine the 
effective resolution or the "Effective Number of Bits" that the 
A/D provides: N = (SNR - 1.76)/6.02. Figure 12 shows the 
effective number of bits as a function of the input frequency 
fortheMAX167. 

Total Harmonic Distortion 

The ratio of the RMS sum of all harmonics of the input 
signal (in the frequency band above DC and below one 
half the sample rate) to the fundamental itself is Total 
Harmonic Distortion (THD). This is expressed as: 

THD = 20Lx3g[V(V2^-fV3^ + V4^-t-V4^+... + VN^)]/Vi 

where Vi is the fundamental RMS amplitude and Va to Vn 
are tfie amplitudes of the 2nd through Nth harmonics. 



ui 

Q 
3 



a 
s 
< 



0.0 
-20.0 

-40.0 
-60.0 

-80.0 
-100.0 



-120.0 







n 


^1 




■ 








IB 


■ 










■ 










■ 




m 


n 




r^T'r!ffrfi|T* 

i,>i,tij|,iti^i«,iiiiV 


il.'..t:.:il<l)i.lLiiilM 



100kHz 
= 10kHz 



0.0k 12.50k 25.00k 37.50k SOJIOk 
FREQUENCY (Hz) 




10K 100K 1M 10M 

IMPUT FREOUENCY (Hz) 



^Lre^- 1 1. FFT Plot and Effective Bits vs. Input Frequency lor 



The ratio of the fundamental RMS amplitude to the 
amplitude of the next largest spectral component (in the 
frequency band above DC and below one half the sample 
rate) is referred to as the Peak Harmonic (or Spurious) 
Noise. Usually this peak occurs at some harmonic of the 
input frequency, it may occur only at a random peak in the 
ADC's noise floor. 



3*10 



Now dp f dMf mrftfi itoi»m, veumb, and Murphjf's law? 



This is a tough one. The greatest problem facing a data 
acquisition design is that it must eventually enter the "real 
world". "Device failure, poor accuracy, doesn't meet spec" 
and other oft stated maladies are, more often than not, a 
direct result of some type of disregard for basic electro- 
magnetic principles and Ohm's Law. Experience has 
shown that solutions for these types of problems often 
range from compensating oscilloscope probes to properly 
bypassing power supplies. What follows are some tips and 
suggestions. 

First, if in doubt about grounding procedure, use single- 
point grounding to prevent ground loops (which can gen- 
erate unwanted currents when cut by invading magnetic 
fields). Applying this grounding philosophy also keeps 
voltage drops in high current lines from affecting the 
ground points of more sensitive circuits. The use of simpler 
"chain" grounding will not stop this type of feed-back which 
can cause DC errors and/or oscillation. Separate analog 
and digital supplies are desirable for precision measure- 
ments, however with A/Ds and D/As that have both analog 
and digital ground pins, it is best to connect BOTH chip 
ground pins to only the analog ground. Ideally, the analog 
and digital circuitry should be completely isolated , but cost 
often prohibits this. An effective cost compromise is to filter 
a portion of the system supply with a separate RC network, 
and use that supply only for analog and A/D circuitry. 

In most cases, careful consideration should be given 
before cutting corners on grounding and supply bypass- 
ing, especially if there are plans for expanding the system. 
An important goal is to protect analog circuitry from tran- 
sients or power supply shifts caused by digital logic tran- 
sients. Shields, if used, should be "watertight" and thought 
of as an extension of the instrument or system enclosure. 
Shielded cables should be grounded at one end only, 
preferably at the single-point-ground. 



Analog signals should be amplified to their highest 
practical level or digitized as soon as possible. It is not wise 
to run a low-level signal across a circuit board past clock 
lines, relays, switching circuits, etc... only to amplify both 
the signal and acquired noise before entering an A/D. 
Noise is best minimized by amplifying immediately and 
digitizing the signal at the source if possible. Serial output 
A/D converters work well for this when the signal source is 
remotely located. It's also wise to physically separate an- 
alog and digital circuitry. Use separate circuit areas on the 
PC board, or separate boards if possible. In extreme 
cases, a completely separate shielded sub-enclosure may 
be required for analog circuits if very low level signals are 
involved. 

When troubleshooting and debugging analog data ac- 
quisition hardware, never give blind trust to emulators, 
development systems, and so forth. These digital instru- 
ments can be invaluable time savers, but be sure to verify 
the results by other means when what they say conflicts 
with common sense. Since these devices provide "second- 
hand" information about the state of your hardware, it is not 
uncommon to be fooled by the very problem that is being 
chased. There is really no substitute for observation right 
at the pins of suspect devices. Once the approximate 
location of a problem has been found, it is always most 
effective to clear away as many interface/buffer/reality- 
obscuring layers as possible. Blame should be reserved 
until it can be proven by direct observation, a.k.a. an 
oscilloscope. 

A good text which takes much of the "witchcraft" out of 
grounding and other practical analog problems is "Ground- 
ing and Shielding Techniques in Instrumentation", by Ralph 
Morrison, published by Wiley and Sons, New York, NY. 
Although relatively small, it gives a complete discussion of 
this area without cumbersome levels of math. 



3-11 




Figure 3-12. 



. Fast SamplB and Infinite-HoU 



\(ni(l)VT0t5V) 



'It — :t — 

^ 0.1nf 47tiF 



1 



:l I 





Vm wr 






CS 








55 


MAX150 


vbefH 




voo 






nam 


MODE 




vnert*) 





tVN 
3 



»1W 



Vie Voo 




Voui 


MJOfOJM 




MX7224 


CS 




WR 




LDAC 


oeow 






AGND 


vss 


DGND 


X 



Figure 3-13. 



3-12 



a-mt Aiming MtmfOw 



tSV-^ 



I T 



47(iF 



GND 
CS 

m MAX1S0 
MX7820 



VDD 
MODE 



Vm8 
15 I 3 

Wl Vref 



Vdo 

KSET MX7224 

VbUT 

IDAC 
AGND 
QGNO 

\te 



-sv 



Figure 3- 14. 



M^J^^^ IfVuttSVRff 



. TelBCom AID Converter 



32k 




■SAMPLE WIE IS JOlNz 



Figure 3-15. 



3-13 



*5V 
1. 



3 




2 


1 




14 




13 



AIN1 
AIN2 
AIN3 

Airu 

Vrer 

GNO 



MAX154 
MX7824 



SAMPLE 
PULSE 





VQ] 






MX7226 


VoutA 
VbUlB 
vburC 


0KI-D87 




VoutO 


A1 




DGND 


AO 




AGNO 


vss 



Figum3-16. 



This sample-and-hold holds its acquired input for an 
infinite amount of time with no droop. It also has excellent 
input bandwidth, aperture delay, and aperture jitter. A 
MAX163 sampling ADC samples the input voltage. The 
input signal is held on the falling edge of the hold signal, 
which goes to the RD pin of the MAX1 63. The hold signal 
must be at least 8.5nsec wide. This initiates a conversion 
on the IVIAX163. After Susec, the conversion result is 
updated on the outputs of the ADC. These outputs are fed 
Id the digital inputs of a DAC (Maxim MX7545). Since the 
hold signal was low throughout the conversion, the DAC 
updates its output as soon as the MAX1 63 data isavailable. 
Therefore, the output of the DAC is a re-construction of the 
original input signal. On the rising edge of the hold signal, 
this data is latched into the DAC, and the ADC becomes 
ready to sample another signal. 

The requirement that the hold signal be low during the 
conversion simplifies the ADC-DfiC interface, and allows 
data to be transferred between the two chips without 'glue' 
logic. A MAX400 amplifier converts the current output of 
the DAC into a voltage. The DAC also uses the intemal 
reference output of the MAX1 63 as its reference input. This 
reference conveniently has the correct polarity, so that a 
O-SV input to the MAX1 63 is reconstructed correctly by the 
MX7545. The internal reference also eliminates one 
source of mismatch in the reconstruction of the input 
signal. 




REPEmiVE HOLD SIGNALS; 
T/H LOOKS UKErr IS 
TRACKING THE INPUT 



WMIHHOUIIIOtt 



Figure 3-17. 



r 



HOLD Wt INPUT HEBE 



r 



WAIT FOR THE CONVERSION TO END 
HOLD SIGNAL 




WR 




cs 


RFB 




MX7545 


D0-0t1 


0UT1 
ASND 


Vdo 




DGND 




19 




INFINITE 
HOLD 
OUTPUT 



Figure 3- 18. Infinite-Hold Sample-and-Hold 



3-15 



^MilRifNiH#'lii[itf 99 t^M^fimp^ AflB ffitrnfaea* 



The analog input to a successive approxiviation ADC 
must be stable to within 1/2LSB during the conversion for 
specified 12 bit accuracy. This limits the input signal 
bandwidth to less than 6Hz for sinusoidal inputs. For 
higher bandwidth signals, a sannple-and-hold should be 
used. 

The BUSY output from the MAX162 provides the 
TRACK/HOLD signal to the sample-and-hold amplifier. 
However, since th e ADC 's DAC switches at approximately 
the same time the BUSY signal goes low. transients at the 
sample-and-hold output caused by DAC switching may 
result in code dependent errors due to sample-and-hold 
aperture delay. A NAND gate ensures that the sample- 
and-hold switches to hqld_ mode BEFORE and distur- 
bance s. The width of the RD pulse must be wider than the 
RD to BUSY delay in the MAX 162, If this is not possible, 
use a flip flop which is set by the falling edge of RD and 
reset by the rising edge of BUSY. 



For synchronous RD and CLKIN as described above, 
the hold settling time allowed for the sample-and-hold is 
500ns, 600ns and 1 .5ns for the MAX162, MX7572XX05 and 
MX7572XX1 2 respectively. 

For minimum sampling rate, the MAX162 data must be 
read within the time allowed for the sample-and-hold to 

acquire a new input voltage. 

Figure 3-19 shows an_ AD585 sample -and-hold to 
MAX1 62 interface. The RD input and BUSY output put the 
AD585 in hold mode when a conversion is in progress. In 
this example the analog input range is ±2.5V but other 
voltage ranges can also be configured. 

The maximum sampling rate is 125kHz with a 2. 5MHz 
clock and 64.5kHz with a 1 MHz clock allowing for a Sjis 
sample-and-hold acquisition time. 

Although its circuit works quite well for the 1 MHz clock 
rate, at the 2.5MHz clock rate a faster sample-and-hold 
amplifier such as the HA5320 is recommended. 



— a— 



— T~ 



ANALOG 
INPUT 



39k 

-AA/V 



R4 



LREF 
HOLD 



AD5B6' 



fl2, 
39k 



e2k 



-AAA^ 



47|lF 



O.ImF 



MAXIM 

AMX<62" 



HBOI 





IOmF 0.1^f 



CONTBOL 
-O > INPUTS 




' 1 * J _ 



1 



• AMfflONAl. HNS OMITTB) FOR CUWTir 

F^we3-19. KIAXI^-MXSBS Sample-and-Hold Interfaces 



3-16 



=^":t — T~ 

ai|if-|- ^ ioiif 



:i — X 




ANALOG 
INPUT 
■i5VT0.2.5V 



HA53W 



M 



n2, 

39k ^ R1 
S2k 



■ANV-f 



j: — X 

T - T 





Vm 




BUSV 










cs 










MAX162 


So 




MX7572' 




«JN 




HBEN 








DGND 


VreF 










AGNO 




Vss 






10Mf 0.1MF 



00N7B0L 
-O > INPUTS 




ainF 



- AODmONAL PINS OMITIED FOR CLAKITV 

Figure 3-20. MAXr62/M<7Sr2-HAS320 Sample-and-Hold Interface 



3-17 



single Chip A/D With Traek-anthHold 



The MAX167 is shown here in its "basic" application 
configuration because it offers nearly equivalent perfor- 
mance to the previous two A/D-plus-tracl</hold circuits, 
and does so with just one IC. It is also pin-connpatible with 
the MAX 162, MAX 172, and AD7572. Complete conversion 
time, including track/hold settling, Is 8.33jis with a 1 .5MHz 
clock. Input signals beyond 59kHz can be digitized In real 
time, and due to the wide track/hold bandwidth, up to 
6MHz periodic signals can be measured by undersampl- 
ing. The MAX1 67 is trimmed for a ±2.5V input range. The 
MAX163 and MAX 167 accept 0-to-5V and ±5V signals 
respectively. 



1.5MHz 

I'/ 



±2.5V , 
ANALOG INPUT ' 
TOSOkHi 
(CMHlWITH 
UNOBISAMPUNGi 



aiMf 



lANT 



"CLKlN H6EN 

CS 

So 

bDsv 

>M>1XI>M 

MAX167 sMn^ 



80R12BIT 
> DATMUS 



0.1nF 



Figure 3-21. 



mngto +SV 12Mt A/D OpenUon 



Because the MAX162/172 and MAX1 63/1 64/1 67 use 
only 135mW of power, they can easily be powered from a 
single +5V supply with the help of this low power DC-DC 
conversion circuit. A MAX636 generates a -1 2V (or a -1 5V) 
supply for the converter's V- input. A potential problem 
when using switching power supply circuitry with high 
speed A/Ds is increased noise but as the accompanying 
plot shows, the A/Ds' conversion noise is still quit© low with 
this circuit. 




lOOllF 



vs 

Vfb -Vout 
V* MAXB36 U 



250|;N 




10liF 



MAX162 
MAX172 



T 



ONLY POWER CONNECTIONS SHOWN FOR CLARITY 



Figure 3-23. 



Figure 3-22. 



3-18 



Optocoiv'Afv Isolate Data-Converter Signals 



ICZA 



OH- 


OH 


SER 


OG 


■HC595 


OF 


SDK 


OE 
00 


RCK 


oc 

OB 


scm 


OA 




-01000- CLOCK 
7 



IC3 
74HC595 



' 0B10 

- DBS 

- 068 



ICS 
74HC595 



- DB7 
' D86 

- DBS 

- 0B4 

- 083 

- m 

- DB1 

- oaodSB) 



OPTOCOUPIER 
ISOLATION BARRIER 



Figure 3-24. Serial data transmission from the A/D converter (IC1) simplifies this isolated conversion system by reducing the number 
of optocouplers required. 



Conventional methods for transmitting analog signals 
across a voltage-isolation barrier involve isolation amplifi- 
ers based on optical, magnetic, or capacitive-coupling 
techniques. Maintaining DC performance and low noise, 
however, makes these amplifiers expensive. A less costly 
alternative, useful when the data is required in digital form, 
is to convert the signal on the isolated (or "cable") side of 
the barrier with an A/D converter, and then to pass the 
digital data across the barrier using optocouplers. The use 
of a serial-output converter simplifies this approach by 
reducing the required number of isolated lines to ttiree 
(Fig. 3-24). 

Start Convert and Clocl< inputs from the system (or 
"logic") side of the isolation barrier control the 12-bit, low- 
power A/D converter (IC1 ). Separate 6N 1 36 optocouplers 
convey these two signals across the isolation barrier. A 
third 6N136 transmits the converter serial-output signal 
back to the system side, where shift registers IC3 and IC4 
convert the bit stream to a 1 2-bit parallel output. IC2A and 



IC2B assure adequate current drive to the optocouplers, 
which can withstand barrier voltages as high as 1500V. 

Note that you must provide isloated power to the con- 
verter: 11mA max at 5V, and 8mA max at -15V. The 
converter produces 10,000 conversions per second when 
driven with a 140kHz clock. Faster optocouplers can in- 
crease this rate to the converter speed limit (over 100k 
conversions per second) by passing higher clock and data 
rates across the isolation barrier. Figure 3-25 Illustrates 
system signal-timing relationships. 

Noise pickup on the relatively slow optocoupler transi- 
tions can cause false triggering at the converter edge-sen- 
sitive Start input. To avoid this problem, set the rising edge 
of Start Convert to occur when the input ignores transitions, 
i.e. , before the conversion ends. Making the Start Convert 
pulse at least two clock cycles long meets this condition. 
The falling edge of Start Convert triggers the next conver- 
sion, and also causes the results of the previous conversion 
to appear at the parallel data outputs. 




Figure 3-25. Start Convert pulses must repeat every 14 clock cycles to maintain data synchronization at the output. The falling edge 
of Start Convert should occur at the falling edge of Clock as shown. Clock can have any frequency up to 140kHz. 



3-19 



SOOkHz A/D Conversion With Two MAX162 ADCs 



Two MAX 162s create a low cost 12-bit A/D that does a 
conversion every 2^8. The A/Ds connect to one Input signal 
and send their outputs to one 3-state bus. With a 4MHz 
clock, each MAX1 62 converts every 4jis. The control logic 
starts conversions first in one MAX162 and then ^s later 
in the other, and synchronizes the sample-hold with the 
A/D. HOLD mode is started by the control logic, but is 
sustained by the MAX162s BUSY output. The A/D output 
is then latched into the 74HC574s. 



The circuits throughput rate is 500,000 conversions per 
second (a new conversion every 2^s), but the output is 
updated 4ns after a conversion is begun, because of the 
pipeline architecture. The circuit provides a low cost 
means of increasing converter speed, without sacrificing 
other specifications, since neither the A/Ds nor the sam- 
ple-holds n^d to be capable of 2\is performance. 



JJ.5V, 

input" 



4MHz 
CLOCK 



3.e3K 



3.83K 



AGNO — 

,5v^WV-t—||— 



SAMPLE 

HOLDS 




HA5330 



UP 74HCm 
fie 




MAX162 



Vref _ 
CS BY CK 



MAX162 



CS BY CK 



OUTPUT 
LATCHES 



74HC574 



74HC574 

4 INPUTS 



< INPUTS 

LE 



DECaUnjNG. POWER, mo AND SROUNE» comm. L« NOT SHOWN 



Figure 3-26. 



3-20 



The noise and linearity of high performance A/Ds can be 
tested without expensive measurement instruments using 
the circuit shown in Figure 3-27. A low amplitude triangle 
"dither" waveform is summed with a variable DC level and 
connected to the A/D. The 3LSBs of the converter output 
are summed together through 3 weighted resistors to make 
a 3-blt "DAC". The input signal and DAC output are con- 
nected to an XA' oscilloscope so that a properly fuctioning 
A/D generates a staircase waveform. Eight bits of the A/Ds 
range can be viewed at one time and any part of the 
converter's input span can be checl<ed by varying the DC 
level at the input. Output staircase waveforms from linear, 
noisy, and nonlinear 12-bit A/Ds are shown on the next 
page. 

Since nfiost of what Is used In this test circuit is already 
included on a typical data acquisition board, a linearity "test 
point" could be added for in-circuit A/D testing by including 
a separate Input resistor (at TP1 ) and the 3 output resistors 
(atTP2) on-board. 




Figure 3-27. 



Triangle Waveform Generator 



This circuit generates a symmetrical lOmV p-p triangle 
waveform which is summed with a DC level and connected 
to the A/D analog input for noise/DNL testing. The DC 
LEVEL input offsets the triangle waveform over the input 
range of the A/D. The 10mV amplitude amounts to an 8LSB 
span for a 1 2 bit, 5V full-scale A/D. 

The frequency of the sawtooth is critical, and depends 
on the speed of the converter to be tested. The frequency 
should be below the point at which the input moves 1/2LSB 
during a conversion (if there is no input sample-hold). 
Generally lOHz to 1l<Hz is used. The RlxCI product 
determines the sawtooth frequency. The oscilloscope "X" 
Output is the same frequency, but is 3.3V p-p and Is not 
^fa©tBd by the DC LEVEL input. 

Component values are not critical, and 5% values 
should work well. The ICL7641BCPD quad op-amp was 
used in our tests, but most other other quad op-amps will 
not alter the performance. 

Take care to avoid noise on the sawtooth input to the 
ADC. Use short shielded cables, decouple the op-amp 
power supplies, and use single point grounding. Such 
precautions are needed because each 610|iV of injected 
noise represents 1/2LSB. 




Figure 3-2B. 



3-21 



lAiMiriMtMalM Fiw* A/D 



Note the very small amount of overlap from one step to 
the next indicating less than 1/4 LSB of noise. Also, the 
uniform step size indicates low DNL error. 



Pfgure3-29. 



Moi»yA/D 



Here the step sizes are still relatively uniform but there 
is severe overlap and "bleeding' from one step to the next. 
With this particular converter, as many as 4 or 5 different 
conversion results are generated for one DC input. 



Figure 3'30. 



Differential Linearity Error 



This A/D exhibits a "wide code" (top of waveform) at 
mid-scale where the A/D gives one answer for several LSB 
span of input signal. This is followed by a very narrow 
(bottom of waveform) code which is almost missing en- 
tirely. The trace also shows that on some conversions the 
output stays on the same code for as much as 3 LSBs. 



Figure 3-31. 



Ant Cmivmi^ fflfMft Timn^mnts 



Wtth flash and successive approximation A/D convert- 
ers, input transients can sometimes be observed on the 
analog input signal while the A/D is performing a conver- 
sion. Occasionally, attempts to filter this noise at the A/D 
input changes the converter calibration. Are these tran- 
sients a problem, and if so, how/ should they be dealt with? 

Many new CMOS A/D converter ICs use what is called 
"charge balanced" or sampling circuitry. This technique is 
becoming popular because it automatically corrects sev- 
eral internal A/D errors, like comparator offsets, which 
otherwise impair accuracy and linearity. The input tran- 
sients referred to above are sometimes a side effect of 
charge balanced circuitry but, as explained below, they 
can usually be ignored without impairing A/D performance. 

Part of the charge tjalanoed input strusture on many 
A/Ds is a small (1 to 35pF) capacitor inside the A/D that 
must be charged by the input signal. Depending on the 
type of A/D, the capacitor may get charged at each con- 
version (see Figure 3-32) or sometimes as often as every 
A/D clock cycle. The capacitor charging current flows into 
the A/D's analog input and sometimes generates a short 
voltage transient at the input terminal. The transient's size 
is related to the input signal's source impedance. The 
lower the source impedance, the lower the transient ampli- 
tude. 

The A/D input is really the input of one or more compa- 
rators. Some time after the input capacitance starts charg- 
ing, the comparator decision is digitally latched. This 
happens one time per conversion in flash converters, and 
several times per conversion in successive approximation 
converters. The length of this time depends on the speed 
of the A/D, and can vary from hundreds of nanoseconds to 
several microseconds. The key to remember is that A/D 
accuracy and noise is not affected as long as the input 
spikes ^ttle before the comparator latches. In effect. 



charge balanced A/Ds are designed not to "look" at the 
input while the transient occurs. 

If the input spike settles before the A/D "looks", then no 
filtering is needed. Leaving this transient unattended may 
not seem like the best low noise "solution", but there are 
really no adverse effects from doing just that, as long as 
the spike settles in time. In fact, filtering with a capacitor 
at the A/D input can actually create a gain error by integrat- 
ing the spil<e energy from a time when the A/D is not 
"looking" at the input signal to a time when it is. 

If the spikes do not settle in time, then the source 
impedance of the signal is probably too high. Many AJDs 
have a maximum specification for this, ranging from a few 
ohms to several kilohms. The only solution to this imped- 
ance problem is to add a low output impedance buffer or 
op-amp between the signal source and the A/D. Once this 
is done, there are no longer restrictions on filtering, be- 
cause it can be done at the buffer input rather than the A/D 
input terminal. 



MAX150 INPUT 



RO 




VnCCOQEOBfNOEKn 



Figure 3-32. The input of some high speed CMOS A/Ds can be mod- 
eled as type of sample-hold. The 32pF Input capacitance must be 
charged at each conversion. Vn is code dependent but is nominally 
2.Sv\ The input current is: Iin = Convjsec x (Vin -Vn)x Cm 



Figure 3-33. 

The photo of Figure 3-33 shows the READ input, INTER- 
RUPT output, and the analog input of a MAX150 running at 
250,000 conversion/sec. The input signal is OV through a 
Ikfl source resistance. Rs is larger than recommended to 
highlight the input transient. Again, no conversion error is 
generated by these spikes as long as they are allowed to 
settle before the internal comparators are latched (approx. 
600ns in the READ interface mode). The second transient 
in the photo occurs after the conversion is finished (when 
INT goes low) and has no effect. 



3-23 



Driving a SAR A/D In^it 



Figure 3-34 illustrates the disturbance at the input pin of 
a MAX1 62 1 2-bit A/D that is clocked at 1 MHz. The input is 
being driven by an OP27 amplifier. The amplitude of the 
pulse disturbances at the input generally decrease as the 
conversion takes place. This is because the reference 
DAC's output transitions become smaller as the A/D zeroes 
in on tlie answer. 

If the driving device (op-amp or sample-hold) does not 
accomodate the load changes presented by the A/D, the 
voltage at the analog input terminal deviates from the 
desired value for a short time. These "glitches" are syn- 
chronous with the ADC clock and may be 1 0mV or more in 
amplitude. Even though lOmV is well above 1LSB in 
amplitude, the pulses do not degrade the A/D's perfor- 
mance IF they settle before the comparator's output is 
sampled at the next falling clock edge. 

If the open loop output impedance of the driving ampli- 
fier is too high (enabling the glitches to be generated), or 
if its settling time is too long (enabling the glitches to persist 
for more than a clock cycle), some errors may be generated 
even with slow moving input signals. It is interesting to note 
in the photos that the MAX162 allows 1 1/2 clock cycles for 
the first glitch to settle, but only 1 clock cycle for each 
subsequent pulse. This is Intentional. Since potentially the 
largest disturbance occurs at the first bit test in the conver- 
sion, the A/D allows more settling time. 

Operating symptoms of an inadequate op-amp or sam- 
ple-hold are missing codes when the analog input signal 
is DC and free of noise. A good test is to slow down the 
A/D's clock, giving the driving device more time to settle. 
Figures 3-35 and 3-36 show this test in practice with an 
OP27 driving the A/D input. With a 4MHz clock (Figure 
3-36, 4ns between conversions) the OP27 does not settle 
within one clock period, and conversion errors are gener- 
ated. With a 2MHz clock however (Figure 3-25), the OP27 
settles adequately and 1LSB performance is achieved. 

If the desired conversion rate is below the A/D's limit, 
amplifiers with less than optimum output specifications 
may be used. The A/D clock of course has to be slowed. 
The approximate speed at which various op-amps can 
perform adequately with the MAK^ 62 is listed on the follow- 
ing page. There is some performance variation between 
devices made by different manufacturers of the same 
device type. 



-If 




Figure 3-34. 1MHz Clock 



AS 




Figure 3-^. a^HzCkick 



1 










1 



Figure 3-36. 4MHzCk3cl( 



3^ 



MBfkm^ AmiMSmr StimtMm 



Things to watch for when picking an op-amp to drive the 
MAX162 or MX7572 are: 

• Thermal tails on output settling are a frequent 
characteristic of "high slew rate" op-amps with 
undefined settling specs. 

• Amps with 0.01% settling specs usually do sub- 
stantially better than those with only 0.1% num- 
bers. 

• Input offset voltage and offset drift. 

• High frequency PSRR - This affects settling time 
but unfortunately is not specified by many manu- 
facturers 

• Some general purpose amplifiers will wori< rea- 
sonably well as input buffers at reduced A/D 
clock rates: 

CA3140, OP27- 1/2LSB DNL at 0.6MHz 
1LSB DNL at 0.7MHz 

LT1055, LF411- 1/2LSB DNL at 0.6MHz 
1LSB DNL at 0.7MHz 
2LSB DNLat2MHz 

The amplifier-A/D combination should be checked with 
a faster A/D clock than the design requires. 

A SAR A/D input is typically driven by an op-amp or 
sample-hold, however, care must be taken with high speed 
A/D like the MAX1 62, because it's tempting to assume that 



high frequency input signals can be converted accurately 
with no sample-hold. A 12-bit converter with a 5V full scale 
range resolves input changes of nearly ImV, and signals 
as slow as 1kHz change by this amount in well under the 
3.25ms conversion time of the MAX162. In fact for fuJl- 
scale signals above only 1 1Hz, some sort of hold functkxi 
has to be added if the conversion is to be accurate to 12 
bits. 

The acceptance criteria for sample-holds suitable for 
use with the MAX162 are: 

• Aperture time fast enough to capture the highest 
input frequency - 30ns will preserve the 

MAX162's performance, 

• Acquisition time of about 500ns, 

• Hold step error (switching glitch) of less than 

1/2LSB (i.e., less than 600|iV), 

• Hold droop less than 1/2LSB in the cycle time of 
the ADC (often about 4ns), 

• Input offset voltage <600(i\/ over temperature 
range. 

If an off-the-shelf sample-hold is required, the HA5330 
is a good match for the performance of the MAX162. Its 
offset error, acquisition characteristics, and output stability 
are all sufficient to avoid degrading the accuracy of the 
MAX162. 



3-25 



OMM dreutt 



This is tlie analog portion of a digital multimeter. The 
precision attenuator resistors on the left side are connected 
to a set of kelvin-sensed analog switches which are con- 
trolled by the microprocessor through bits in the MAX133 
control registers. The analog switches are controlled by 
the microprocessor to select 400mV. 4V, 40V, 400V, and 
4000V ranges. The external AC-DC converter can be 
bypassed for DC measurements or inserted into the signal 



path for AC measurements, again under the control of the 
microprocessor. Similarly, the selection of the current 
input and control of the active filter are also controlled by 
the microprocessor. 

The MAX1 33/1 34 does all of the critical timing related to 
the actual A/D conversion, but higher level control and 
setup functions are controlled by the microprocessor via 
the MAX133 control register bits. 



PIN NUMBERS ARE FOR PlCC 
PACKAGE 



'mm. 



i — wv^ 



2pF 



lOtk 



♦-^vvv 



if 



w*- 



655mV(50H!) 
545mV(60H!| 



32kHz 

HO 



SOURCE 


COM Vhef 


0SC1 


OSCZ 


INLO 
10M 






EXT «C OUT 


1.1M 






EXT AC IN 




yi/iyixivM 


niTHI 
AMP OUT 


mk 


MAX133 

MAxm 




FILTER 
AMPIN 


lOk 






FILTER 








RESISTOR 
OUT 


Ik 

NA:-MAX133 
DGN0-MAX13 
DGND 






FILTER 
RESISTOR 
IN 

INT OUT 


400MV 


CUR BUF1 


BUF2 


INT IN 



MATCHED ReSBrOKS 



22nF 




EXTERNAL 
AC-DC 

OR 
RMS-DC 



Figure 3-37. 



+5V Powered DVM with ±3.SV Input Range 



The MAX138, MAX139, MAX1 40 allow DVM functions to 
be easily included in single +5V powered boards. Either 
analog input may operate above or below ground, facilitat- 
ing direct measurements of ground referenced signals (or 
current shunts) in single supply systems. These parts 
accomplish this by generating their own V- supply with an 
internal charge pump. Up to 1mA may be drawn from the 
chip's V- output (approximately -4.8V) to power other cir- 
cuitry. Here, a -h5V logic supply is used to power a 
MAX139 and LED display. The same approach can be 
used with LCDs and low current LEDs by using the MAX138 
and MAX140, respectively. 



±200mV 
FULL SCALE 
(VBEF=100mV) 

1M 

ANALOG 

INPUT 




(ODD 



Figure3-38. 



IL 



I 



. 4'20mA Cunwit temi Potmrad Indleator 



4-2IMIA10OP 
(BWERPOLAWTV) 




J 000 
(333 



C21|f 



Figur»3-39. 



The unique features of the MAX138 allow It to be used 
in low voltageapplications that were previously not feasible 
for display driving A/Ds. In this example, a 0-100,0% 
digital indicator (LCD) measures, and is powered from, an 
industrial 4-20mA analog current loop. The circuit con- 
sumes only 4.5V when inserted in the line. A full-wave 
bridge at the input allows either input polarity to be mea- 
sured, but if the input polarity is known, the full-wave bridge 
can be omitted, reducing the circuit's operating voltage. 



A voltage proportional to the loop current is developed 
across a 10fl sense resistor, R1 . A 3.3V zener clamps the 
MAX138's supply as the current through the loop changes. 
IN HI (pin 31 ) is offset negatively and trimmed by R8 so that 
the display reads "000.0%" with 4mA loop current. R6 is 
set for an indicaton of "100.0%", with a 20mA loop current. 
R8 and R6 can also be adjusted so the display reads 
directly in milliamps. 



3-27 



Stogfe CMp DVM Ap/Hleatbms 



Figures 3-40 and 3-41 show the basic MAX130 and 
MAX131 applications circuits. Note that the circuits for the 
MAX130 and the MAX131 use different values for the 
integration and oscillator components. The l\/1AX130 can 
operate using the MAX131 component values, but the 
MAX131 will not operate using the MAX130 component 
values. The lower supply current device, the MAX131, 
must always use the higher value integrator resistor as 
shown in component value table in Figure 2. With a typical 
0[3erating current of only 65(JjA, the IVIAX131 will operate for 
about 8500 hours when powered by a typical 550mAhr 
alkaline 9V battery. The MAX130 will operate for 2200 
hours with a 550nrtAhr battery. 

CompatibilHy with ICLTlOe and ICL713e 

The MAX130 and MAX131 can directly replace the 
ICL7106 and ICL7136 with no circuit layout or component 
value changes in circuits which are designed to use the 
Common voltage as the reference. In ICL7106/7136 cir- 
cuits which are designed to use an external bandgap 
reference, the bandgap reference diode can be removed 
with no circuit changes required. Normally the value of the 
resistor between V+ and the bandgap reference diode is 
the only component value that must be changed to allow 
the removal of an external bandgap reference diode. 

Sfngte 5 V Supply Operation 

Rgure 3 shows typical components for -h5V single sup- 
ply MAX130/131 operation with a 200mV full scale range. 
Since the common voltage is 3.05V below V-i-, it is less than 
2V above ground. This means that the integrator swing 
must be reduced by increasing the value of the integrator 



W"^^ 30 




0.22(f r ^ 



CR£f+ CrB=- 




IN HI 


2-19 
22-2S 


INLO 
COMMON 


POL 

PB 


MAXm 


BUFF 




A/Z 


REFHI 


MT 


RtFLO 


OSCz OSCj 


OSCi 



Cose 



JOOP 



21 MINUS SIGN 



BACKPLANE 
DHVE 



FULL SCALE 
INPUT 


vref 


Hiiir 


200.0mV 
2V 


1CX).QinV 
IV 


Aim 

470KQ 



Fmre 3-40. Maxim MAX 130 Typical Operating Circuit, 
3 Conversions per Second 



ANALOG 
INPUT 



0.01|lF-j- 30 

I 32 




aiitf 


CdEFt Ob- 




INHI 


2-19 
22-25 


IMLO 
COMMON 


POL 
PB 


imi3i V, 


BUFF 




Afl 


ffiFHI 


INT 


REFLO 


OSC: 0SC3 


V- 
OSCi 





SEG 
DRIVE 



FUU. SCALE 






MPUT 


VREF 


Rwr 


20O.OmV 


lOO.OmV 


180KQ 


2V 


IV 


I.SMQ 



Figure 3-4 J Maxim MAX13 1 Typical Operating CImult, 

3 Conversions per Second 

capacitor. The value shown will result in about IV to 1 .5V 
integrator swing. 

The voltage at the buffer input must stay in the common 
mode voltage range of (V- -i- 1 .5V) to (V-i- - 1 .5V). With the 
maximum common voltage of 3. 1 5 and a full scale negative 
input of -2G0mV, this limit is met with a 4.85V or greater 
supply. 

With a -f2V full scale, the input buffer will exceed its 
negative common mode voltage range when a -2V input is 
applied with less than 6.7V supply voltage. 

Operation on ±SV Supplies 

The MAX1 30/1 31 can easily be used with ±5V supplies. 
Connect V+ to -t-5V, V- to -5V. If the voltages to be 
measured are referred to ground, then connect IN LO to 
ground. In most cases, REF HI and REF LO should be 
connected to a resistive divider string between V-i- and' 
Common, as shown in the standard application circuits of 
Figures 3-40 and 3-41 . If Common is not used to generate 
the reference it can either be left floating or can be con- 
nected to ground. If the MAX130/131 oscillator is driven 
by 5V logic, or if the MAX130/131 LCD outputs drive 5V 
logic, then connect the Test pin to ground. If the 
MAX130/131 open circuit Test voltage is above ground, 
then connecting Test pin to ground will set the internal 
digital ground to approximately ground. If, however, the 
open circuit Test voltage is negative, then the internal 
digital ground voltage will remain negative, additional V-t- 
supply current will be drawn, and the LCD segments will 
continue to swing below ground. The OSCI pin, however, 
will respond to a voltage swing of OV to 5V in either case. 



3^28 



0.t|if 



1U 



t 



33 



2-19 
22-25 



CB£f* Om- 
INHI 
INLO 

I 

COMMON 

MAXm 
MAX131 

BUfF 




SEG, 
DRIVE 



JOOO 
IDDD 



BACKPtANE 
DRiyE 



FULL SCALE 
INPUT 


Vrif 


2ao.0mV 


lOO.OmV 



Figure 3-42. Single Supply +5V Operation 

Low Batterjf Ovtoetor Circuits 

Since the voltage between Common and V+ is between 
2.95V and 3.15V until the voltage between V+ and V- falls 
to less than 4V, a simple low battery detector can be made 
using a transistor voltage detector as shown in Figure 4. 
When Q2 is off the Low Battery segment is driven in phase 
with the backplane and is oft. When Q1 and Q2 turn on, 
the Low Battery segment is held approximately midway 
between the Test voltage and V-f. and the Low Battery LCD 
segment becomes visible. Q1 and Q2 turn on when the 
voltage at the base of Q1 is one base-emitter voltage more 
positive than Common voltage. With the 4.7MQ/4.7MS1 
divider sliown, this occurs when the battery voltage is 



approximately 6V. Decrease the value of R1 to lower the 
battery detection voltage. 

A similar circuit using only one transistor can be made 
using the Test pin as the reference voltage rather than the 
Common. Since the Test pin voltage may range from 4V 
to 6V, the low battery detection voltage when using the Test 
pin as a reference is not as accurate as shown here, where 
the Common voltage is the reference. 

LCD SEGMENT DRIVE 




V-t 


MAX130 


MAX131 




BP 


COMMON 




t 


- 



TO LOW 
BAHERY 

SEGMENT 



LOGIC OUTPUT 



>M>lXiyM 

MAX130 
MAX131 

TEST 




Figure 3-43. LxMf B^my Detectors 



3-29 



Add a Range Switch to Your DPM 



There are many single chip Digital Panel Meter chips 
and modules available today at low cost. However, these 
meters are limited to a single input voltage range and 
cannot select different voltage ranges. This feature can be 
added by connecting a switched voltage divider to the 
input of the DPM. If solid state analog switches are used, 
the switch resistance must be considered in the voltage 
divider equations. The problem is that the resistance of the 
analog switch is not known beforehand and varies with 
temperature and power supply voltage. 

To overcome this problem, the differential inputs of the 
DPM module can be used to remove the IR drops across 
the analog switches which are in series with the divider 
resistors as shown in Figure 3-44. A second analog switch 



has no current flowing in it and connects the MAX 138 
INPUT LO pin to the bottom of the precision voltage divider 
resistor. This allows the MAX1 38 to ignore the voltage drop 
in the current carrying switch. 

The analog switch requires a positive and a negative 
supply voltage if it is to pass positive and negative input 
voltages. One possible solution is to generate tfie negative 
voltage with a charge pump inverter circuit such as the 
ICL7660. A better solution is the MAX138, which has a 
built-in charge pump to generate a negative supply. With 
a low current analog switch such as the Maxim DG509A 
Quad differential analog switch, the switch can draw its 
negative supply from the MAX138 V- pin as long as tfie 
current is less than 1/2 mA. 



3 1/2 DIGIT LCD DISPUV 




Figure 3-44. 



^0 



Portable Digital Thermometer 



You can build a simple, compact digital thermometer 
using a single-cliip thermometer amplifier such as the 
MX594. This device includes cold-junction compensation 
and provides a laser-trimmed, 10mV/°C output for type J 
or K thermocouples. The MX594 can operate with a single 
positive supply, but to measure negative temperatures it 
must have a split or bipolar supply - not a welcome 
requirement in portable applications. 

By combining the MX594 with a DVM chip that gener- 
ates its own negative supply (IC2) you can implement a 
portable, 2-chip digital thermometer that operates on a 
single battery. IC2 includes a charge-pump circuit that 
inverts the applied positive-supply voltage and produces 
a negative voltage of the same magnitude. This supply 
voltage (available on pin 26) provides as much as 0.5mA 
to external Icmds such as the MX594. 



These devices work well together because the MX594's 
negative-supply terminal draws only 300[iA maximum. 
With a liquid-crystal display and a 6V supply, the resulting 
thermometer can measure and display temperatures from 
-350 to 400°C. With a 3V lithium battery, the range is -50 
to 100°C. 

Accuracy depends primarily on IC1 , whose output volt- 
age is rated ±1 °C for A-suff ix versions and ±3°C for C-suff ix 
versions. You can improve these specs by adding a 
trimpot adjustment as described in the data sheet. A 
suitable external reference (in place of the lOOppm (max) 
bandgap reference in IC2) provides more stable readings, 
as does the use of low-tempco resistors for R2 and R3. 



IRON 

(cmoMBo 



(2JVT07V) 




CONSTANTAN 
(AUML) 







-IN 






VO 






Fb 




M)S94 






MXS95 






Id 




v+ 






COM 


-MM 


V- 







1 




r 



FEOZOS-C 
(«N0) 




Hgure 3-45. This portable digital thermometer measutes positive and negative temperatures, yet requires only a positive supply voltage (V+). 
The V- supply generated mthm IC2, acces^bh at its filter-capacitor termmal (pin 26), provides the negative voltage needed by IC1. 

3-31 



True RMS Digital Meter 



A low cost true RMS reading AC digital voltmeter using 
just two integrated circuits plus supporting circuitry and 
LCD display is shown. The MAX130 is a 3 1/2 digit inte- 
grating A/D converter with precision bandgap reference. 
The input attenuator is AC coupled to pin 6 of the MX636 
buffer amplifier. The output from the MX636 is connected 



to the MAX130 to give a direct reading to the LCD display. 
The circuit shown will exhibit sonne noise with MAX131 in 
the dB mode due to the MAX131 internal charge pump 
oscillator. Add a lowpass filter to the dB — ► IN LOW 
signal path. 



o- 



200mV 
-0*0- 



m ' 
sat ' 




Mxm 


4Vs 


-Vs 

Cm 






COM 


dB 


BUFOUT 


Rl 
lour 


BUFIN 




R15 

0.01 )if 



3 1/2 DIGIT 

A/D 
MAX13B/131 



9V 

BATTBY 



31/2 
DIGIT 
LCD 
DISPLAY 



Figure 3-46. A Portable, High Z Input, rms DflM and dB Meter 



Low Cost Temperature Meter 



This low cost meter depends upon the -2,2mV/°C tem- 
perature coefficient of the Vbe of a diode-connected silicon 
NPN transistor. Adjust the Zero Adjust potentiometer after 
placing the sensor in a 0°C ice bath. Then raise the sensor 
temperature to the upper end of the temperature range and 
adjust the Scale Factor potentiometer until ttie correct 
reading is observed. 



For a limited temperature range, a single point calibra- 
tion is sufficient: set the reference voltage to 220mV with 
the Scale Factor Adjust then adjust Zero until the correct 
temperature is displayed. If the temperature coefficient of 
the sensor transistor has been measured, set the refer- 
ence voltage to 100 times its Vbe change per 'C. 




SCALE FACTOR ZERO 
ADJUST ADJUST 



Rgure3-47. 



3-32 



Km Tmmpenaim KMer 



The common platinum resistance sensor (also called 
PT100, RTD, or PRT) is a repeatable, stable, and reliable 
sensor. It is, however, nonlinear. This circuit compensates 
for the nonlinearity by adding a correction signal to the 
reference voltage via the op-amp A. 



Op-amp B provides a zero offset correction by making 
the voltage at Input Low equal to the voltage at Input High 
when the RTD resistance is equal to that of RO. Since the 
MAX136 is used in the ratiometric mode, no voltage refer- 
ence is needed. 




TEMP 


RO 


R1 


R2 


F 
C 


93.02 
100.00 


g.34kn 

15.17kO 


219.13 
391.05 



Figum 3-4S. 



.Opermting 0¥IMA/Dm without Reference Capacitor 



Usually, the reference capacitor is used as a floating 
voltage source to provide either a positive or negative 
reference during the de-integrate phase, depending on 
the polarity of the input signal. If the input signal always 
has the same polarity, the reference capacitor can be 
eliminated by feeding the reference voltage directly into the 
Cref pins. 

For inputs that are always positive, connect Cref+ to 
Common and Cref- to a negative reference voltage. If the 
input voltage is always negative, connect Cref- to Com- 
mon and apply a positive reference to Cref+. 

This circuit can also be used to perform a "1/X" function, 
where the displayed reading is inversely proportional to the 
voltage being measured. For 1/X readings, connect the 
voltage to be measured to the CREF- (-i- or -) terminal, and 
feed a fixed negative reference voltage into IN HI. Typical 
applications include RPM meters and conductance me- 
ters. 



MAX130/131 
MAX136 

MAxm/muo 




10k 

SETVuEF-mOmV 



-^t: -I- 



Figure3-49. 



3m 



selected by an 8-channel multiplexer, DG508A. The 
ICL7109 Clock and Busy signals drive a CD4040 counter 
such that a different reference voltage is selected for each 
512 counts during the A/D's Deintegrate phase, starting 
with SI for Deintegrate counts through 511. 



spoiiuing lo approximately aiii counts, men adjust the 
voltage at S2 for the correct reading \N\th an input corre- 
sponding to approximately 1024 counts. Continue this 
procedure for S3 through S8. If the sensor's output func- 
tion is repeatable from unit to unit, the voltages at S1-S8 
can be generated with fixed precision resistors. 



4SV 



NONUISAfl 
SBBBK 



icLnas 



BUF 
OSC 

OSCIN OSCOUT OUT 



V. V- 


SI 






S2 


D 


S3 




S4 




S5 




S6 


SI 






S7 


AO A1 


S8 

A2 



6BpF 





010 011 012 


RESET 






CD4040 


CIKI 


VSS 



Figure 3-50. 



iMgmrithnUe RmOo Mmtmr 



This circuit displays the logarithmic ratio of two input 
voltages, Vi and V2. The ratio of R1 and R2 should be 
precisely 1 to 9. Calibrate the circuit by adjusting RP for a 
reading of 10.00 when Vi = 10 V2. 

Typical applications include audio level nneasurements, 
densitometry, and colorimetry. The resistor Rp in parallel 
with the integrate capacitor makes the voltage waveforms 
on the capacitor exponential rather than the linear ramps 
of the normal configuration. 

Unlike normal, linear operation, the accuracy of this 
circuit depends on both the ratio and the absolute value of 
the external components. 



LOGARITHMIC RATIO METER 



k = 09 
• l»(R1*R2) 





31 


BUFF INT 
INHt 








30 


IN in ^^^OO^A 


> "1 

> 1M 


36 


MAX130/131 

MAX136 
MAX138/139/U0 
REfHi ICL7136 
tCL7137 


< R2 

< 9M 




35 


REf LO 




32 


COMM 







iUUU 



WAVEFORMS 




Figure3-51. 



. EMtenMtg A/D Common Mode lUmgm 



The input range of most integrating A/Ds is limited to 
approximately 1 .5V below V+ and 1 ,5V above V-. How- 
ever, since the A/D's input impedance is high, differential 
signals with common mode voltages outside the chip's 
power supplies can be easily measured. This is done by 
connecting a resistive voltage divider to each input pin. 

In this example, the current from a +24V supply, flowing 
to a grounded load, is measured by sensing the differential 
signal on a current sense resistor at the 24V source. This 
signal is divided by identical voltage dividers at the A/D HI 
and LO inputs. The resulting measurement may be scaled 
by adjusting either the sense resistor or the A/D reference 
to correct for losses from voltage divider attenuation. 



ion LOAD 



R1 

soot 



mi 



m 
gook 



470k 

-AAAr- 



m 



-AAAr- 

«0k 





t 








MAXm 




ICL71XX 




IN HI 


' 

o-iiif :±: 


mw 


1 > 



Rgure3-S2. 



) 



The MAX1 39 and MAX1 40 are 3 1/2-digit A/D converters 
that include built-in LED-display drivers. Adding an exter- 
nal diode, resistor, and switch lets you freeze" the display 
reading on command. 

By closing the switch you issue a hold command that 
simply latches the last conversion result (rather than hold- 
ing the analog input voltage as a conventional track/hold 
amplifier would do). Because the converters' dual-slope 
conversion circuitry provides approximately 2.5 conver- 
sions per second, the display reading represents a con- 
version within the preceding 400 milliseconds. 

When driven to a high logic level as intended, the TEST 
terminal (pin 37) provides a display check by lighting all 
led segments simultaneously. Driving this pin as shown, 
however, to the region between logic levels (i.e., between 
1 .5V above DGND and 1 V below ) latches the last digital 
output and prevents updates, stops the 40kH2 clock oscil- 
lator, and disables the converter's analog section by shut- 
ting off the internal charge-pump voltage inverter. Diode 
Di assures that the clock oscillatcpr stops in the correct 
state. Note that while in the hold |mode (Si dosed), the 
chip draws from 5 to 6.5mA through Ri . 



RUN 



. m 
. soo 



1N4148 



lESI 


CAPt 


INW 1 


MAXm 


MAXm 


INLO~J|~ 






GND 







31/2-DISir 
LEODISPUY 



Figure 3-53. 



I 



I 



3-36 



EUgHml ReMgenitor Theemometor 



This simple digital thermometer is turned on by opening 
the refrigerator door via a photoresistor. When the refrig- 
erator door is closed, the circuit draws less than ^^^A. 

The photoresistor (R5) is high resistance when the re- 
frigerator light is off. This turns off the n channel MOSFET 
(Q1) and shuts down the rest of the circuit. When the 
photoresistor is illuminated, Q1 turns on and supplies the 
ground voltage to the rest of the circuit. 

The MX590 PTAT (Proportional To Absolute Tempera- 
ture) current generator forces I^A/degree Kelvin into the 
^/IAX480 summing junction. Resistor R4 offsets the current 
for the more conventional Centigrade thermometers. R3 
then converts the current into a voltage (10mV/°C) and 



feeds this into the IN HI terminal of the MAX138. The 
MAX 138 is a 3 1/2-digit dual slope converter which takes 
this voltage and drives the display with O.TC resolution. 
The total power dissipation is approximately 400^ when 
the circuit is active and <1nA when disabled. 

To calibrate the system, insert the MX590 into an ice 
bath and adjust R4 resistor to read zero. IF R3 is a 0.1% 
resistor, then adjusting the REF HI to REF LO voltage 
(RRF1 ) to 1 .OOOV will calibrate the scale factor. Othenwise 
boiling water can provide the scale adjustment. 

Also note that the battery generally will last twice as long 
in the refrigerator due to the cold. 



Vdq 




Figures^. 



3-37 



How will your i 

AID really j 
perform? 

Simple test circuits can I 

help you get the most i 
out of integrating A/D 

converters. \ 



Charlie Alien 
Maxim hitcf^vaicd Pvodiicts 
Sunnyvale, California 



Integrating analog-to-digital 
(A/D) converters offer high 
accuracy, nearly ideal differen- 
tial nonlincarity, high power sup- 
ply rejection, and low cost. As 
such, they're often used in dig- 
ital multimeters, temperature 
meters, process control gear, and 
data acquisition systems. 

In many of these diverse ap- 
plications, integrating A/Ds are 
often used under conditions 
other than those for which the 
converter is specified. There are, 
however, some simple — yet ef- 
fective — ways to determine the 
performance of integrating A/Ds 
under the actual conditions of 
your application, as well as 
methods to optimize this per- 
formance. 

While the specific converter 
discussed here is the Intersil ICL- 
7129A, the test circuits and pro- 
cedures are applicable to all pop- 
ular integrating A/Ds. The ICL- 
7129A is a 4y2-digit (±20,000 
count resolution) analog-to-dig- 
ital converter with an onboard 
triplexed LCD. It has full-scale 
ranges of both 2 volts and 200 



1211kHz 




Fig. I. Here's a comprehensive test cir- 
cuit for integraHn$ AID'S that you can v ^ 
apply to virtudU}/ any device type. The A/D \ 
shoxon induda lUrect drive of on LCD. 



3-38 



JUNE 19SS 



millivolts, with 10 microvolt res- 
olution on the low scale. 

The Test Circuit 

The test dicuit shown in Fig- 
uie 1 allows you to directly test 
many of the key spedfications of 
the ICL7129A and other inte- 
grating A/Ds. Details are shown 
in the accompanying table. 

A high-resolution input-volt- 
age source is required to measure 
A/D noise. This voltage source 
must also have good short term 
stability but need not be a high- 
accuracy source. A 6^-digit 
voltage calibrator, if available, 
makes an ideal source. However, 
yeu can also make an acceptable 
input voltage source by summing 
a coarsely-adjusted voltage 
source with an attenuated "dith- 
er" voltage (Figure 2). 

Similar to the "dither DAC" 
arrangement, often used to test 
successive-approximation A/Ds, 
the dither voltage is attenuated 
by a factor of 100 and added to 
the coarse voltage source before 
being applied to the A/D. 

Measure the dither voltage 



with a 4y2-digit multimeter be- 
fore attenuation. This provides 
an effective resolution of 6V2- 
digits referred to the input of the 
A/D under test. (The resolution 
of the input voltage source is 
Moo count of the 4y2-digit A/D 
under test.) 

Noise Management 

Noise is one of the most dif- 
ficult parameters to measure 
quantitatively. Yet, it is often the 
primary factor in selecting an 
A/D converter IC. Most inte- 
grating A/Ds specify a "peak-to- 
peak noise not exceeded 95 per- 
cent of the time." Has value is 
3.3 times the RMS noise, assum- 
ing Gaussian distribution. 

The observed effect of noise is 
jitter, or flicker of the least sig- 
nificant digit (Figure 3). If the 
peak-to-peak noise is greater 
than one count, the A/D will dis- 
play three different residts for 
some input voltages. 

When the noise is exactly one 
count, the display will jtmip back 
and forth between two adjacent 
digits. At Vz count, the display 



will jump back and forth between 
adjacent digits when the input 
voltage is within ±Vi of one 
count of the trcinsition point be- 
tween displayed counts, and will 
show a single reading when the 
noise is not close to a transition 
point. 

To measure noise using the 
transition detection method, first 
adjust the input voltage until the 
A/D displays one reading almost 
all of the time, with only an occa- 
sional display of the next higher 
reading. The higher reading 
should occur approximately once 
every 20 conversions. Record the 
input voltage. 

Next, adjust the input voltage 
upward until the higher reading 
is displayed for almost every 
conversion, with only an occa- 
sional display of the lower read- 
ing. Record this second input 
voltage. The peak-to-peak noise 
is simply the difiFerence between 
these two readings. 

Use Care 

The primary problem with this 
method is that it tends to be sub- 




3.39 



, DISPUY READS 193.25 95% OF 
THE TIME, 193.24 5% OF THE TIME. 



DISPLAY READS 193.24 AND 193.25 
EQUAL NUMBER OF TIMES 




DISPLAY ALWAYS READS 193.24 



193.245 



193.25 



INPUT VOLTAGE (mV) 

Fig. 3. Noise causes A/Ds to have a 
transition region, where more than one 
reading is displayed for a fixed input 
voltage. Noise is defined as the width of 
this transition hand, measured from the 
5 to 95 percent points. 



jective; it is very difficult to de- 
termine the exact voltage where 
the adjacent reading is displayed 
once per 20 conversions. A sec- 
ond problem is that measure- 
ments take several minutes per 
device. Nonetheless, this method 
gives accurate results when care- 
fully performed. It's the pre- 
ferred method for measuring 
noise if the peak-to-peak noise is 
less than one-fourth of a count. 

Noise Testing 

A second method of measuring 
noise is useful for repetitive mea- 
surements, such as quality as- 
surance (QA) screening. Step the 
input voltage in count incre- 
ments and observe the A/D out- 
put for 20 readings at each input 
voltage. Record whether the dis- 
play is "quiet" (only one reading 
displayed) or "noisy" (two or 
more different numbers dis- 
played). Stepping the input volt- 
age ten times puts the chip 
through one entire count. The 
number of "noisy" input volt- 
ages is proportional to the peak- 



For exaini^ if the A/D has 
noise of Vi count, the display 

will typically have jitter on five 
of the ten input voltages applied. 
If the peak-to-peak noise of the 
A/D is only 0.2 count, the dis- 
play will typically be stable for 
eight of the ten input voltages 
and alternate between adjacent 
counts with two of the input 
voltages. 

Due to the random nature of 
noise, repeated measurements of 
the same device may result in 
different readings. The average 
result of several measurements 
will be the true noise of the de- 
vice under test. 

This method requires little 
judgement on the operator's part, 
and about 15 units per hour can 
be sample tested. Since the noise 
of an integrating A/D is rela- 
tively constant for all devices in 
a given lot, a sample size of five 
units is sufficient to characterize 
each lot. 

In addition to evaluating the 
noise level of A/Ds from various 
manufacturers, these noise test 
methods let you determine the 
effect of circuit design changes, 
both in the A/D and in any sig- 
nal preamplication or signal con- 
ditioning circuitry. 

Some of the many items that 
affect A/D noise are auto-zero 
capacitor values, integrator swing 
voltages, full-scale input volt- 
ages, and the physical circuit lay- 
out of analog buffer and integra- 
tor sections. The input voltage 
also affects the observed noise. 
A/D noise is specified near zero 
input voltage, but the noise that 
is near full scale is typically two 
to three times higher than the 
noise near zero. 

Linearity Measurements 

You can measure nonlinearity 
by applying several precise, 
known voltages and recording 
the conversion results. The max- 

}UNE 19S5 



3-40 



imum deviation from a "best fit" 
straight line through the mea- 
sured points is the sum of the 

nonlinearity error plus quantiz- 
ing errors of up to one-half 
count. The quantizing error term 
can be eliminated by finding the 
transition points where two ad- 
jacent codes are each displayed 
50 percent of the time. 

For example, if the display is 
flickering back and forth be- 
tween 0009 and 0010, with each 
reading being displayed about SO 
percent of the time, the digital 
output code is considered to be 
0009.5. Accurate nonlinearity 
measurement requires the use of 
either a 6V2-digit voltage cali- 
brator or a calibrated 6V2-digit 
meter to measure the voltage ap- 
plied to the A/D convertei. 

Zero Code Width Msasurament 

Integrating A/Ds with sign 
magnitude output format have 
two zeros: +0000 and —0000. 
To have a linear transfer func- 



tion between input voltage and 
displayed readings, these two 
zero codes should each be one- 
half the width of normal codes 
(Figure 4). Using the standard 
circuits shown in data sheets, the 
delay of the A/D zero-crossing 
comparator is about half a clock 
cycle. This narrows the width of 
the zero codes to the desired half- 
count width. Keep in mind that 
operating the A/D at a different 
clock rate or with significantly 
different component values will 
affect the zero code width and 
thus should be evaluated. 

You can determine the width 
of the plus and minus zero codes 
by applying a small voltage to 
the input and adjusting this volt- 
age until equal numbers of zeros 
and ones are displayed. 

A better way to test for zero 
offset is to find the transitions 
between -t-0009 and -1-0010. The 
zero offset is the difference in 
magnitude between the mea- 
sured transition points. To de- 



THE A/D TRANSFER FUNCTION 

This example shows the ffiscrete 
steps in the A/D output. The 
transfer function of an ideal 
integrating A/D around zero has 
two zeros, -f-0000 and —0000, 
each of which is Vi the width of 
the other count widths. The de- 
lay of the A/D zero crossing 
comparator shortens the zero 
code width to count, putting 
the zero-to-one code transition 
at the desired 5-microvolt point, 
rather than at 10-microvolts. ~ [ 
Since the comparator delay is a 
fixed time period, it becomes a 
large fraction of the clock 
period as the clock frequency 
is increased in order to perform 
more conversions per second. 
At very high conversion rates, 
the zero code will disappear. 
Under standard data sheet con- 
ditions, this A/D is guaranteed 
todtol»y +Q000 or —0000 



INTECKATED dRCUTTS KfAGAZINE 



termlne the zero code width, 
compare the measured transition 
points with the desired transi- 
tion point. 

For 200 millivolts full scale, 
the ideal transition point be- 
tween 0009 and 0010 is 95 mi- 
crovolts. Measuring a transition 
point five to twenty counts away 
from zero is the preferred meth- 
od of measuring zero-offset and 
zero-width. The first few counts 
around zero may have additional 
nonlinearities caused by op-amp 
settling. This may happen when 
transients occur as a result of the 
A/D switching from the signal- 
integrate phase to the reference- 
deintegrate phase. 

Placing a low-value resistor in 
series with the integrating ca- 
pacitor can help you adjust the 
zero-code width of many analog- 
to-digital converters. The volt- 
age across this resister causes the 
input voltage to the comparator 
to cross earlier than the true 
zero-crossing. It thereby com- 



-0000 

-30 -25 -20 -15 -10 -6 

-H 1 H !■ « 1 




-0003 



3-41 



pensates for the compaiator 
delay. 

There are several different 
causes of excessive noise. Look 
at the integrator output voltage 
during a conversion. A very low 
integrator voltage swing reduces 
the signal-to-noise ratio at the 
comparator input, increasing the 
A/D converter noise. The inte- 
grator output should swing to 
within one to two volts of the 
power supply voltage when you 
apply a full-scale input voltage. 

Next, make sure that the auto- 
zero capacitor is at least twice the 
value of the integrator capacitor. 
This ensures that the noise of the 
auto-zero loop will be negligible 
compared to that of the buffer 
and integrator. (This precaution 
does not apply to the ICL7129A, 
which reduces overall system 
noise by digitally compensating 
for the A/D offset.) 

A third item to check is nor- 
mal-mode rejection. Sometimes, 
what at first appears to be noise 
is caused by 50 or 60 Hz differ- 
ential mode signals on the input 
voltage. Either increase the input 
filter time-constant, or set the 
clock frequency so the integra- 
tion period is an integer multiple 
of the power line frequency. 

A related problem is stray 
pickup of 50/ 60 Hz signals in the 



analog section of the A/D's ex- 
ternal circuitry. When the ob- 
served noise varies in a cyclic 
fashion as the input voltage is 
raised, consider it a symptom of 
stray pickup in the analog inte- 
grator section. 

This occurs because the in- 
put voltage determines the dura- 
tion of the deintegrate mode, and 
therefore also determines the 
amount of 50/60 Hz normal 
mode rejection. The A/D noise 
will be lowest when the deinte- 
grate cycle is an integer number 
of line cycles. Conversely, the 
noise will be highest when the 
deintegrate cycle is an odd num- 
ber of half cycles of the line 
frequency. 

The most sensitive node is the 
junction of the integrator resis- 
tor and the integrator capacitor. 
The auto-zero capacitor is a po- 
tential point for stray coupling 
in many analog-to-digital con- 
verters. Stray pickup by these 
sensitive nodes can be best be 
avoided by keeping connections 
in this area short and surround- 
ing these components with a 
guard trace connected to the in- 
tegrator output. 

Nonlinearity Woes 

Very poor linearity near full 

scale is typically caused by satu- 



ration of the integrator output 
stage. Increase the integrator re- 
sistor value if the integrator out- 
put voltage swings within one 
volt of either supply rail with 
positive and negative full-scale 
inputs. Another potential cause 
of gross nonlinecirity is excessive 
current draw from the buffer or 
integrator. 

Nonlinearity errors of a couple 
of counts are usually the result 
of dielectric absorption in the in- 
tegrator capacitor. The best test 
for dielectric absorption is to try 
a Teflon^" capacitor and see if 
this cures the problem. Also, do 
not exceed the input common- 
mode voltage range of the A/D. 
For best nonlinearity, keep the 
input voltage at least 1.5 volts 
above V— and at least one volt 
below V-t-. 

Rollover Error 

Rollover error is the difference 
in A/D readings for equal posi- 
tive and negative voltages near 
full scale (Figure 5). An example 
is the difference in the readings 
on a multimeter when you inter- 
change the input leads. Rollover 
error can be caused by either a 
difference in offset for positive 
and negative voltages or by a dif- 
ference in gain for these voltages. 

The gain error is very com- 



TABLE OF SWITCH SETHNGS FOR A/D TEST CIH^IQl^ 




S1 


S2 


S3 


S4 


S5 


S6 


S7 


input 
Voltage 


Measure 


Zero Reading 


X 


X 
















Display should read + 0000 or —0000 


Ratiometer Enror 





X 


X 







X 







Display reads 9998 to 10,000 


Rollover Error 





X 















= 199mV 


Rollover error is difference in reading 
as S7 reverses the input voltage polarity 


In HI Input Leakage 





X 





X 












Leakage In pA = reading 10 


In Lo Input Leakage 














X 










Leakage In pA = '^^^q'"^ 


Common Mode 
Rejection Ratio 


X 




















Display should read ±0000 for 

Vc« <3V 


Linearity 





X 





o 








to full scale 
in 0.1 FS 
increments 


Measure input V w/ SVa digit meter 
compare w/ displayed reading 


Zero Code width 





X 















=95uV 


Find ±0009 to ±0010 transition 


Noise 


o 


X 














Near OV and 
full scale 


Measure width of transition band 
where display shows two adjacent 

readings 


X = Closed O = Open - = Don't care 



JUNE 1985 



3-42 



mon, with stray capacitance on 
the reference capacitor terminals 
being the most common cause of 
poor rollover performance. Test 
for stray capacitance by increas- 
ing the reference capacitor value 
by a factor of 10. If rollover is 
significantly reduced, then stray 
capacitance between the refer- 
ence capacitor and ground is the 
culprit. Common-mode errors, 
which offset the entire transfer 
curve in one direction, will also 
cause a rollover error. 

Input bias current can cause 
rollover problems when the in- 
put source impedance is very 
high. The ICL7129A uses an in- 
put chopping technique to re- 
duce the noise level. This chop- 
ping, however, increases the in- 
put bias current to about 8 pico- 
amps. If the input source imped- 
ance is one Megohm, this small 
bias current will cause an offset 
of 8 microvolts, or 0.8 count. If 
you can't lower the source im- 
pedance or add a buffer stage, 
you may have to use the non- 
chopped ICL7129, which reduces 
bias current to 0.1 picoamps while 
increasing noise level slightly. 

Other possible rollover error 
sources are reference capacitor 
leakage ai\d low integrator gain 
in the A/D. You can prevent 
stray leakage into the reference 
capacitor by using wide spacings 
between the reference capacitor 
terminals and any other circuitry. 
Guarding these terminals, how- 
ever, is not recommended, since 
this will increase the stray ca- 
pacitance and aggravate rollover 
problems. At temperatures above 
70 degrees C, increase the value 
of the reference capacitor to min- 
imize the effect of the internal 
leakage at the A/D reference ca- 
pacitor input terminals. 

A non-zero reading with zero 
input is rarely seen in the ICL- 
7129A but is sometimes ob- 
served in earlier generations of 

INTEGRATED CmCUITS MAGAZINE 



DISPLAYED 
READING 






ROLLOVER 
ERROR 


TRANSFER 
FUNCTION y 


' y rfADIOMfclKIC 
A_ ERROR 




/ / 






INPUT V0LTA6E 




/ V|N 


-1 

= Vref 




ZERO 




/ >^ X 

/ ^ / 


ERRORS 




/ 







FULL SCALE 
ERROR 



Fig. 5. Error terms of the Intersil ICL7129A are shown here greatly 
exaggerated. The deviation from a best-fit straight line is the non- 
linearity error. The difference in displayed readings for equal posi- 
tive and negative inputs is the rollover error. The deviation from the 
ideal reading of 10,000 when the reference voltage is applied to the 
input is the ratiometric error. 



A/Ds. You can often trace this 
problem back to a common- 
mode voltage between analog 
ground (or common) and the low 
(inverting) input terminal of the 
converter. Connect these two 
points together directly when- 
ever possible. In all cases, keep 
the input-low terminal within 2 
volts of analog ground and main- 
tain at least a 2-volt margin from 
both power supply rails. 

Single-supply Operation 

Integrating A/Ds can be op- 
erated from a single 5-volt sup- 
ply if you observe several pre- 
cautions. Keep the input-com- 
mon and inpul-low terminals 
centered between V+ and 
ground. It may also be necessary 
to increase the value of the inte- 
grating capacitor, so that the in- 
tegrator swings to about 1 volt 
from V-i- and grotmd when full- 



scale inputs are applied. In addi- 
tion, you should limit the full- 
scale input to 1 volt and increase 
the value of the auto-zero ca- 
pacitor by a factor of four, to re- 
duce noise. 

The circuit shown in Figure 1 
is suitable for virtually all inte- 
grating A/Ds. Most of these con- 
verters use an autozero capacitor 
in series with the integrator in- 
put, but this does not change the 
test procedures. The input volt- 
age, however, must correspond 
with the full-scale voltage actu- 
ally being used. The only other 
significant difference among the 
commonly available integrating 
A/Ds is whether they are in- 
tended for single-supply or dual- 
supply operation. For dual-sup- 
ply converters, separate grounds 
for the digital section and the 
analog section are essential. ■ 



3-43 



DIA Converters 
and 

Voltage References 

DAC Application Hints 4-3 

Bipolar DAC Operation (4-Quadrant Multiplication) 4-4 

Unipolar Binary Operation (2-Quadrant (Multiplication) 4-4 

Digitally Controlled Op Amp Gain 4-4 

Single Supply Operation 4-5 

MX7224 Bipolar Output 4-5 

Digital Current Source 4-6 

Programmable Function Generator 4-6 

Reducing CMOS DAC Supply Current 4-6 

Single Supply DAC Operation 4-7 

Digital Calibration and Threshold Selection 4-7 

Digital Control of Gain and Offset 4-8 

Current Soiirce/Limiter Circuits 4-8 

Precision High Current Reference Circuits 4-9 

Reference for DACs and ADCs 4-10 

Negative and Bipolar Output Reference Circuits 4-11 

Other Reference Applications 4-11 

Selection Criteria Assist in Choice of Optimum Reference 4-12 

Back-to-Basics Approach Yields Stable References 4-21 



4^1 



4-2 



DAC Application Hints 



Digital Feedthrough - This occurs when logic transi- 
tions on a DAC's digital inputs generate noise on its analog 
output. Proper board layout and grounding can reduce 
this, but some amount of feedthrough will always occur 
through the DAC itself. To date, no effective means has 
been found to eliminate this in a single chip. Some ap- 
plication solutions are: 

1) Ignore it. In systems not using latclies or a data bus, 
this may be acxeptable. Digital noise will occur only when 
the DAC's output is being changed and can be lumped 
together with settling errors. 

2) Use external data latches. Bus logic transitions from 
other activity do not reach the DAC input pins at all. DACs 
containing extra digital buffers may of course be redun- 
dant in this case. 

3) Use a second "quiet" data bus. If extra I/O lines are 
available, then the DAC can be programmed from a 
dedicated bus that doesn't move unless the DAC is receiv- 
ing data. A DAC with a serial data format, such as the 
MAX543, ties up the fewest data lines. 

Wideband Noise - In most CMOS DAC circuits, the 
reference and output amplifier are the most frequent sour- 
ces of objectionable wideband noise. Current-output 
CMOS DACs (like the MX7541 A) are passive in the signal 
path and generate almost no noise of their own. Voltage- 
output CMOS DACs (like MX7226) have internal output 
amplifiers which do generate noise. 

A simple way to determine the source of wideband DAC 
noise is to note how its amplitude changes with DAC code. 
If the noise is proportional to input code then reference 
noise is most likely the cause. With DC references, filter- 
ing can be added to the reference input to reduce this. If 
the noise is code-independent then the output amplifier is 
to blame. 

DAC Output Settling - If the settling performance of a 
DAC circuit is less than expected, carefully observe the 
power supply behavior AT THE POWER SUPPLY PINS of 
the DAC and output amplifier. Analog output signals will 
rarely settle to any reasonable accuracy (1% or better) 
until supply glitches have decayed. Supply transients are 
suppressed most effectively when bypass capacitors are 
placed as close to the DAC and amplifier as physical limits 
permit. See also the "A/D, D/A Question/Answer Primer" 
at the front of the "Analog to Digital Converters ' section. 

Full Scale Adjustment and External Feedback 
Resistors - CMOS current-output multiplying DACs 
(MX7541 A, MX7545, MAX543, etc.) owe excellent stability 
and linearity to the fact that their on-chip resistors are well 
matched. Unfortunately excellent matching does not also 
mean that the absolute value of these resistors is par- 
ticularly accurate, or stable with temperature. This is why 
a feedback resistor, for connection to an external op amp, 
is also provided on chip - so it tracks the resistors in the 
DAC. Therefore, in the typical application of these 
devices, absolute resistance has literally no affect on DAC 



output accuracy because changes in the DAC resistance 
are matched by the on-chip feedback resistor. The output 
is then not affected by part-to-part, or temperature related, 
resistance changes. 

Some DAC applications, particularly those with full 
scale trims, get into trouble because they rely on some 
level of absolute accuracy in the DAC reference input and 
feedback resistance. If the adjustments have limited 
range, accuracy and drift are only negligibly affected, but 
as the span of the adjustment is widened, the adverse 
effects can then become significant. 

Figure 4-1 shows a typical "safe" adjustment scheme 
for a 12-bit DAC. A 100Q resistor (R2) is connected in 
series with the DAC's internal feedback resistor at Rfb. 
This increases the DAC gain by small amount so that the 
200Q trim pot (R1) at Vref has adjustment range both 
above and below the DAC's untrimmed full-scale value. 
The absolute resistance at Rfb and Vref is nominally 
1 1 kO., but it can range from 7kiJ to 25kt2 and has a typical 
temperature coefficient of -SOOppm/'C (not to be confused 
with the DAC's untrimmed gain drift of <10ppm/''C). This 
resistance determines the trim range of R1 . At 1 1kil, this 
allows a ±0.9% full scale adjustment, but over the 
specified resistance of Jkil to 25kfl, this changes sig- 
nificantly. At 25ki2, the trim range lowers to ±0.4%. 




Figure 4-1. 

If the trim resistances are small compared to the DAC 
resistance, the effect of tracking mismatch on temperature 
drift is minimal. The lOOH mismatch between the refer- 
ence and feedback resistance, 7ki2, the minimum DAC 
resistance no longer tracks over temperature. Assuming 
±300ppm/°C DAC resistor drift and ±100ppmrC'trim pot 
drift, the additional output drift is: 

(100/7000) (300-t-IOO) = 5.7 (ppm/°C) 

If we attempt, however, to trim ±10% of the full scale 
range with the highest DAC resistance (25kQ), R2 must 
be 1 .25k£l and R1 must be 2.5kQ. With these values the 
above calculation becomes: 

(2500/7000) (300+100) = 143 (ppm/°C) 



4.3 



This amounts to almost 0.6 LSB/°C of gain drift at any wide-range trim scheme that involves adding resis- 
12 bits. As can be seen from the equations, even if tance in series with Vref or RpB on a CMOS multiplying 
Oppm/°C resistors are used for R1 and R2 instead of DAC, should be checked in the above manner. 
100ppm/°C, the drift only marginally improves. Therefore 

Bipolar DAC Operation (4-Quadrant Multiplication) 




Figure 4-2. 

: Unlptflar Binary Oporation (2-Quatlrant Multiplication) 




omLMnrrs 



figure 4-3. 

OaltMyGonbnHoditpAnvOaln 




Vm 



Voui 



-w 

Figure 4-4. 



4-4 



Single SuRply Operation 



The MX7528/MX7628 R-2R ladder termination resistors 
are internally connected to AGND. This arrangement is 
particularly convenient for single supply operation be- 
cause AGND may be biased at any voltage between Vdd 
and DGND. The two DAC reference inputs are tied 
together and a reference input voltage is obtained without 
a buffer amplifier by making use of the stable matched 
impedances of the DAC A and DAC B reference inputs. 
Current flows through the DAC A and DAC B reference 
inputs and through the DAC R-2R ladders into R1 , and R2. 
R1 is adjusted until VrefA and VrefB inputs are at +2V. 
DAC codes from 00000000 to 1 1 11 1 1 11 adjust the analog 
output voltages from +5V to +8V in 1 1 .7mV steps. 



tl5V 



J7 3. 




FigufB4-S. 



IHXT2Z4 Blpolmr Output 



The DAC output may be configured for bipolar opera- 
tion using the circuit in Figure 4-6, Only one op-amp and 
two resistors are required. With R1 = R2: 

V0UT = VreF (2D - 1) 

where D is a fractional representation of the digital word 
in the DAC register. 




DAC 










MAXIM 



At hi, 




B2.10llOm.1% 



Figure 4-6. 



4-5 




Figure 4-7. 



,ProgmmnablB Fimctfon Qonmrmtor 



SQUABEWAVE 
OUTPUT 




TRtANGLE 
OUTPUT 



Figure 4-8. 



.RMfiieing CMOS DAC Supply Current 



The operating current of most CMOS DACs depends 
on the logic level of the digital input signals. This is 
because the input inverter/level shifters in the DAC ac- 
count for most of the power consumption. If the digital 
inputs are made to swing from Vdd to ground (i.e. CMOS 
logic levels) rather than to TTL levels, the supply current is 
typically cut by a factor of 100 or more. When the DAC 
output is changing, the supply must still supply 5 to 10mA 
for about 20ns, independent of input logic level, but tliis is 
usually a small fraction of the total operating time. 



TTl 



/~\ I lD0=2niA— TTLIN 
( / ) ill»=1(iA— CMOSIN 




Figure 4-9. 



4-6 



Slngbt Supttly DAG Ofimratlon 



The MX7533 or other current output CMOS DAC may 
be connected as a voltage output DAC as shown. 0UT1 
is connected to the external reference and 0UT2 is 
grounded. Vref, now the DAC output, is a voltage source 
with a constant output resistance, nominally 10l<£2. In 
most circuits this output is buffered with an op-amp. 

An advantage of voltage mode operation is single 
supply operation for the complete circuit, i.e. a negative 
reference is not required for a positive output. It is impor- 
tant to note that the range of the reference is restricted. 
The reference input (voltage at 0UT1) must always be 
positive and is limited it no more than 3.5V when Vdd is 
15V. If the reference voltage is greater than 3.5V, or Vdd 
is reduced, linearity is degraded. If a larger output voltage 
is needed, the output buffer can be connected for nonin- 
verting gain. 

Some newer CMOS DAC's have voltage outputs in- 
cluded and do not require speeial connections for single 

supply operation. These are: 



MAOOM 

MX584 



MX7533 




ICL7612 



Figure 4-10. Vol^ge Mode Operation 



PART V SUPPLY DESCRIPTION 

MX7224 +12 TO 15V CMOS 8 bit, voltage out 

MX7225 +12 TO 15V CMOS quad 8 bit, voltage out 

MX7226 +12 TO 15V CMOS quad 8 bit, voltage out 

MX7228 +5V TO 1 5V CMOS octal 8 bit. voltage but 



The circuit is used to discriminate "light" and "dark" 
conditions in photo-sensing applications where the light 
levels are better described as "bright" or "dim". Applica- 
tions include tachometers, motion sensing, autonnatic 
readers, and liquid clarity examination. 

A calibration "bright" light is applied while the DAC is 
digitally ramped. The count of the ramp at the trip point 
is then the high calibration point. Similarly, a "dim" calibra- 
tion light is applied and a low calibration point is deter- 
mined. The trip threshold is placed between the two 
calibration points, and the \iP sets this value up on the 
DAC inputs. Continuously varying light levels are judged 
"light" or "dark" according to whether or not they exceed 
this level. 



OlBliaf Caiibnitton and ThrasJIoftf S^eetfan 



Vt 




Figure 4-11. 



4-7 



DniUal Control of Gain and (HIsat 



Two voltage-output DACs (or a dual DAC) digitally 
control the offset and gain of this circuit. This is especially 
useful when curve-fitting nonlinear functions for 
transducer linearization or in analog compression/expan- 
sion applications. The input signal enters through the 
reference input of the Gain Adjust DAC whose output is 
summed with that of the Offset Adjust DAC. The Offset 
DACs reference Input is a fixed DC level. The relative 
weight of each DAC output is adjusted by R1 and R2. 





Vref ^ 




DAC1 


GAM ADJUST 






VrEF ' 




DAC2 




-R2 DEPENDS W MAXIMUM 
OFFSET TO BE NUUiO. 



Figure 4-12. 



t^nrmnt SourcB/Llmlter ClreuUa 













1 




TBIM 


GNO 











10V 


1 
















2.5V 


3 






COM 






4 




i 1 





(l).75T05raA) 



VOLTAGE COMPLIANCE -25V TO *BV 



SOURCE VOLTAGE. SV TOW 



F/gi/re 4- 13. MAX675 Current Source 



Figure 4-15. Precision 2 Terminai Current Limiter 



♦vs 




Figure 4-14. Two-Component Precision Current Umiter 



4-8 



.Pnclsion High CunmiH He§»rmee GlmuKs 



A PNP power transistor, or Darlington, is easily con- 
nected to the IVIX584 to greatly increase its output current. 
The circuit in Figure 4-1 6 provides a + 1 0V output at up to 
4 Amps. If the load has a significant capacitive com- 



ponent, CI should be added. If the load is purely resis- 
tive, high frequency supply rejection is improved without 
CI. An NPN output transistor or Darlington can also be 
used to boost output current as shown in Figure 4-1 7. 










lO.OV 


MAXIM 




msM 


5.0V 




2.5V 


COM 






Vour+10V«4A 

Figure 4- 16. High Current Precisipn Supply 



Figure 4- 1 7. NPN Ouput Current Booster 



4-9 



■ ■ - Referance tor DACs and ADCm 

The IVIX584 is well suited for use with a wide variety of 
D-to-A converters, especially CMOS DACs. Figure 4-18 
shows a circuit in which an MX7533 10 bit DAG has an 
output of to -5V when using a +5V reference. For a 
positive DAG output, the MX584 can be configured as a 
2-terminal negative reference as well by using the connec- 
tion in Figure 4-1 9. 

In Figure 4-19, an MX7574 CIVIOS A/D converter uses 
an IVIX584, connected for -2.5V, as its reference input so 
tfiat the system can operate from +5V power. The analog 
Input range for the circuit is OV to +2.5V. Tiie connection 
for to +10V operation of the A/D with ttie IVIXSSI is also 
shown. 



-W .5V -15V 




Rgure 4-19. NegaUve -2.5V and -10V Reference for a CMOS A/D 




4-10 



Negative and Bipolar Output Retmwtee Gleeults 



aoi|f : 









10V 




UX5S4 




sv 


■ C6KI 


4 






>2.4k 




J 5% 


-15V 



T 1 * 



mm 

GROtJI 




Figure 4-20. Two-Terminal -5 Volt Reference 



— vw 

Figure 4-22. ± 1 01/ Reference 







' 4 


























<1.2k 
>5% 



ANALOG 



VHEF 
-10V 



When using the 2-terminal connection, the load and the 
bias resistor must be selected so that the current flowing 
in the reference is maintained between 1mA and 5mA. 
The operating temperature range for this connection is 
limited to -55° to +85°C. 



Figure 4-21. Two-Terminal -10 Volt Reference 



Otiter Reference Applications 




■UP T0 10 FEET OF SHIELDED 
4-CONDUCTOR CABLE. 




Figure 4-23. Precision Temperature Transducer witti Remote 
Sensor 



Figure 4-24. Microprocessor Reference interface 



4-11 



Selection criteria 
assist in choice of 
optimum reference 



It's not ahmys cosy to select the most suit- 
able p-ecisim. voltage reference for your ap- 
plication. These devices often require para- 
metric and, economic tradeoffs. Further, 
parameters that are crucial in some systems 
are missing from or presented unclearly in 
many data sheets. An overview of selection 
criteria can help you make the choice. 

Ron Knapp, Maanm Integrated ProdwAa 

In choosii^ a predfdon voltage reference, you should 
look b^ond initial aceuracy, temperature coefficient 
(TC), and cost. Other factors that determine the suita- 
bility of a reference for your application are the device's 
power dissipation, noise, long-tenn stability, package 
size, ease of use, TC linearity, and the manufacturer's 
definition of TC. Familiarity with these selection crite- 
ria will help you avoid unpleasant surprises when you 
characterize your prototyjje system. 

Before going into the details of the various selection 
factors, it's useful to briefly review the different types 
of references available and to explain the principles of 
operation of each type. The overview will give you some 
insight concerning the performance you can expect 
from the various references. Reference .cinniits eom- 

EDN Februaiy 18, 1968 



prise three categories: bandgap cells, zener-diode- 
based references, and heated-substrate types. Most 
voltage references fall into the first two categories and 
derive their fixed output from a bandgap cell or a zener 

diode. The third type of reference obtains additional 
stability by mounting the bandgap or zener circuit on a 
heated substrate. 

Bandgap references depend on the behavior of diodes 
(or the equivalent base-emitter junctions of transis- 
tors). The following equation predicts the operation of 
sud junctions with a hig^ degree of precision. 



Vbe = V, 



where 

• Vco^the extrapolated bandgap volti^ (about 
1.2V) at 0"K 

• n=proce8s-dependent constant; value 1.5 to 3 

• q= charge of an electron 

• k=Boltzmann's constant 

• T= temperature in °K 

• Ic=collector current 

• To = reference temperature for Vbeo and Icq 
Ico= reverse saturation current at To 
Vbeo = Vbe value for the conditions To and Icq. 

The diode's temperature coefficient is large but pre- 
dictable and repeatable (-2 mV/'C or -3100 ppm/°C). 
Thus, you can adiieve stability by balancing the diode's 



4-12 



The Vbe eqtuition's third and fourth non- 
linear terms limit the performance of 
band£[ap references by making a flat volt- 
a^e/temperature response impossible. 



TC with a TC of equal magnitude and opposite sign. 
Such a TC exists for the difference between the forward 
voltages of two diode junctions operating at different 
current densities. Because the ratio of mismatch gov- 
erns the TC's value, the bandgap circuit is compatible 
with good IC design — parameter values should depend 
on accurate ratios based on layout geometry, rather 
than on absolute quantities that are difficult to control. 

You can calculate the desired difference voltage 
(A Vbe) with high predictability, directly flrom the diode 
equation 

where Ji/Jv is the ratio of current densities. To obtain 
zero TC, you add the expression for Vbe to the one for 
AVbei differentiate the sum with respect to tempera- 
ture (T), and set this quantity equal to zero. The result 
is 

V«, = VBEo + f in(i^). 

Solving this equation for the J1/J2 ratio tells you that 
an approximate 8:1 ratio gives the best result (a near 
zero TC). Scaling the transistor areas gives an IC 
designer accurate control of this ratio. 

In a basic bandg:^ circuit (Fig 1), Vbe is the baae- 



+ SUPPLY 




Fig I — A bandgap voltage reference generates the sum (VtiE+VJ, in 
ttthiek the two voltages have equal and opposite temperature coeffi- 
dmt». Theampl^urtkenrauestMemnitoamoreeommientvoUage 
level. 



emitter voltage of Qi, and AVbe appears across R2. The 
ratio of Ri and Rj scale AVbe to a voltage (Vi) whose TC 
cancels the TC of Vbe. The amplifier then raises the 
1.2V sum of Vj and Vbe (the bandgap-cell voltage) to a 
higher level at Vom: usually 2.5 to lOV. Unfortunately, 
the amplifier multiplies noise as well. A lOV scaled 
output, for example, increases the bandgap cell's noise 
voltage by an approximate factor of 8 (10^1.2). 

Commonly available bandgap-reference voltages are 
10, 5, 2.5V, and the bandgap-cell voltage itself, 1.23V. 
Typical TCs range from 5 to 50 ppm/'C. The Vbe 
equation's higher-order, logarithmic third and fourth 
terms limit the performance of these references by 
making a flat voltage-temperature response impossible. 
What's more, some of the equation's coefficients are 
process-dependent — ^particularly n, which is related to 
the carrier mobility of dopant in the silicon. The quanti- 
ty n poses a problem because you cannot easily deter- 
mine its value by making electrical measurements 
during production. 

Because most bandgap references are constructed in 
silicon monolithic form, they are relatively inexpensive 
($3 to $20). Many designs employ curvature correction 
to compensate for the logarithmic nonlinearity in the 
TC, but none offer an exact cancellation. 

Zeners have rock-bottom TCs 

The second type of voltage reference — based on a 
zener diode — ^achieves TCs as low as ±1 ppm/°C. Zener 
diodes have a positive or negative TC, depending pri- 



12 

? 10 

















































































































-> 




RANGE 






> IZT 






— 







































2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10 11 12 
Vl,2eN««0LtMe(V) 



Fig 2 — Zener diodes produce a zero-TC voltage near SV — the level 
for which the ynechanisms of negative-TC field-emission breakdown 
and positive-TC avalanche breakdown are in balance. However, the 
zero-TC ideal is difficult to achieve on a production basis. 



4-13 



EDN February 18, 1988 



and avalanche breakdown, which occurs abo\e 5V and 
yields a positive TC. Although complex and difficult to 
quantify, these breakdown mechanisms should be in 
balance at approximately 5V, yielding a near-zero TC. 
Tests corroborate this contention (Fig 2). 

Unfortunately, 5V zener diodes exhibiting the Utopi- 
an zero TC are difficult to produce. The problem is that 
the negative TC breakdown mechanism is flukey and 
difficult to reproduce consistently in production. The 
positive TC breakdown, on the other hand, is predict- 
able and eminently repeatable for devices using routine 
semiconductor-production processes. Another charac- 



uecause ui i,iie umicmty oi proaucing a zero- 1 zener 
diode that depends purely on breakdown mechanisms, 
it's evident that the TC of a zener-diode reference 
should not depend solely on the absolute zener break- 
down voltage. A class of zener diodes, called TC zeners, 
takes a compensatory approach by balancing the nega- 
tive TC of a forward-biased diode (-2 mV/°C) with the 
equal and opposite TC of a 5.6V zener diode. The 
output voltage is therefore 6.3V (0.7V-I-5.6V). These 
references offer 5- to lOO-ppm/'C TCs and require 
operating currents from 0.5 to 7.5 mA. You must 
maintain the specified operating current to obtain the 
guaranteed TC. 



Precision references need 

To achieve accuracies as tight as 
±0.01% in precision references, 
manufacturers use laser- 
trimmed thin-film resistors. Dif- 
fused resistors embedded within 
silicon exhibit not only hystere- 
sis, but also high TC, poor TC 
matching, large voltage coeffi- 
cients, and poor stability. Thin- 
film resistors, deposited on the 
chip's surface, are found in such 
voltage references as the 
REFOl, AD581, AD2700, and 
the MAX670. 

The secret to the precision 
references' accuracv is to trim 



laser trimming 

the thin-film resistors by laser 
before attaching a Ud to the 
package. This critical operation 
determines a reference's initial 

accuracy and its long-term sta- 
bility. Fuse-link blowing and re- 
sistor-link trimming are alterna- 
tive schemes for trimming the 
absolute voltage, but the chip 
area required with these meth- 
ods makes them prohibitively ex- 
pensive for tight-tolerance ad- 
justments. 

Thick-film resistors have insuf- 
ficient stability for use in preci- 
sion references: therefore, hv- 




Fig A — A staircase test matrix helps to 
optimize focus and power levels in a 

laser system used for trimming precision 
thin-film resistors. 



Fig B — After calibration, a laser-trim 
system cuts cleanly through a thin-film 
resistfyr. The calibration depends on the 
staircase setup teehniqtte of Fig A. 



brid products such as the 
MAX670, AD2700, and AD2710 
include TaN (tantalum nitnde) 
or NiCr (nichrome) thin-film re- 
sistors, sputtered on a ceramic 
substrate of 99.6% alumina 
(AljOa). Before trimming each 
lot of references, the manufac- 
turer determines the optimum 
settings for laser power and 
focus by executing a test ma- 
trix of experimental laser cuts. 

For each power setting, the 
system makes a staircase trim 
pattern in which each right-an- 
gle turn marks an additional in- 
crement of focus (Fig A). After 
completion of the focusing and 
system-calibration steps, quality- 
control personnel inspect the 
trim process every 30 minutes to 
ensure uniform cuts throughout 
the manufacturing lot. The sys- 
tem achieves extremely clean 
trims in this way (Fig B). To 
prove its stability, each device 
must maintain initial accuracy 
after trim during a 48-hour, 
150°C bum-in operation. 



EDN f^ebruary 18, 1988 



4-14 



You can easily achieve a l-ppm/° C TC by 
mounHr^ a zener-reference circuit: of rea- 
mtably htp TC on a heated substmte. 



The AD2700 and MAX670 series of hybrid refer- 
ences, for example, use a 1N827 zener diode— chosen 
for low noise, low dynamic impedance (10ft max), and 
good TC linearity. (Why use a hybrid? Fabrication of 
these TC zener refoences involves a specialized pro- 
cess, involving extra steps not always available in a 
standard bipolar process.) The products' initial 10-ppm/ 
°C TC is that of the zener diode. Active laser trimming 
then lowers the TC by adjusting the zener-diode cur- 
rent, thereby creating additional 3- and l-ppni/°C prod- 
uct grades (see box, "Precision references need laser 
trimming"). 

The manufacturer calculates the required zener cur- 
rent U8Big actual TC values, obtained through oven 
tests on unsealed devices. Note that the amplifier in 
Fig 3 supplies current to the zener, which in turn 
supplies an input voltage to the amplifier. To ensure 
circuit startup, R4 supplies current to the zener and the 
amplifier uses ground as its negative supply, thereby 
eliminating Vout=OV as an unwanted stable state. Note 
that the amplifier in a zener reference contributes less 
output noise than does the amplifier in a bandgap 
reference, because the wmist vtdtage i«qiiireg less axBr 
plification. 

Heater trades Pd for stability 

The third type of reference, based on either a 
bandgap or zener voltage, uses a local heater to main- 
tain the substrate at a constant temperature, usually 10 
or 15 degrees above the upper limit of the operating 



in. 



Rs 



FINE ADJUST 
7 OND 



Fig 3 — The ampUKer in thi» zener-diode reference bootstraps the 
zener voltage by delivering current to the zener while the zener 
deUeert voUage to the amplifier. promdes liari-vip ewm/i^ to the 
zener. 



range. If the circuit's TC is reasonably low (20 to 30 
ppm/°C), such a reference can easily achieve a TC of 1 
ppm/°C. The disadvantage is power dissipation — an 
LM199 at -55°C, for example, requires as much as 28 
mA at 15V for the heater alone. 

Also, the LM199's output voltage stabUizes at 1 
ppm/°C but the initial accuracy is only ±5%. To meet 
the ±0.1% or ±0.01% tolerances required in data- 
converter applications, therefore, you must add a preci- 
sion op amp and scaling resistors and then cope with 
these components' additional cost and error contribu- 
tions. The proper evaluation of a reference application 
involves these issues as well as many of the following 
ones, which are not always covered explicitly u> the 
data sheet. 

Confusion surrounding the specification of tempera- 
ture coefficient, for instance, is partly a matter of 
definition. Two definitions are popular. In the "box" 
method, Vom for an in-spec device must remain within 
a rectangle formed by "Tmin, Tmax, and the maximum 
specified AVoit (Fig 4). AVout is the product of the 
nominal output voltage (Vnoh), the specified TC, and 
operating-tempen^sre tw^. W&t the ASZKKSL, 

AVouT = Vnom (TC) (Tmax ~ Tmin) 

= 10V(3 ppni/°C) [85-(-25)''C] 
= 3.3 mV. 

In other words, Vour will change no more than ±3.3 
mV between any two temperatures in the operating 
range. This maximum change, added to the ±2.5-mV 

initial-accuracy spec, produces a total error band of 5.8 
mV above and below the nominal Vout (lOV). 

The "butterfly" method, on the other hand, refers 
everything to 25°C and allows the manufacturer to use 



UPPER-BOUND LIMIT 



n 3.3.mV 

WOflST-CASE 




Fig i — In the "box method" of specifying TC, the operat- 
ing-temperature range and the maximum allowed duinge in Vom 
form the sides of a rectangle, tmd fke slope of the reetangU^s diagonal 

becomes the TC. 



4-15 



EDN FOxvary 18, 1988 



I 



different TCs in determining the error bands at tem- 
peratures above and below 25°C (Fig 5). The 
AD2710K, for example, specs a change of ±0.9 mV over 
the 25 to 70°C range (10Vx2 ppm/°Cx(70-25)°C). You 
must add to this the initial tolerance of ±1 mV at 25°C, 
resultii^ in a maximum possible error of ±1.9 mV at 
Tm«c (TO'C). 

Such systems as DVMs and data-acquisition instru- 
mentation often use the box. method for specifying total 
error, because users aren't likely to calculate accuracy 
using the TC specs. This approach has a disadvantage 

— the whole 3.3-mV error change in the example of Fig 
4 could occur between, say, 25 and 70°C, yielding an 
effective TC of 7.33 ppm/°C, which exceeds the maxi- 
mum specified TC (3 ppm/°C). A worst-case analysis 
over temperature, however, must allow for this much 
change anyway, regardless of where it occurs in the 
operating-temperature range. 

Because temperature testing plus the reading and 
recording of data are costly, manufacturers usually 
base TC specs on only a few data points. These should 
include at least 25''C and the endpomts (Tmin and Tmax)- 
Iking the endpoints alone, for example, can make the 
reference appear better than it actually is if the TC 
curve is symmetrical and parabolic. 

You should avoid using "typical" specs for TC and 
absolute accuracy; only tested and guaranteed limits 
for minimum and maximum have meaning. A data sheet 
should also identify the temperatures used in the calcu- 
lation of the device's TC. The AD2700L data sheet, for 
instance, lists 25°C plus the endpoints (—25 and 85°C). 
The AD2700U data sheet lists these three as well as the 
e]d»nded endpobrts of -§5 and I25*C. 

Correction yields S curve 

Although voltage-reference data sheets seldom speci- 
fy TC linearity, the characteristic curves for 

VouT over 

temperature contain the most useful TC-linearity infor- 
mation that a manufacturer can provide. For bandgap 
references these curves are parabolic or S-shaped (Fig 
6), depending, among other factors, on whether the 
device includes a linearity-correction circuit. The TC 
linearity of zener-based references depends mainly on 
the zener diode, and the reference will include one of 
two diode types, depending on the intended tempera- 
ture range and the desired linearity (see Imk, "Zener 
diodes determine TC linearity"). 
■ Another important specification is noise, which ap- 
pears on most data sheets as a typical value but seldom 
has a guaranteed limit. Because noise testing is di£B- 

EDN I%brum7 18, 1988 




TEMPERATURE ('C) 



Fig S — The "butterny" method of TC tpeeiSeaUim normalizes the 
variation ofVovr urith respect to 25°C. You Oien e^Oaid vmg-ahaped 
ermr hamb to the operating-temperature extremes. 



10,030 
10.020 
> 10.010 

UJ 

i 

§ 10.000 







OUTPUT 


-VOLTAG 


: DBIFT 













































































-SO -2$ 26 Sj) 75 100 125 

tSlPBUtnjIK 



Fig S — The ADSSI's VourV'-tempemlure characteristic has an 
S-skaped curve. This charaeteristie is typical for bandgap f t ft r t m as 

that include correction circuits for TC linearity. 



cult, manufacturers usually guarantee maximum values 
by performing sample testing only, if that. What's 
more, because a designer can easily filter or band-limit 
the higher frequencies by adding capacitors, noise 
specs cover the 0. 1- to 10- Hz range in nearly all cases. 
(The suppression of low-frequency 1/f noise, however, 
requires impractically large capacitor values.) 

Data sheets usually specify noise in terms of 
nV/V^, an expression that allows you to calculate 
output noise for the bandwidth of interest. At the same 
time, you usually convert this quantity to the more 
useful itV p-p, especially for converter ^plications: 



4-16 



Bandjrap references usually have a parabol- 
ic TC characteristic that assumes an S 
shape if the device includes circuitry to ef- 
fect linearity correction. 



First, multiply nVA^B^ by the square root of the 
qrstem bandwidth to obtain the noise ms^^tude in nV 
nns. Then (assuming the noise has a Gaussian distribu- 
tion), multiplication by 6 will give you the approximate 
peak-to-peak muse you can expect for that bandwidth. 

Noise measurement is difficult 

Lack of equipment is part of the difficulty manufac- 
turers face in measuring noise. For example, Quantec 
makes a noise tester commonly used for testing op amps 
and transistors, but that instrument requires a nominal 
OV bias for the circuit node under test. Spectrum 



analyzers make good noise testers, but not many have 
the dynamic range and the low noise floor necessary to 
measure, say, 10-jiV signals riding on lOV dc. Fre- 
quency range is another complication. Spectrum ana- 
lyzers come in high- or low-frequency models (above or 
below 1(X) kHz), so one model doesn't cover the mea- 
surement range needed for many ^plications — 0.1 Hz 
to several megahertz. 

You can measure noise directly using a Tektronix 
storage oscilloscope with a 7A22 plug-in amplifier, 
which has 10-|jiV/div sensitivity and selectable lowpass 
and highpass filters that cover 0.1 Hz to 1 MHz. The 



Zener diodes detennine TC linearity 

The TC linearity for a zener- 
based voltage reference depends 
on the type of zener diode in the 
device. Most liybrid references 




C-COHODE 
A-ANOOE 



Fig A—AUoy-dMised zener diode* fea- 
ture a vertical configuration in which a 
top-aurfaee bond pad forma the anode 
camuctionandtludietubilralefiimuthe 
cathode couneeHoii. 





A 






g 'c 




IMPLANT REGION 








— NBTOOAL 





Fig B — The lateral geometry of ion-im- 
pianted zener diodes places both diode 
connections on the top surface of the 



include one of two types of TC 
zener (in die form), and only a 
few zener manufacturers can 
guarantee 5- to 10-ppni/°C per- 
formance for these products. 
One zener type has an alloy-dif- 
fused junction in a vertical con- 
figuration (Fig A), wherein the 
anode serves as a bond pad on 
top of the die and the cathode as 
the substrate (backside) of the 
chip. 



The other type of zener fea- 
tures an ion implant and lateral 
geometry (Fig B), and has both 
connections on top of the chip. 
For this type, the substrate 
must float unconnected, because 
the substrate is the junction of 
two zener diodes — one operating 
as a zener in the breakdown 
mode, and the other operating 
as an ordinary fcH'ward-biased 
diode. The zener voltage is 5.6V, 




9. 

9.aa4-| 

-60 



m 



Fig C — An ion-implanted-zener reference such as the ADiTOO exhibits a concave-down 
TC characteristic and better overall linearity than does a diffused-zener type for the 
mnge -55 to +ti5'C. 



4-17 



EDN February 18, 1988 



lowpass settings don't include 10 Hz, however, and the 
ampllHer's input-voltage limitation may require that 
you ac-couple the signal The coupling capacitor then 
forms a highpass filter of a few hertz precludes the 
use of the 0.1-Hz highpass setting. 

For a more convenient method of noise testing with a 
storage oscilloscope, you use a low-noise op amp config- 
ured for a gain of 100, a 0. 1-Hz highpass input filter, 
and a 10-Hz lowpass output filter (Fig 7). The gain 
boosts 10-jjlV signals to 1 mV — within the range of most 
oscilloscopes — and allows use of an OP07A (whose 
0.6-M.V p-p max noise contributes less than 60 (jlV p-p 



noise at the output). 

To measure noise, set the scope amphfier's vertical- 
input coupling to dc. Allow the filter to settle and the 
reference to warm up (about 30 sec in most cases). 
Clear the screen in stor^ mode and set the time base 
for single-trigger mode at 1 see/div. Set the scope to 
save mode or maximum screen persistence and measure 
the peak-to-peak noise for 10 sec. (Observation for 10 
seconds is the accepted method, even though the time 
constant for 0. 1 Hz is only 1.6 sec.) A scope photo based 
on this technique (Fig 8) shows about 20-jji.V p-p noise 
for the AD581 — typical for most bandgap references — 



and when operated at the proper 
current, it produces a TC of 2 
mV/*C— a TC equal to and oppo- 
site that of the forward-biased 
diode. Fbr this reason, nearly all 
temperature-compensated zener 
diodes have a total voltage of 
6.3V (5.6+0. TV). You can create 
a higher output voltage by con- 
necting multiple forward-biased 
diodes in series with a higher- 
voltage zener diode. 
Both TC-zener types specify 



VouT as 6.3V±5%, but the actual 
tolerance fdr ion-implanted types 
is tighter (typically ±40 mV, or 
±0.6%), vs ±300 mV (±4.7%) 
for alloy-difiused types. Tlie 
tighter tolerance of ion-im- 
planted zener diodes allows the 
reference manufacturer to target 
gain-resistor values more close- 
ly, do less laser trimming, and 
thereby provide better Vout sta- 
bility. 

TC linearity is the most no- 



ticeable difference between the 
two zener types. The implanted 
zener's concave-down curve ex- 
hibits better overall linearity 
from -55 to 125*C (Fig C), but 
the diffused zener has better TC 
linearity from to lO'C (Fig D). 
Both the forward-biased diode 
and the zener diode contribute 
to the nonlinearity, and these ef- 
fects increase at low current. 

Accordingly, most TC zeners 
have operating currents in the 
0.5- to 7.5-mA range, which is 
an order of magnitude higher 
than that of zeners normally 
found in an IC. High current 
(sufficiently beyond the value at 
the zener's breakdown voltage) 
also ensures low noise. 

Though it's a tedious proce- 
dure, you can always character- 
ize the reference over tempera- 
ture and then compensate for 
the TC nonlinearity by using a 
temperature sensor, A/D con- 
verter, and software lookup 
table. The well-omtroUed ion-im- 
plant process offers A eamj^eo- 
mise solution, honvever— the U9e 
of zener diodes in which the TC 
curves and 26 °C voltages are re- 
peatable from lot to lot. 



10.0K- 

iaoi4- 

mmt- 

10.010- 

lo.ooe- 

10.006- 
£ 10.004 - 
§ 10.002- 
10.000- 

«.gM- 

9.996- 
9.994- 
9.992- 
9.900- 
»M- 
9.966- 
9.984- 







































































































1 


































































































i 


























m 








m 
































































































\ 





























































































































































40 60 
TO 



Fig D — The output of a dUfuted-zener reference meh as the ADS710 prooidet eaaUent 
TC Imeearity from to 70'C, frut gitffers in <t)Mar% outside thai route. 



EDN f\ebnuiry 18, 1988 



4-18 



Often, the statistical data taken by the 

manufacturer on life-test samples is the best 
stability information you can obtain about 
a refetmce. 



HIGHPASS 
FILTER 



= 0.1 Hz 
1 



IC, 

VOLTAGE 
REFERENCE 
UNDER TEST 



VooT 



T 



I 100 ;iF 



NOTE: ALL RESISTORS 1% METAL FILM 




LOWPASS 
FILTER 
- 1 



8k 



ZmF-T 



OUTPUT TO 
OSCILLOSCXIPE 



X GAIN = 100 



Fig 7— Introducing highpan and lowpam Rlten and a low-noise op amp lets you measure voltage-referenee noise using a storage 
oseiUoaeopi. 




TABLE 1— REFERENCE-NOISE COMPARISON 





NOISE OiV p-p) 


BANDWIDTH 


AD581 
(BANDGAP) 


AD2700 
(ZENER) 


0.1 TO 10 Hz 


20 


5 


1 TO 100 Hz 


50 


8 


1 Hz TO 3 kHz 


220 


30 


1 Hz TO 300 kHz 


600 


200 



Fig 8 — nis scope photo shows the noise levels typical for a bandgap 
reference ( upper trace) and a zener-based reference ( lower trace). The 
scale is 10 iLV/vertical div; 1 secfhorhsontal div. 

and about 5 (j-V p-p for the AD2700 zener reference. 
Table 1 compares noise for these devices over different 
bandwidths. 

Long-term stability 

Long-term stability can be the most important spec 
in a reference application, but — as in the case of noise — 
this parameter seldom receives a thorough character- 
ization in the data sheet. Most manufacturers specify 
stability as 25 to 100 ppm (typ) per thousand hotirs at 
125°C. Th^ ciuiBot accurately extrapolate this stability 



data to other temperatures because those temperatures 
may activate other mechanisms of instability. Nor can 
they guarantee a maximum limit by testing all parts for 
1000 hours, because 100% bum-in testing costs too 
much. (And in any case, the manufacturer cannot 
guarantee a reference's stability for the second 1000 
hours.) The solution, therefore, is to either test samples 
only or to guarantee this spec "by design" (in other 
words, the manufacturer will replace customer parts 
that fail). 

Often, the best reference-stability information that a 
customer can obtain is the statistical data taken by the 
manufacturer on Ufe-test samples. Maxim, for example, 
records long-term stability for a set of sample devices 
operating continuously for several thousand hours at 
55° C (a realistic operating temperature that is higher 
than the room ambient temperature but lower than 
Tm'ax). Such data (Fig 9) for the AD2700, for instance. 



4*19 



SDN Retenny 18, 1S68 



Output-current specs are misleadir^ unless 
they specify Vqut limits such as those in the 
spec for load rt^ulation. 



mm LONC-tERM snaiuTY c M 'C 

(l(OmiUt.lZEO TO T..0 HRSl 



S -,.0 



3.00^ 
2.00- 


















1.00- 


















0.00- 


















1.00- 


















2.00- 


















3.00- 



















, +2 SIGMA 

MEiuaE.i»i>es 



TIME (tk HRS) 



Fig 9 — The average stability of AD27O0 voltage references over 
3600 hours at 55'C appears in the center curve. The upper and lower 
curves denote 2-sigma boundaries that encompass 90% of the 19 units 
tested. 

shows that Vqut drifts about 250 (xV negative and then 
remains within ±50 (iV of that level. The center curve 
represents typical performance; the upper and lower 
"2-sigma" curves encompass 90% of the devices, based 
on the standard deviation of measured values. 

loi T specs can be misleading 

Output-current specs are misleading unless they 
specify V(h t limits such as those included in the spec for 
load regulation. Note how this parameter reveals im- 
portant differences in several reference devices. The 
AD2700, for example, has a 741-type output circuit that 
can sink and source current equally well within a range 
of ±10 mA. VouT changes 0.5 mV max for a 0- to 10-mA 
change in output current, resulting in a load regulation 
of 50 (lV/hiA max. 

The MAX671 has Kelvin outputs that provide load 
regulation of 10 ti.V/mA max. The lOV REFOl mono- 
lithic reference, on the other hand, has a simple emit- 
ter-follower output that can only source current (to 
ground); its load regulation is 1 mV/mA max over to 
10 mA. For the AD580, this same 1-mV/mA limit 
represents lower performance because Volt is only 
2.5V. The lOV references AD581 and AD584 can source 
as much as 10 mA at 25°C but specify the load regula- 
tion (500 (iV/mA max) to only 5 mA. These two devices 
have limited current-sinking capability over the MIL 



temperature range. They guarantee 5-mA source cur- 
rent over the full operating-temperature range. 

Measure Vqut vs Vsuppu 

Line regulation and power-supply rejection ratio 
(PSRR) are two other important parameters for voltage 
references. They represent the change in Vdi t that 
results from fluctuations in supply voltage. Line regula- 
tion is a dc test whose results are usually expressed in 
(jiV/V or mV/V. PSRR can be a dc test, but usually the 
test conditions for this parameter include a range of 
frequencies or a specific frequency. The line-regulation 
spec has the advantage that self-heating effects are 
included in the output-voltage change. PSRR, on the 
other hand, has more realistic test conditions. At 60 Hz 
in particular, self-heating effects avenge out but the 
power supply may offer poor regulation, deg^rading the 
stability of Vout- 

Finally, consider the implications of temperature 
hysteresis in your application. A reference output V„rTi 
at temperature Ti should return to Vouti after you cycle 
the device to T2 and back to Ti. If not, the output 
exhibits hysteresis. The cause is thermal stress within 
the IC, which in turn causes expansion of the siUcon 
with temperature — and this effect is aggravated by the 
contact of dissimilar packaging materials that have 
different coefficients of expansion. With the exception 
of that for the LT1021 (Linear Technology Gorp, 
Milpitas, CA), voltage-reference data sheets rarely 
mention hysteresis. 



Author's biography 

Ron Knapp is a senior member of the 
technical staff at Maxim Integrated 
Products ( Sunnyvale, CA). He holds a 
BS in systems engineering from Bos- 
ton University, an MSEE from 
Worcester Polytechnic Institute, and is 
vice president of the Northern Califor- 
nia Chapter of The International Soci- 
ety for Hybrid Microelectronies 
(ISHM). In his spare time, Ron enjoys 
flying and sailing. 




4-20 



EDN February 18, 1988 



Back-tobasics 
approach yields 
stable references 



Achieving the accuracy and stability that 
IC voltage references promise isn't necessar- 
ily a "piece of cake" but if you return to 
your EE roots and do a little old-jmhiomd 
analq0-circuit analysis, you can obtain im- 
pressive results. 



Ron Knapp, Maxim Integrated Products 

Analog-IC manufacturers make it look simple to 
achieve the voltage-reference accuracy and stability 
that used to present major challenges for circuit design- 
era. Today, obtaining stability of a few parts per million 
per degree should be a routine task. Nonetheless, 
ignoring facts of life such as noise and I-R drops ean 
transform a seemingly simple job into one as complex as 
that faced by reference designers 20 years ago. Atten- 
tion to circuit basics can make obtaining precise rock- 
solid reference voltages in the late 1980s as uncompli- 
cated as the vendors of the ICs intend it to be. 

Selecting a low-temperature-coefficient, precision 
voltage reference starts with careful consideration of 
your noise requirements. If the reference is too noisy, 
the highest dc accuracy and the cheapest price won't 
mean anything. Determine the signal-to-noise ratio 
your applieatipii requires. If p)u intteod to use the 

EDN June 9, 1988 



reference with an A/D or D/A converter, the reference 
noise should be less than Vio the resolution. For exam- 
ple, a 12-bit ADC with a to lOV input has a 1-LSB 
resolution of 2.44 mV. The maximum noise from the 
reference should be no more than 240 (aV p-p. In this 
case, a bandgap reference such as an REFOl or AD581 
will suffice. For a 14-bit converter with an LSB size of 
610 \iN, a noise limitation of 60 (jiV will require an 
AD2700, MAX670, or equivalent. 

Often, you can lower the wideband noise with a large 
capacitor placed on the reference-device output. A 
lO-jiF capacitor is large enough to prevent oscillation 
problems and will typically decrease the high-frequen- 
cy noise (above 1 kHz) by a factor of 3 or 4. Some 
references, hke the AD584, have noise-reduction pins 
that allow you to add an external capacitor. A smaller 
capacitor (0.01 \x.Y) placed in parallel with the feedback 
resistor (if the inverting input of the reference amplifier 
is available) will filter the noise from both the reference 
device and the amplifier, but will also adversely affect 
the turn-on time and the circuit's response to load 
changes. Nevertheless, there is little you can do about 
low-frequency noise, and therefore most reference data 
sheets place great importance on noise in the 0.1- to 
10-Hz band. 

Thermal effects take second place 

Taking into account noise considerations, the second 
most important spec of a voltage reference is the 
temperature eoefficient, or TQ« pos't igiKNre initial 



l£nonn£i facts of life like noise and I-R 
drops can turn what appears to he a simple 
job ttoe a complex one. 



accuracy, though, (tt take it too lightly, thinking that 
you'll be able to adjust it. Remember that any compo- 
nents you add can jeopardize the TC, long'term stabili- 
ty, and reliability — all it takes is one component that 
drifts out of calibration. Fbr example, using a refer- 
ence's trim-a4just feature or scaling its output with an 
external gain stage will probably affect the TC. 

To set the gain of an op amp, you should use TC- 
matched thin-film resistor networks. When you use 
separate RN55D metal-film resistors with TC specs of 
±50 ppm/°C, you introduce a TC error of 100 ppm/°C if 
one resistor TC is -1-50 ppm/°C and the other is -50 
ppm/°C. The fine-trim adjustment of the AD2700 is 
somewhat interactive with the TC; 1 mV of adjustment 
changes the TC by 4 (iV/°C or 0.64 ppni/°C referred to 
the output. The best advice to follow about reference 
trim adjustment is "don't do it." It is much better to 
calibrate the gain elsewhere — at the D/A converter, for 
example. Better yet, make gain adjustments in soft- 
ware. If there is a temperature-independent gain trim 
elsewhere in the system, you can use the AD2700's 
fine-trim output-voltage adjustment to change the de- 
vice's TC (and, incidentally, affect its output voltage). 

High-resolution converters need TLC 

Most high-resolution converters, such as 16-bit DACs 
and ADCs, guarantee linearity consistent with resolu- 
tion, but rarely do th^ guarantee absolute accuracy, 
whieh indudes gain error, to that level. Because the 
gain accuracy depends primarily on the accuracy of the 
voltage reference (whether internal or external), the 
temperature coefficient of the reference determines the 
useful temperature range for converter accuracy (Fig 
1). Applications where absolute accuracy is critical 
include weighing scales, data-acquisition measurement 
systems, automatic test equipment (ATE), and labora- 
tory instruments (such as DVMs and programmable 
voltage standards). 

First, consider a 12-bit-system example. A 12-bit 
A/D converter with its linearity specified to ±V4 LSB 
requires a reference with a TC of no more than 2.67 
ppm/°C from 25 to 70°C to maintain a gain accuracy 
within Ms LSB, or 1.2 mV out of lOV FS. A suitable 
reference would be the AD2710KD, which is specified 
to 2 ppm/°C max from to 70°C. 

For a 16-bit system, you can use a reference guaran- 
teed to 1 ppm/°C, like a MAX671 or an AD2710LD, to 
obtain true 16-bit absolute accuracy over the 7.5°C 
range from 25 to 32.5°C. Between these temperatures, 
the output of the reference changes no more than 75 




\9l — I 1 — 1 1 1 1 1 1 — I 

10 20 30 40 50 60 70 go 90 100 

TEMPERATURE SPAN (°C) 



Fig 1 — Increating the retolution of an AID or DIA amverter 

decreases the temperature range over which it deUverf absobiie 

accuracy comparable to its resolution. 



jjiV — an amount equivalent to less than Vz LSB on a 
16-bit, lOV FS converter. 

Most voltage references on the market produce a 
single-ended output between Vqut and GND, as in the 
AD2700, REFOl, AD580, AD581, and AD584. In these 
types of devices, I-R voltage drops can cause errors 
tiiat can spoil the accuracy of the output voltage. The 
reason is that the load current must pass through the 
VouT pin and the quiescent supply current must pass 
through the GND pin (Fig 2). If the output happens to 
be sinking current — for example, if the load is con- 
nected between Vqut and V* as in Fig 3 — ^then the load 
current also returns through the GND pin. In most 
cases, however, the load is connected between Vqut and 
GND; the load current flows into the reference from V"^ 
and out to the load through the Vqut pin. In these cases, 
the I-R drop on GND won't disturb the output voltage, 
but the I-R drop on the Vqut pin wiU always remain. 

You can minimize single-ended output errors by 
using a device whose package incorporates internal 
Kelvin connections (that is, separate force and sense 
lines) to connect the die to the package pins (Fig 2). 
Running both force and sense bond wires internally 
from the chip to the output pin places the "force" 
bonding wire's resistance inside the output amplifier's 
feedback loop. This technique in effect eliminates con- 
nection resistance except for that of the pin itself and 



4-22 



EDN June 9, 1988 



that of the wiring or metal trace between the output 
and the load. With many references operating at full 
output current, even if you connect the load directly to 
the pin, the voltage drop in the pin resistance itself is 
large enou^ to equal the initial accuracy spec. 

Small enatB add up 

For example, the AD2710LD has an initial accuracy 
of lO.OOOV ±1 mV max. The device is enclosed in a 
14-lead ceramic sidebrazed DIP that can have a pin 
resistance of O.OSfl (Fig 2). If your circuit draws the 
full output current of 10 mA, the resulting voltage drop 
in series with the load will be 0.5 mV — half the initial 
accuracy spec. This drop has the effect of lowering the 
output voltage to 9.9995V (assuming that the factory 
set it to exactly lO.OOOOV with no load). 

If you connect the load to V'^ as in Fig 3, the error 
win be twice as great, because the GND I R drop is 
additive. The result is a further decrease in load volt- 
age, to 9.9990V. In fact, the output-lead resistance is 
the dominant contribution to the load-regulation spec of 
50 (jiV/mA, which is equivalent to O.OSfl. The I-R- 
induced errors can expand into several millivolts if 
there is any length of wiring or pc-board trace that 
measures a few tenths of an ohm. 

For constant-current loads, it's possible to simply 



adjust out the errors caused by I-R drops. However, 
the TC of the reference may be unacceptable because 
the TC of the pin resistance is too high. (Jold has a TC of 
4000 ppm/X, or 0.4%/°C. With this TC, the 0.050 
resistance in the above example would increase by 40% 
between 25 and lOO'C. At 100°C, the resistance is 
0.07O and produces a 0.7-mV ^ror at a load current of 
10 mA. 

Sense at the load 

A voltage reference can easily eliminate all the prob- 
lems associated with I R drops if it uses Kelvin outputs 
with separate force and sense pins joined at the load. 
The sense pin carries only a small, constant current, 
such as that which flows in the gain-determining feed- 
back resistors. The force pin carries all of the variable 
load-dependent current. You close the feedback loop at 
the load by connectn^ the fcnrce and sense pins there; 
that is, yott plaice tiie «ini% and pin resistaBeeB inade 
the feedback loop. 

Because of limitations on the number of package pins, 
some references provide only one GND pin and offer 
Kelvin connections only on the output. This setup is 
adequate if the output sources current but does not sink 
it, as is true in the majority of applications. The 
MAX670 and MAX671 contain full Kelvin connections 



BOND-WIRE 

AND PIN 
RESISTANCE 




Fig Z — When thU reference »uppUe» current to a load, voltage drops 
inside the package are inside die feedback loop and have little effect 
on accuracy. ThevoUagedropaeronthepadeag^ioiltjmtfm ttmbe 
significant, Aoumwr. 



BONO-WIRE 
AND PIN 

I l8=lQ \ RESISTANCE 



EXTERNAL 




10-mA 
LOAD 



Fig 3 — It a reference sinks current into its output from the positive 
supply.boththevoltagedropaerossthepadcagtfigrmmipinandtlie 
drop across its output pin urill affect aeeuraey. 



EDN June 9, 1988 



4-23 



Don't take the initial accuracy too lightly, 
thmim^ tha$ you'll be ahk W adjust it. 



on both output and GND (Fig 4a). These devices can 
source or sink 10 mA. 

Why are Kelvin output connections so important? 
First of all, they make the voltage reference easier to 
use: You can preserve accuracy without providing ex- 
tra-wide printed-circuit traces or limiting the load 
current or the length of the wire that carries it. (You 
do, however, need to consider the possibility of loop 
instability caused by the inductance of the load-current- 
carrying wires et^adtive loading of the feedback 
network.) 

Fifty milliohms can be a big deal 

D'A and A D converters with 12- to 16-bit resolution 
often require separate voltage references. In the case of 
a 16-bit converter, if the full-scale input equals 5V, 1 
LSB has a value of 76.25 (jiV. As good as the AD2700 is, 
with a load-regulation spec of 50 jiV/mA, it takes only a 
1.5-mA change in the output current to cause a 1-LSB 
error. Such a 1.5-mA change means that, if you were to 
use a reference such as the REFOl, with a load- 
regulation spec of only 1 mV/mA, the result would be a 
20-LSB error. In a 12-bit, lOV-FS converter, the same 
1.5-mA reference-current change causes the REFOl's 
output voltage to change by more than V2 LSB. Fortu- 
nately, except for transients that occur when the con- 
verter's code changes, the reference input current of an 
ADC or DAC is normally constant. 

Sometimes, though, you must switch the A/D con- 
verter between a unipolar to lOV range and a bipolar 
- 10 to + lOV range. You can do so by using relays to 
switch the converter's bipolar-offset-resistor input to 
GND or to the voltage-reference output. This arrange- 
ment causes the load on the reference to vary by 1 mA. 
The MAX670'8 Kelvin outputs alleviate concern over 
output-volt^e changes caused by such output-current 
changes. 

Buffering — analgesic for pain of high current 

The MAX670 and the MAX671 are unusual in the 
way that their Kelvin sense lines are further divided 
between two separate pins (Fig 4a). This arrangement 
allows you to add an output buffer transistor or amplifi- 
er for higher current. It also allows you to place the 
added components within the reference feedback loop 
and thus maintain the specified performance at the load 
(Fig 4b). For example, an LHOlOl, together with a 
MAX670, can supply lOV at 2A with a 3-ppm/°C TC. In 
this way, the MAX670 can serve as an ultrastable, 
low-noise power-supply regulator with an output cur- 



(a) 



(b) 



PWR GND 
Q 



Voir FORCE 
VburSENSEi 

Vour SENSEi 



MAXSTO 
MAX671 



GND FORCE 
GND SENSEi 



VouT SENS?i 
VourSENSEt 



MAX670 
MAX871 



GND FORCE 
QND SENSEi 
GNDSENSEt 




Fig 4 — By providing a pair of sense terminals for both the ovXptU 
and ground signals (a), this reference can compensate for voUage 
drops outnde a» mil as inside the package (b). The configuration 
also oUsaw yon to enelote a k^h-ttirrmt output buffer vMhm, the 
feedbBdeloap. 

rent ranging from hundreds of milliamps to a few amps, 
depending on the external buffer components. 

You can use an amplifier to buffer references without 
Kelvin connections, but the voltage at the load is 
subject to added errors such as offset, drift over 
temperature, output-impedance-induced voltage drops, 
and voltage variations caused by line regulation. If you 
know the load current to within —20%, you can supply 
high current regardless of the type of reference, even if 



4-24 



SDN June 9, 1968 



15V O- 




VniT FORCE 



MAX670 
MAX671 




XXX...J 



Fig 5 — A pultup resistor acts as a poor man's output buffer by 
delivering most of the load current. Even Ihough it delivers a snuill 
fraction of the load current, the reference still C(mtrols the output 
voltage. 

it is one with a single-ended output (Fig 5). In such a 
special case, you can use a puUup resistor to supply the 
nominal load current from V* to Vout- The reference 
output then only needs to sinli or source the error 
current — the difference between the actual load cur- 
rent and that supplied by the resistor. Most IC-op-amp 
outputs supply at least ± 10 mA. Ideally, if the puUup 
ciffrent exactly equals the load ciu-rent to ground, the 
output current from the voltage reference will be zero. 
When using references like the REFOl, which can 
source current but cannot sink it, you must guarantee 
that the current in the puUup resistor is less than the 
load current, so that the reference always supplies 
some current. The REFOl supplies 10 mA to ground, so 
you should select the puUup resistor to supply 5 mA less 
than the load current. That way, the REFOl will 
nominally supply 5 mA, a value in the middle of its 
range. 

TTiis technique is prevalent in ATE, where one refer- 
ence supplies the reference input to perhaps dozens of 
D/A converters, which set the voltage or current of the 
pin drivers that supply sgnals to the device under test. 
A similar situation arises in drift testing large numbers 
of D/A converters in a temperature chamber; a refer- 
ence outside the chamber drives the r^er^ice input of 
all of the converters. 

All in all, there are three advantages to using a 
puUup resistor to boost a reference's output-drive capa- 
biUty: Adding a single passive component is simple and 
cheap; you preserve the accuracy and TC performance 

SDN June 9, 1968 



of the reference without resorting to Kelvin connec- 
tions; and you don't need extra supply current (as you 
wmild if you used a buSBr). 

Why not design your own? 

Voltage references seem like simple circuits, so you 
might be tempted to design your own with discrete 
components, but you should consider the tradeoffs 
carefully. To make a bandgap reference like the 
REFOl, for instance, you need two transistors carrying 
equal currents with an 8:1 current-density ratio. In 
other words, one transistor must have 8x the emitter 
area of the other. Matched pairs that have this area 
ratio are not commonly available, but you could use a 
pair of identical devices and set the current ratio with 
resistors, except that the TC of the resistors must 
match as do the TCs of Ri and in Fig 6. In addition, 
you stiU have to amplify the 1.2V bandgap voltage, 
something that requires an op amp wi&t matching gain 
resistors (Rs and Re in Fig 6). 

If you want to construct a reference similar to tiie 
AD2700 (Fig 2), you can do so with a 1N829 5-ppm/°C 
zener diode and an op amp, but again don't forget the 
task's nontrivial nature. First of all, the diode's several- 
dollar price tag is a significant expense. And, in dis- 
crete form, the best temperature-compensated diodes 
have TC specs higher than the AD27(X) spec. Assuming 
you can accept 5 ppm/°C, however, youll need a low- 



\>2 \U 



+ SUPPLY 



VouT-(l + ^)l.205V 



?R5 



t; 

E = - 

4' 



Re 

COMMON 



Fig 6 — A bandgap voltage reference generates the sum, Vbb+V„ in 
which the two voltages have equal and opposite temperature eoeffx- 
eients. TheamplifiertkenraiseiilieaumtoanumayimmimtvoUage 
level. 



4'-25 



drift op amp. The spec of 5 ppm/°C translates into 50 
M.V/°C, and therefore you'll need an op amp like the 
OP07, with an offset voltage drift significantly smaller 
than 50 (jlV/°C. The OPOT's 2.5-|iV/°C drift, when 
multiplied by the required gain of 1.59, contributes 0.4 
ppm/°C (10V/6.3V 0.25 ppm/°C=0.40 ppm/°C). You can 
reduce this drift further by substituting a MAX400 op 
amp: It has a 0.3-(j,V/°C maximum offset-voltage drift 
spec, which translates to only 0.05 ppm/°C. Assuming 
that you use a thin-film resistor network, you should 
allow a 0.5-ppm/°C tracking TCR. You should also be 
aware of thermocouple effects of as much as several 
M.V/°C, a result of interconnections between different 
metals. The thermocouples' sensing and reference junc- 
tions are at slightly different temperatures because of 
gradients across the board. Finally, if you add up the 
cost of the components and the time to build, test, and 
calibrate the circuit, you can easily appreciate the value 
of purchasing a complete, tested, and guaranteed precis 
sion voltage reference. BDM 



Author's biography 

Ron Knapp is a senior member of the 
technical staff at Maxim Integrated 
Products (SunnyvcUe, CA). He holds a 
BS in systems engineering from Bos- 
ton University and an MSEE from 
Worcester Polytechnic Institute. He is 
vice president of the Northern Califor- 
nia Chapter of The International Soci- 
ety for Hybrid Microelectnmics 
(ISHM). In his spare time, Ron enjoys 
flying and sailing. 



EDN June 9, 1988 




4-26 



Op'Amps, Buffers^ 
Video Circuits, 
and 

Analog Switclnes 

Ultra-low Current Shunt Amplifier 5-3 

One Op-Amp Thermocouple Amplifier 5-3 

CMOS DAC Output Amplifier 5-4 

Strain Quage Instrumentation Amplifier 5-5 

Low Drift High Speed Power Op-Amp 5-5 

Low Noise Bridge Amplifier-Weigh Scale 5-6 

1 of 15 Cascaded Video Mux 5-7 

2 Ciiannel Lossless Video Switch 5-7 

Dual Video Amplifier as a High Gain-Bandwidth Op-Amp 5-8 

High Frequency AC to DC Converter . 5-9 

Coaxial Cable Driver 5-10 

Instrumentation Shield/Line Driver 5-10 

Single Supply AC Buffer 5-10 

Video Distribution Amplifier 5-11 

High Speed Sample/Hold 5-12 

High Current Source/Sink 5-12 

DC Servomotor Amplifiers 5-13 

DC Servomotor Phase Lodged Loop 5-14 

CRT Yol<e Driver Circuit 5-15 

Remote IR Motion Detector With Only Two Wires 5-15 

Op-Amp Noise Test Circuit 5-17 

Simple Offset and Gain Trim Circuit 5-18 

General Purpose Trim Techniques 5-18 

Setting Op-Amp Gain Using External Resistors 5-19 

Programmable Gain Instrumentation Amplifier 5-20 

Differential to Single-Ended Converter 5-20 

Submultiplexing Minimizes Leakage 5-21 

Demultiplexing a 16-Bit DAC 5-21 

Programmable Inverter/Receiver 5-22 

Op-Amp Gain Switching Techniques 5-22 

Analog Switch On Resistance 5-23 

High Precision Op-Amps Accomodate +15V Supplies 5-24 

Multiplexer-Amp Combo Tames Losses in Wideband Circuits 5-33 

High-Speed Buffers Help Solve Problems in Circuit Applications 5-36 



5-1 



Ultrm-lMW Current Shunt iljnpfffier 



This circuit measures the power supply current of a 
circuit without really requiring a current shunt resistor: R1 
is only 3 centimeters of #20 gauge (0.8mm diameter) 
copper wire. A length of the power distribution wiring can 
be used for R1. The MAX420's CMVR includes its own 
negative power supply, therefore it can both be powered 
by, and measure current in, the ground line; 




SUPPLY SBOUND 



Notel: RUScin.lJOsoliclcoppefwire. 
Nala2: SiunlcoitatpaMllElemiined 



Figure 5-1. 



.Oiw iHf'Amp ThBrmoem^tlm AmplMmr 



The MAX420 is operated at a gain of 191 to convert the 
52nV/°C output of the type J thermocouple to a 10mV/'C 
signal. The -2.2mV/°C tempco of the 2N3904 is added into 
the summing junction with a gain of 42.2 to provide cold 
junction compensation. The ICL8069 Is used to remove 
the offset caused by the 6CX)mV initial voltage of the 



2N3904. Adjust the 1 0K trimpot for the proper reading with 
the 2N3904 and isothermal connection block at a temper- 
ature near the center of the circuit's operating range. Use 
the component values shown in parentheses when using 
a type K thermocouple. 



100k 

(115») 

r-WV T- 



42.2k 
(54.*) 



THERMAL I f 2N39M 



Note 1 : Q1 and connection terminals 

must tie at tlie same temperature. 

Not»2: Values inparenttiesesaiebr 

lypeKllwnnocouple. 

Note3: Connections to invertino input 

of op amp sliould be kept as sliortas 

possibleto reduce noisepickup. 

Mirt»4: All circuit powet is s15V. 



Rgure 5-2. 




-wv- 

Ik 



hHH 

0.1nF l).1iiF 



-AAA/ — 




I 10mV/"C«25'C 
12mV/-C8750X 

/„ 10mV/-CO25'C \ 
12mV/'CO750-C / 



5-3 



CMOS CMC Otilvut Anv»m0r 



To maintain linearity in CMOS current-output DACs, the 
offset voltage of the external output amplifier must be 
considered. Within the DAC, the resistance from loun to 
ground varies nonlinearly with the DAC input code. The 
output voltage (Vout) as a function of amplifier offset (Vos) 
is: 

VouT = Vos(1 + Rf/Routi) 

Since Rf is the feedback resistance in the DAC and 
RoUTi varies (from Rp to infinity) with code, amplifier offset 
can degrade linearity. The MAX421 , chopper stabilized op 
amp has a maximum offset of 20nV over temp)erature, 
introduces no linearity errors, and requires no offset adjust- . 
ment. 



.Ofl-10VREFEIWC£ 




Mllf 11.1|if 



Figure 5-3. Low offset maintains DAC linearity. 



5-4 



strain Omigm lamlmmmitmOon AmpUHmr 



This circuit has an overall gain of 330. More gain can 
easily be obtained by lowering the value of R2. Untrimmed 
Vos is lOjiV, and Vos tempco is less than 0.1jiV/°C. In 



nnany circuits, the l\/IAX400 can be omitted, with the two 
MAX421 differential outputs connected directly to the dif- 
ferential inputs of an integrating A/D. 



ainF 0.1UF 

iHHh 




R7 
100k 



IWH 

0.1mF 0.1|iF 

Figure 5-4. 10iiV Vm, 0. I^V/'C Strain Gauge Instrumentatiai Amplifier 



Note 1 : Malching rules : R1 = R3 and ^ = ^ . 

n7 no 

Matchina determines CMRR, tor example 
0.1 % = HWB, 0.01 % = eOdB. 
Note 2 : Metal lilm or wire-wound resistors are recommended 
Note 3: A1 's internal clocli is slaved to A2 via CLK IN pins. 
Note4: AllannplifiefspQiiiiefHiliomalSV supplies. 
NolaS: R2isaselecfe(l«alue. 



LowllriRMfgh 



This circuit has the DC Vos and gain characteristics of 
the MAX420, and the power handling and high speed AC 
characteristics of the LH0101 . 

The MAX420 monitors and Integrates the offset error at 
the inverting input of the LH0101 , then adjusts the non-in- 
verting input such that the inverting input voltage is within 
5|xV of ground. The 10l</47 ohm attenuator between the 
MAX420 and the LH01 01 input scales the offset adjustment 
range such that a ±10V swing at the MAX420 output 
corrects for ±50mV of offset in the LH0101 . 

The MAX420 does not compensate for the output volt- 
age error of the LH01 01 Ibias x Rfdbk, but this can be made 
negligible in most systems since the LH0101 Ibias is only 
1nA. 




Figure 5-5. 



5-5 



Low Meise BiMa» AuHfUttw - Weigh 9cml0 



This amplifier connection uses two MAX426 precision 
amplifiers (A1 and A2), witin appropriate gain resistors (R1 
througli R4) to amplify the output of a strain gauge bridge. 
The bridge's full-scale differential output of 20mV is ampli- 
fied by a factor of 300. This signal is then filtered and 
buffered by A3. A bandwidth of approximately 3Hz limits 
output noise to around lOnVrms (only 56nVrms referred to 
the input), wiiich gives a signai-to-noise ratio of llldB. 
Measurements to within a few parts per million are possi- 
ble. 

The two input amplifiers have auto-zero inputs which 
correct all amplifier DC error. The autozero pulse needs to 
be applied on power-up and occasionally afterward. This 



pulse may be applied as infrequently as every 30 minutes 
or more because the effect of amplifier drift appears only 
as a small 300Hz ripple signal with an average value of 
zero and is removed by the 3Hz filter. Amplifiers A1 and 
A2's internal switching clocio free run internally, but gen- 
erate virtually undetectable output ripple. 1/f noise Is also 
minimized. 

The circuit assumes that the strain gauge is loaded with 
a tare weight so that it always has a positive output signal, 
consequently, A3's output is always positive so that A1 , A2, 
and A3 may all be powered from a single +10V supply. If 
A3 s output must swing negatively, then it will require a 
negative supply. 




350n 
BRIDGE 
2mV/V 
SENSmVITY 
20mVFULl 
SM£ ^ 



I AUTOZERO I 




R5 



C2 I I 0,6auF 



51k 



: 0.22llF 





■MATCHED RESISTORS 
±0.01 ».12PPM/"C TRACKING 



R4 

ISO** 



Figure 5-6. 



&4 



1 of 15 emtemOed Vid0o Mux 



Two MAX455S can be cascaded to form a 1 of 15 video are usually close to one another, the outputof the first mux 
mux by connecting the output of one mux to one on the should be terminated to preserve its bandwidth, 
input channels of a second mux. Although the two devices 



1'. 11 13 12 11 to 



T-.f ^ib Ti3 Til Tip Ts 17 

i i i f A i i 




5pF 

+ — vw- 

1000 



A3 A2 A1 m 



20 19 



3.9k _ 



JTPUT I 



7 6 5 4 3 2 1 



I" I" I' I" I' I' -jr-f 



m4ss 




20 19 
^1 



iooa 




5-7 



.Omi VkkHf MmplU9r Am A tUi^ eiam-4UmamMUi Op Minp 



By cascading both amplifiers of a MAX457 (dual video 
amplifier) and adding appropriate pfiase compensation, 
one can build a composite amplifier that has high gain and 
wide bandwidth while exhibiting good DC accuracy. 
These video amplifiers normally drive either 75 or 1 50 ohm 
loads and operate at low gain. If one were to cascade both 
amplifiers, each at a gain of 20dB, one would get significant 
distortion at the output. The approach tal<en in this design 
is to run the first amplifier with no load to get maximum 
voltage gain, about 660 V/V. The second amplifier, driving 
the 150 ohm load, will have a voltage gain of around 65V/V. 
Total DC gain of the composite amplifier is then about 
92dB. Without phase compensation, though, the circuit 
will oscillate. The amplifier can be stabilized by adding a 
series R-C circuit between A1 's output and inverting input. 

The circuit has a closed loop gain of 4GdB (100 V/V) 
while driving a 150 ohm load. Output swing is typically 
±3.3V with this load, while linearity from -2.0\/ to +2.0V is 
about ±0.5%. The -3dB frequency has been adjusted by 



TABLE 5-1. DC Input and output voltages. Offset voltage not 
adlusted. 



ViN 


VOUT 


+30.000mV 


+2.968V 


+20.000mV 


+1.963V 


+ 10.000mV 


+0.960V 


O.OOOmV 


-0.046V 


-lO.OOOmV 


-1.060V 


-20 000mV 


-2.070V 


-30.000mV 


-3.059V 




R and C to be 10MHz (gain x bandwidth = 1GHz). A 
frequency sweep shows only about 3% peaking near the 
roll-off frequency. Full output-swing of ±2V is achi6ved«)ver 
the 10MHz bandwidth. 

Table 5-1 gives the DC performance of the closed loop 
amplifier. Gain resistors R1 and R2 measured 99.78 and 
9965 ohms respectively. This would give a theoretical gain 
of (R1 + R2)/R2 = 100.870 V/V. The actual gain from -2V 
to +2V was 1 00.825 VA/ which is very close to the expected 
gain. 

To put things into perspective, a BB3554/AD3554 oper- 
ating with NO phase compensation (for maximum 
bandwidth) has a -3dB frequency of about 7MHz at a 
closed loop gain of 40dB. 




Figure S-9. Schematic of composite amplifier mtft 4CMB of gain 
and lomztjandwidm. 



-216ns 2BBns/dlw IrtI 

Figure 5-ia 



5^ 



High Frequeney AC To DC Comnrter 



Test boards often need to measure the magnitude of AC 
sine waves over a wide frequency range. The circuit 
shown here uses a dual video amplifier to make an average 
responding AC to DC converter. The MAX457 was se- 
lected because it has high input impedance, wide 
bandwidth, fast slew rate, and a transconductance output 
stage. (A transconductance output stage is desired when 
building active rectifier circuits). 

The first amplifier, A1, is just a scaling amplifier. The 
amplifier's MOSFET input stage provides a high input 
impedance so that the signal source is not loaded appre- 
ciably by the amplifier. Closed loop gain of this first stage 
is set by R1 and R2. The signal needs boosting to make 
up for the small signal losses of the low (open loop) gain 
of the video amplifiers, and also to scale to output for an 
average equivalent RMS DC voltage. R3 suid C3 are 
needed to make At unity gain stable. 



TABLE 5-2. DC Output Voltaga (tOC - (-Oq) Inr VPC vs. Frequency 



ViN 

(Vrms) 


.001 


.010 


.100 


1.00 


Frequency (MHz) 
2.00 


3.00 


5.00 


7.00 


10.0 


0.010 


,0096 


.0096 


.0094 


.0072 


0045 










0.030 


.0298 


.0298 


.0296 


.0279 


.0238 


.0205 


.0142 


.0076 




0.100 


.1002 


.1002 


.999 


.968 


.931 


.894 


.828 


.752 


.616 


0.300 


3016 


.3015 


.3011 


,2959 


.2914 


.2876 


.2815 


.2728 


2570 


1,000 


1.005 


1.005 


1.003 


.995 


.986 


.979 


.970 


.948 


.920 


1.500 


1.492 


1.493 


1.489 


1.478 


1.464 


1.446 


1.398 


1.351 


1.284 



The second amplifier, A2, is an active full-wave rectifier 
circuit with a differential DC output signal. R5, R6, and D1 
rectify positive output signals; R7, R8, and D2 rectify 
negative output signals. R9, RIO, C4, and C5 form two 
lowpass filters. The DC output consists of two signals 
(-1-DC, -DC), but one can use just a single output (e.g., 
+DC) and multiply by 2. 

Table 5-2 gives the DC performance of the AC to DC 
converter. A Fluke 8920A True rms voltmeter was used to 
monitor the input to the circuit. Although the converter 
circuit is optimized for signals in the 0. 1 to 1 .0 Vrms range, 
it worked well down to 10 mVrms, reaching -3dB at 1MHz. 
For signals ranging from lOOmV to I.SVrms, the converter 
gave useable response out to 10MHz. Because of the 
limited voltage swing of the video amplifiers, signal level is 
limited to 1 .SVrms sine waves. 



Cm 




Figure5-11. AC Sinevusm to DC ConvertBT (IVrms in > IVocout) 



5-9 



CoaMlal Cabl» mfhmr 



With an input resistance of 10 Qand input capacitance 
of 4pF, tfie LH0033 places negligible load on a 50 or 75il 
video source. Tfie Maxim LH0033A is guaranteed for 
opieration witfi +5V power supplies common in video sys- 
tems, and is also specified for a minimum ±2V swing into 
a 75S1 load. Tfie LH0033 typically tias only 2 degrees of 
pfiase non-linearity over tfie frequency rang© ®f 1 to 
20MHz. Tfie 68£1 resistor on the output can be sfiorted out 
if a fiigfier output voltage is required, but tfiis causes a 
mistermination of the 75Q cable, and reflections will not be 
absorbed by the coaxial driver output. 




FOR ALL CASES ENSURE THAT: 



Figure 5^ 12. Ooaidal Cable Driver 




Figure S-1 3. 



mntfiB Supply AC BuHmr 




Figure 5-14. 



SrtO 



. VU»o OfaMbHtien AmplMBr 



Four LH0033A buffers form a video distribution amplifier 
capable of driving a number of 75fi output lines from a 
single source with very low signal loss. The amplifiers 
operate from ±5V supplies with a total power dissipation of 
640mA plus the output power. Input resistance is negligi- 
ble in most situations. The input capacitance, however, 
should be considered as it may result in high frequency 
misterminations at the input. Voltage gain is specified at 
typically 0.91, 0.84 min (±5V supplies and 7Sil load), so 
the worst case insertion loss of the distribution amplifier is 
1 .5dB, and is typically under IdB. Protection resistors are 
included in series with pins 10 and 12 of each device so 
that the distribution amplifier tolerates momentary over- 
loads on the outputs. 

Figure 5-15 is a similar video distribution amplifier which 
has output resistance of 75Q to back terminate the outputs. 
The back termination resistor is selected to be 68ii to 
account for the typical 6Q output resistance of the LH0033. 
Because each 75Q load is isolated from the buffer ampli- 
fier, each device is able to drive two loads. The voltage 
loss through this amplifier will be approximately 6dB. Note 
that protection resistors are unnecessary in the back ter- 
minated configuration, as the LH0033 can safely drive the 
68CI termination resistor even if the cable Is shorted. 





Figure 5- 16. 



Figure 5-15. 



§•11 



In Figure 5-17, the first LH0033 buffers the input and 
drives the hold capacitor through the FET, whenever the 
Sample/Hold logic input is in the sample mode. When the 
logic input changes to the hold mode, Q1, an N channel 
junction FET, opens up, isolating the hold capacitor from 
the input LH0033, and the output voltage no longer follows 
the input. The second LHQQ33 buffers and isolates the 



sample capacitor voltage from the load. Since the input 
bias current of the LH0033 is typically less than 1 nanoamp, 
the droop rate of this sample-and-hold is less than 1 
mV/ms. 

Since the LH0033 has a slew rate of 1500 V/|is and a 
100MHz bandwidth, this LH0033-based sample-and-hold 
is well suited for use with video speed flash A/D converters. 



Figure 5-17. High Speed Sample/Hold 




. High Current Source/Sink 




l0UT= 



Figure 5-18. Higtt Current Source/Sink 



5-12 



Figure 5-19 shows a voltage feedback DC servomotor 
amplifier. Thiis type of control loop is normally used when 
the speed control is achieved by controlling the motor 
voltage. With the resistor values shown, the voltage at the 
motor will be -5Vin. The output voltage is sensed at the 
motor, therefore voltage drops in the cable between the 
LH0101 and the motor will not affect the voltage applied to 
the motor. The 1012 resistor and 0.01 jiF capacitor may be 
required to prevent oscillations. 

Figure 5-20 shows a current feedbacl^ DC servomotor 
amplifier. This type of control loop is normally used to 
develop a torque approximately proportional to the input 
voltage. Like Figure 5-19, this circuit delivers a constant 
current that is proportional to the input voltage. 

Figure 5-21 combines both current and voltage feed- 
back to achieve laetter open loop speed regulation than 
can be achieved by either Figure 5-1 9 or 5-20. The specific 
values of RS, RFI and RGI are chosen to best approximate 
the Speed/Current/Torque characteristic of the motor. Ca- 
pacitor Cc may be required for stability if the positive 
feedback is such that the motor speed increases with 
increased torque load. 

These circuits will either source or sink current, depend- 
ing on the polarity of the input voltage, and can drive DC 
motors in both directions. 



V* ttliif 



Vm 




Figure 5-20. Ton^je Femlback Servo Motor AmpUer. 



50k 

V\AA 




6.1nf — 



Figure 5-19. Sen/o Motor Amplifier. 



tin 




Figure 5-21. Constant Speed hSolor Driver. 



5-13 



so Swiiiieffiefor Mas* JLocIhmI Loop 



In the circuit of Figure 5-22, the shaft encoder produces 
600 pulses per revolution. These pulses are compared to 
a reference frequency by the digital phase comparator of 
the CD4046. The ou1|3ut of the phase comparator passes 
through a low pass filter and drives the input of the LH0101 . 
The LH0101 amplifies this signal and drives the DC servo- 
motor. The phase-frequency comparator of the CD4046 
increases or decreases the input voltage to the LH0101 
until the shaft encoder output is the same frequency as the 
reference input. 



Motor Speed (in RPM) = 



Fin X 60 
N 



where Fin is the frequency of the reference input and N Is 
the number of shaft encoder pulses per revolution. 



A sin§i8-pulse'per-revolution speed pickup can be 
used in place of tie shaft encoder, but the PLL low pass 
filter time constant must be greatly increased. 



Note that this circuit is similar to a standard phase 
locked loop except that the LH0101, the motor, and the 
shaft encoder replace the internal VCO of the CD4046. 
Unlike the VCO of the CD4046, the motor adds another pole 
to the system response and loop stability must be carefully 
analyzed, particularly if the motor and its load has signifi- 
cant inertia. As with most feedback systems, the loop will 
be stable when there is only one dominant pole. The loop 
filter time constant should preferably be at least 1 decade 
higher or lower than the constant of the motor and its load. 



VARH8LE 
FREQUENCY _ 

SQUAflEWAVE ' 

REFEKENCE 




INCREMENTAL 
SHAn 



Figure S-22. ServomcXor Phase Locked Loop. 



5-14 



The 300kHz power bandwidth and 5 Amp peak output 
current capability of the LH01 01 make it well suited for CRT 
yoke driver circuits. This circuit is basically a constant 
current source/sink with a transconductance of 435mA/V 
(reciprocal of the 2.3Q current sense resistor). The resistor 
Rdamp lowers the Q of the inductive yoke; the value of 
Rdamp is chosen empirically for the least distortion at the 
operating frequency. At low frequencies Rdamp is not 
required. 



CRT Yoke IMmr Gbr&M 



v+ 




INPUT 



Figum S-Z3. CRT Yolm Driver Circuit. 



Remote IR Motion Dotoetor With Only Two Wires 



Penwalt Corporation has recently introduced a 180° 
Dual Channel Pyroelectric IR Detector Module (PIR 180- 
100). This module has two interdigitated sets of thin film 
IR detectors which are buffered by two internal J-FETS. A 
plastic Fresnel lens is available which not only concen- 
trates the IR signal but also creates alternating zones of 
magnification which serves to enhance the effect of a 
moving target on the sensor. 

The circuit shown in Figure 5-24 is a modification of the 
manufacturer's original recommended application circuit. 
This circuit is substantially smaller and is able to operate 
on less than 100 microamps of overall current. It may be 
used as shown in Figure 5-24 or a power MOSFET such as 
the IRF530 can' be used in place of the R16, Q1 output 
stage. 

Since the MAXIM ICL7642 Quad CMOS Op-Amp only 
requires 10 microamps per amplifier, the overall power 
consumption is reduced to such a low level that it is 
possible to derive the operating current through an external 
5.1k ohm resistor with less than a 1/2 volt drop across the 
resistor. Figure 5-25 shows how the Figure 5-24 amplifier 
can be driven from a remote microcontroller through the 
external 5.1k ohm pull-up resistor. When the IR sensor 
detects a moving IR signal, such as the body heat of a 
human being, the output transistor turns on and shorts the 
two wires together. The microcontroller detects this logic 
"0" state and can initiate a warning signal. The circuit is 
capable of detecting the heat from a live person from 50 
feet. However, the sensor will also respond to other 
sources of IR or temperature and, therefore, will be prone 
to cause false alarms if the sensitivity is adjusted too high. 



The small size and low cost of this two wire driven sensor 
makes it very useful as a pre-warning of possible intrusion 
so that a TV camera or other device can scan the area. 

The amplifier in Figure 5-24 consists of connecting the 
internal J-FET transistors as a X10 gain amplifier. The 
sensors are arranged to provide a dual output so that the 
ambient temperature inputs will be cancelled by the com- 
mon mode rejection of the op-amp. The D.C. quiescent 
voltage may differ by several volts. Therefore, the second 
stage of amplification consists of a band pass filter which 
blocks the D.C. offset. The gain of the second stage is only 
5 but this allows for a 1 microfarad monolithic capacitor to 
be used as the high-pass input to the amplifier. The 
passband is from around 0.1Hz to 2Hz. The next section 
of the amplifier shifts the output quiescent voltage to the 
internally generated reference voltage which is 1/2 the 
supply voltage. This state also serves as the variable 
"gain" stage. The last section uses two amplifiers as 
comparators to drive an "over-under" detector which 
drives an output device such as an open collector transis- 
tor. 

Since the output of the IR sensor is A/C coupled to the 
amplifier, a steady input signal will result in a momentary 
output which clears as the signal equalizes the charge 
across the input capacitor. A second triggering of the 
alarm will occur when the detected person moves away 
from the view of the sensor. 



5-15 




ICIICUSC 

MmumemrsPBODucis 

Figure 5-24. 




5-16 



Op Amp Molae Test dreutt 



The circuit below is used to test op-amp noise, and has 
an overall gain of 10,000. A gain of 1000, taken at the 
device under test (DUT), is followed by a gain of 10, The 
schematic differs from some common noise test circuits In 
that the measurement bandwidth used here extends to DC. 

Noise specs are typically quoted from 0.1Hz to the 
upper limit frequency to stay away from offset drift with 



temperature and 1/f noise. Offset drift and 1/f noise are 
usually lumped together because most real applications of 
precision op-amps are not afforded the luxury of separat- 
ing the sources of low frequency error. Performance down 
to DC is what usually matters. Both bipolar and CMOS 
chopper amplifiers do very well when their strengths are 
utilized. 




Figure 5-26. 



5-17 



A common error made in analog design is when overall 
system adjustments are "heaped" on the internal offset trim 
circuit of one op-amp. There are several reasons why this 
is usually not a good idea. One is that the amplifier's offset 
adjustment range may not be wide enough to remove 
errors from other circuits. IVlost op-amps' trim range is 
about two or three times their worst case offset spec. 
Another reason is that the drift performance of many op- 
amps degrades when their offset voltage is moved from the 
initial value. Some amplifiers specify tfiis increased tem- 
perature drift in nVrc per mV of adjustment, but many do 
not. 

In this circuit, an op-amp takes care of both zero and 
gain adjustment without using its offset trim pins, and also 
provides a buffered output. The resistor values shown 
allow ±20mV of zero adjustment and ±0.5% gain adjust- 
ment around unity. If a nominal gain of two is preferred 
then R1 and R2 can be omitted. 




Figure 5-27. 



This may seem like an elementary subject, but we're 
betting 1/2 page that it isn't. The higher the tolerances 
required in a given analog design, the more likely that one 
or more trims will be needed. From left to right gwe three 
progressively improved trim circuits: 

POOR: The cheapest, but suffers from poor resolution. 
Even with high quality multi-turn trimmer, settability rarely 
Is better than 1%. Also the temperature drift of most trim 

pots will not support precision work with this approach. 

FAIR: This is the common "first-pass" at improving drift 
and resolution. The range of the trimmer is reduced by 
fixed resistors (hopefully 1 %) so the resolution is increased, 
but a drawback is that it often requires low resistance 
trimmers (below lOOSi) which are frequently difficult to 
obtain. Another disadvantage is that absolute value drift 
in the trim pot will affect the output. On most trimmers, 
absolute drift has very loose limits compared to ratio drift. 

PREFERRED: By adding one more resistor (R3), the 
problems of the center circuit are eliminated: 1) Large 
resistance values can be used for the trimmer. 2) Absolute 
trimmer drift has no effect on the output. 3) The adjustment 
will have highest resolution in the center of range where it 
is needed most. 4) The design can start with the optimum 
fixed resistor divider values, which needed not be changed 
If the trim is added later. 



.Omwrtf ffuipase Trim Twhnlquaa 




FigumS-2B. 



5-18 



(Reprinted with permission from Vishay Corp. 
San Diego, CA) 



Gain setting resistors must be chosen so that the oper- 
ational amplifier performs to expectation without unwanted 
amplffication drift or noise insertion. 

Noise 

Resistors whose current paths include particle to parti- 
cle contact points of conductive material in a non-conduc- 
tive matrix introduce current noise to varying degrees 
depending on construction and ratio of conductive to non- 
conductive material. (Higher values have less conductive 
material, and high noise insertion.) Composition resistors 
(conductive carbon in non-conductive plastic) will insert -8 
to + 1 2dB of current distortion or noise and cermet resistors 
(conductive metal in non-conductive glass) will insert -26 
to-12dB. 

Resistors made of metal alloys where the resistivity is at 
the intergranular boundaries and these boundaries are 
collectively very long do not insert measurable noise. (-42 
to -36dB is below the measurement capabilities of most 
equipment and below the requirements of most circuits.) 
Resistors made of rolled foil (Vishay) and resistors made 



.iMUfm Off, fkmff €Mn Using Exfpnmf Resivtais 

of drawn wire (Vishay and others) do not insert measurable 
noise. 

Resistors characterized as "thin film" (Vishay and oth- 
ers) are produced from such a variety of materials and 
processes that it is well to request the noise index from the 
manufacturer prior to approval of a cartdidate thin film 

resistor. 

Ampllfkxtlon Drift 

The amplifier will maintain its gain only to the degree that 
the external resistors maintain their value and ratio. Resis- 
tors drift to varying degrees depending on construction, 
value range, and severity of stress. If the stresses are 
differently applied to one of the gain setting resistors then 
the gain can be temporarily or permanently distorted. 
Stresses of temperature, voltage, frequency, chemical 
abuse, mechanical abuse, and time all affect resistors 
and/or ratio. Devices with other than copper leads intro- 
duce ratio changes due to the thermal EMF generation at 
the lead to PC board junction. 

All of the above potential for drift can be minimized to 
the degree required from selection of the proper resistor 
pair (or quad in the case of a differential amplifier). In order 
of performance, the candidate resistors are shown in 
Table 5-3. 



Table 5-3. 


A 

25ppm/"C 


Thin Film Resistors 
(discrete) 


For: Cost, board layout, can select power rating to favor dissipation, quiet. 
Against: No way to unily temperature. 


B 

lOOppmrC 


Thick Film (Cermet) 
DIP or SIP 


For: Cost, uniform temperature 

Against: Noise, high TCR, time and temperature dirft. 


C 

10ppm/"C 


Wirewound resistors 
(discrete) 


For: Stable, good TC, good noise. 
Against: Size, inductive/capacitive. 


D 

10ppm/"C 


Thin Film networks 
DIP or SIP 


For: Uniform temperature, any resistance combination. 
Against: Mask making causes bng lead time. 


E 

5ppm/*C 


Foil resistors 
(discrete) 


For: Ultra stable, temperature differences not so important. 
Against: Cost. 


F 


Foil dividers 
3 lead SIP 


For: Ratio accuracy to 0.005%, TCR tracking to 0.5ppm/*C. 
Against: Cost, possible mask making time. 


G 

5ppm/*C 


Foil Networks 
(Hermetic) 


For: Any resistance combination, no mask making time, no minimum 

quantity, best long term stability. 
Against: Cost, resistance range. 



Some simple rules that apply to all resistor ratios are: 



1 . The lower the fundamental TCR the better the feed- 
back resistor will track the input resistor. 

2. The smaller the amplification ratio the better the track. 

3. The lower the dissipation the better the track. 

4. The higher the tecfinology the better the track, 

5. Networks track better than discretes of the same tech- 
nology. 

6. The lower the specification the less the cost. 

For further assistance in resistor selection contact 
the application engineering departments of the various 
resistor manufacturers. 



5-19 



tUm Oafn Inrntrnmaiftatfon Amp 



A MAX329 low leakage multiplexer conveniently 
switches gain in an instrumentation amplifier circuit. R1 
through R7 set the range of possible gains. The values 
shown provide gains of 1 , 2, 4, and 8. Gain accuracy and 
common-mode rejection are dependent on resistor match- 
ing accuracy, but are independent of multiplexer on-resis- 
tance. 




GAIN 


1 


2 


4 


8 


AO 








1 


1 


A1 





1 





1 



FiS)ureS-29. 

Offfiwwnttof To 



Commtf 



1S0Q 



1/2MAX333 



Figure 5-30. 



mo 



Submultii^xlng Minimams Leakage 



Recognizing that leal<;age current is a critical analog 
switch specification, Maxim guarantees an OFF channel 
leakage of only 0.1 nA (only 1/100 of the industry standard 
spec) and ON channel leakage of 0.2nA (1/50 of industry 
standard spec). This may still be too much leakage current 
if many channels are bussed together as shown in the left 
side of this figure. 

Submultlplexing as shown on the right hand side will 
reduce the total system leakage. Another benefit is that 
the digital interface is simplified since no chip-enable 
decoders are needed. 



SUBMUXED OUTPUT 








CHI _ 




MAXIM 








DG508 






DG508 











It 



am , 

lL=l[)(0tQ + 7lQiaFf) 

FigumS-31. 




• MJOOM 

• _ DG508 



.OemuUlj^exIng A 16-Blt OAC 



Two DG508AS can be combined with low cost buffer 
amplifiers to generate eight 16 bit accuracy outputs from 
one 16 bit DAC. 

The upper DG508A routes the DAC output to 1 of 8 sets 
of voltage-hold capacitors and buffers. The lower DG508A 
closes a feedback loop by selecting the appropriate buffer 
output. The DAC output amplifier will drive the hold capac- 
itor such that the buffer amplifier output is equal to the DAC 
output. The buffer amplifier Vos therefore is not critical, 
and the buffer need only be low leakage to reduce the 
"voltage droop" while the other channels are being up- 
dated. The amplifier at the output of the DAC should be a 
liigh quality amplifier with both low Vos and Vos tempco. 







16-BIT 

DAC 






Figure 5-32. 



5-21 



Analog switches can control ttie functioning of an op- 
amp. Here ttie op-amp is alternately an inverter or buffer, 
under control of the switch) polarity. As a buffer, tfie gain 
is always 1, but as an inverter, tfie gain is set by tfie ratio 
of the input and feedback resistors. By adding a compa- 
rator, tfie function can be synchronously switched as the 
input polarity changes, effectively rectifying the output. 
The output polarity is determined by the switch logic (nor- 
mally open or normally closed) and the comparator input 
polarity. 




Figure 5-33. 



.OH Amp 9«ln Smiteltlng Techniques 



Analog switches provide a convenient way to control 
op-amp gain. In the first of two methods shown here, the 
switch is placed in series with part of the gain determining 
network, and the switch on resistance (Rdson) becomes 
part of the overall gain. If the resistors are very large, the 
switch on resistance (and its temperature coefficient) is 
insignificant. In the right hand diagram, the switches are 
in series with the op-amp input, so on resistance has no 
effect on the gain. In this configuration, however, switch 
leakage and charge induction may contribute to the op- 
amp's performance. 



BoNlSP/WTCiFeAlN 
SETTING NETWOIK 



Ron < 



nniBOUTSIOEGMN 

SrriNGNEnKMc 




Figure S-34. 



Analog SwUeh On Resi^uw 



The on resistance or Rdson of an analog switch varies 
with both the power supply voltages and the analog input 
voltage. In both cases the Rdson varies because the Vqs 
(gate-to-source voltage) changes. 

The MAX331 uses an N-channel and a P-channel 
MOSFET in parallel. When the analog signal voltage ap- 
proaches the V+ supply voltage, the Vqs on the N-channet 
MOSFET is reduced and its resistance goes up. A similar 
effect occurs when the input voltage approaches V-, but 
the increase in Rdson is less since the N-channel MOSFET 
is fully turned on and its resistance is less than that of the 
P-channel MOSFET, 

This graph also applies for: MAX332, MAX333, DG201 A, 
DG202, DG211, and DG212. Other Maxim analog 
switches and multiplexers behave similiarly, with propor- 
tional differences to resistance values. Exceptions are 
MAX310/311. MAX341/3/5/8, MAX358/359. MAX368/369, 
and MAX378/379, which have different internal switch 
topologies. 



500 , 




■15 -10 -5 <i +10 .15 

mus sm. voiTASE (V) 

Figure 5-35. 



High- 



amps accommodate 
15V supplies 



Monolithic, dc'Stabilized CMOS amplifiers 
are no longer limited to a ±8V power- 
supply range: One family of CMOS op 
amps can operate from ±15V supplies. The 
op amps' wider supply range makes them 
suitable for use in a variety of analog sys- 
tems that require precision dc amplification. 



Leonard German, 
Maxim Integrated Products 

By employing a family of chopper-stabilized CMOS op 
amps (the MAX420 Series) that can operate from ±2.5 
to ± 16.5V supplies, you can obtain precision dc amplifi- 
cation in industrial-control, data-acquisition, servo, and 
other applications that were beyond the capabilities of 
earlier CMOS chopper-stabilized op amps. 

These precision amplifiers can provide good signal 
conditioning for thermocouples, for example. Despite 
their advantages — low cost, high reliability, and the 
ability to measure wide temperature ranges — tiiermo- 

EDN May 29, 1986 



couples are somewhat difficult to deal with electrically, 
because they have low output signal levels and require 
an ice-point reference. Typical thermocouple output 
signal levels (on the order of tens of microvolts per 
degree C) dictate that the signal-conditioning amplifi- 
ers used with thermocouples must have input offset and 
drift specifications well below those levels. You need 
such specs especially if you want to realize resolution 
and repeatability to a fraction of a degree. 

The circuit in Fig 1 readily amplifies thermocouples' 
low4evel output signals. The MAX422 has a maximum 
input drift spec of SO nV/°C, so the amplifier contrib- 
utes only 0.001* of output error for each degree of rfiift 
in ambient temperature. Because the op amp can use 
±15V power suppUes, the design is simple: A basic 
inverting summing network combines the thermocou- 
ple output, cold-junction compensation, and cold-junc- 
tion offset. 

The trim procedure is also very simple, because gain 
and cold-junction adjustments don't interact. This lack 
of interaction is a significant advantage in multichannel 
setups, which are fairly common in thermocouple mea- 
surement systems. 

The small-signal npn transistor provides ice-point 
cooqtensation for the thermocouple. It generates a 

149 



5-24 



Si0nal-coniUtionin£ amplifiers used, with 
thermocouples must have input offset and 
drift specifications well below typical ther- 
mocouple output signal levels. 



m o- 



THERMAL CONTACT 




(4a.2k) 
S4.9k 

-vyv>— 



ICE-POINT COMI>ENSAT10N 
2N3904 
O, 



Ik 
-AV>- 



NOTES: 

1. Q, AND THERMOCOUPLE TERMINAL BLOCK MUST BE AT SAME 
TEMPERATURE FOR MAXIMUM COLD-JUNCTION COMPENSATION. 

2. OUTPUT VALUES FOR K-TYPE THERMOCOUPLE ARE 10 mVCC AT 
25"C AND 12 mVrC AT 1000'C. OUTPUT VALUES FOR 

J-TYPE THERMOCOUPLE ARE 10 mVI-X: AT 25"C AND 12 
mV/*C AT 750^. 

3. TO REDUCE NOISE PICKUP, KEEP CONNeCTIONS TO INVERTING 
INPUT OF AMPLIFIER AS SHORT AS POSSlBlE. - 

t. ALL CIRCUIT POWER IS ±15V. 

5. ALL RESISTORS ARE 1« METAL FILM. 




Fig I — This simple signal-conditioning circuit tisi'^ tut iHreytitiy i^iti in titer to cnitihitte thermocouple output, cold-junction compensaUont and 
cold-jnticttan offset signals. The circuit is easy to trim, because the gain and cold-junction offset adjustments do not interact. 



-2.2 mV/°C signal, which cancels the thermoelectric 
error signals generated at the thermocouple's input 
terminal strip. You should place the transistor as close 
as possible to the terminal block; to achieve optimum 
performance, you need to effect thermal contact be- 
tween the devices. 

Fbr temperatures below 200°C (with a common type 
K thermocouple), the circuit in Fig 1 provides a 10 
mV/°C output. The circuit includes no linearization, so 
this output factor will change at higher temperatures — 
12 mV/°C (for type K thermocouples) at 1000°C. Al- 
though the circuit component values shown are for J- 
and K-type thermocouples only, the circuit can accom- 
modate other types of thermocouples. To provide gain 
and cold-junction compensation, you simply have to 
calculate new values for Ri, R2, and R4. 

Platinum resiBtance thermometers (PRTs) present 
another classical transducer-conditioning problem. By 
using platinum wire as the sensing element in a PRT, 



you can achieve very high accuracy and repeatability 
over a wide operating-temperature range. As a result, 
PRTs are well suited for high-accuracy thermometry 
applications. Like thermocouples, PRTs have a migor 
drawback, however: They provide a low-level output 
signal. Although the change in resistance over temper- 
ature of platinum wire is very predictable, it's also very 
small (0.3815%/°C), so you'll require large precise gain 
and long-term sUdbitbgr in order to devel(^ a useful 
output. 

The PRT amplifier circuit in Fig 2 uses a 3-terminal 
sensing scheme to eliminate errors from lead resis- 
tance, SO you can remotely locate the sensor. In addi- 
tion, the circuit design refers the sensor output to 
ground, thus minimizing noise-pickup problems. With a 
30V supply, the circuit provides a 4- to 20-mA current 
output with compliance from 3 to 28V. 

The REF-01 lOV reference combines with ICi to 
generate a precise constant current that biases the I^T 



5-25 



EDN Hay 29, 1966 



and also creates fixed voltages for sensor-ofEBet correc- 
tion and wire-reastance error cancellation. Lead-re- 
sistance effects (RWi, RW2, and RW3) are subtracted 
from the real temperature signal at the input of the 

PRT amplifier, IC2. The circuit in Fig 2 works on the 
principle that the resistance of all three leads will be 
identical. The lead-resistance effects related to RW2 are 
insignificant, however, because only op-amp bias cur- 



rent passes throu^ RW2. 

The temperature and correction rignals sum at IC2 as 
follows: The voltages on the PRT and its ground wire 
(RW3) are amplified by 1, the voltage drop on the PRT's 

positive lead (RWi) is amplified by -V4, and the drop 
across R, (an offset resistor) and RWi is amplified by 
-V2. As a result, the RW terms cancel, and the net 
output appearing across R3 is the PRT voltage minus % 



(QAIN) 
200k 



OUT 
GND 



Us 
<3 92 




REF-01 
10V 



4- TO 20mA OUTPUT 
FOHOTO 190^ 





R6 

1M 



0.1 nF 
-)\- 



Rs 




• PRTw PLATINUM SENSOR 
^YSI PT-138AP WITH 
3-WIRE TERMINATION 




1. METAL-FILM OR WIREWOUND RESISTORS WTTH LOW TEMPERATURE 
COEFFICIENTS ARE RECOMMENOEO. 

2. Ri, Ri ARE 2S PIWC TYPES. 

3. RW,, fWs, AND RWj REPRESENT PRT LEAD RESISTANCE. 



Fig 2 — By referring the sensor to circuit ground, this platiniim-resistance-thermomeier amplifier circuit minimizes noise-pickup problems. 
Because the circuif iitet a S-terminal sensing scheme to eliminate errors from lead resistance, you can remotely locate the sensor. 

EDN May 29, 1986 



amplication. 



the offset on R4. IC2 drives a Darlington transistor (Qi); 
R, senses Q/s output currefit tp p^wlde a feedlMck 
signal for IC2. 

To calibrate the circuit, you must adjust R2 and R,. R2 
trims the sensor's offset, and Ri handles circuit gain 
adjustments. If you adjust the offset first, the gain trim 
will not interact, so you can probably make each 
adjustment in only one pass. 

Better precision for instrumentation amps 

Precision amplifiers are usually a necessity in appli- 
cations involving bridge measurements (strain gauges, 
load cells, and some types of pressure transducers), 
because these applications require high accuracy and 
low signal levels. In most cases, instrumentation ampli- 
fiers can easily handle the 30-mV differential output 
signals from these bridge-type devices. These instru- 
mentation amplifiers have finite, controllable, differen- 
tial gain that's fixed or that can be set with one or two 
resistors. 

The high-performance instrumentation-amplifier cir- 
cuit in Fig 3 amplifies a small differential signal from a 



strain-gauge bridge into a large ground-referenced 
signal. Such a configuration is typical of off-the-shelf 
instrumentation ampliiiers; however, when you use 
MAX421 amplifiers in the front end, the offset and drift 
performance you obtain is better by an order of magni- 
tude than that available in off-the-shelf amplifiers. 

As with all instrumentation amplifiers employing this 
3-stage configuration, the fi:ont-end and output amplifi- 
ers will both affect overall drift performance. The 
output amplifier's effect on drift (referred to the input) 
is divided by the front-end gain, which is approximately 
30 (the overall gain is 300). The MAXOPOT's Vos specifi- 
cations (75 |xV and 1.3 |jiV/°C) are divided and added to 
two times the MAX421 error, yielding a maximum 
input-referred error of 12.5 jjlV and 0.15 jji,V/°C. Even 
when front-end gain is set at 30, the MAXOP07 contrib- 
utes more to offset error than do the MAX421s. 

The chopping circuits of the front-end op amps are 
locked together via their clock-control pins. ICi's INT/ 
EXT clock pin is unconnected, so it operates from its 
internal 400-Hz clock in normal fashion. The CLK IN 
pin of ICi functions as an output. Since IC:?'s INT/EXT 



Addressing thermal problems 

ated in such situations can range 

from one-tenth to tens of micro- 
volts per degree C. In general. 



In an instrumentation amplifier 
circuit — as in any design dealing 
with low-level signals — the quest 
for microvolt-offset and nanovolt- 
drift performance involves more 
than just selecting a high-preci- 
sion amplifier. When you're try- 
ing to amplify low-level signals, 
any number of outside error 
sources can complicate your 
task. These errors are trouble- 
some because it's very hard to 
distinguish them from real sig- 
nals or amplifier error. 

Thermoelectric voltages pro- 
vide a perfect example of such 
error sources. The same phe- 
nomenon responsible for thermo- 
couple operation can generate 
significant errors at pin-to-sock- 
et, socket-to-board, and board- 
to-edge-connector interfaces, and 
even at soldered connections. 
The level of the volU^ gener- 



designers deal with this problem 
by minimizing the use of sockets 
and connectors in low-level cir- 
cuitry, or by using components 
designed for low thermal EMF. 

Although temperature obvi- 
ously contributes to thermoelec- 
tric errors, thermal gradients in 
low^Ievel circuitry cause more 
problems than does the mere 
presence of heat. Gradients can, 
for example, cause the normally 
balanced input connections of a 
sensitive amplifier to be at dif- 
ferent temperatures. These con- 
nections then generate different 
values of thermoelectric voltages 
that the amphfier's inputs can no 
longer completely cancel; the 
final output is an offeet error. 
The most effective way to com- 



bat thermal gradients is to keep 
power dissipation low and mini- 
mize air currents in and around 
low-level circuitry and connec- 
tions. 

You can also solve thermoelec- 
tric voltage problems by design- 
ing thermal symmetry into the 
circuit layout. This solution can 
involve adding dumnvy resistors 
and connections so that the ther- 
mal mass — as well as the num- 
ber of thermoelectric error 
sources in an input pair — will 
cancel. In addition, you might 
have to run input traces close to 
each other and keep their dimen- 
sions identical. You might also 
find it helpful to develop some 
thermal filtering by minimizing 
enclosure size, or by insulating 
sensitive su-eas. 



mm 



EDN May 29, 1986 



0,1 0,1 




1 MATCHING RULES R. = R3AND ° ' °^ ''^ 
R6R7=R»R5 MATCHING DETERMINES CMRR. 

2. METAL-FILM OR WIREWOUND RESISTORS ARE RECOMMENDED. 

3. lei's INTEnNAL CLOCK IS SLAVED TO ICi VIA CLK IN PINS 

4. ALL AMPUFIERS OPERATE FROM s15V SUPPLIES. 

5. Ri IS A SELECTED VALUE 



Fig 3 — To eliminate the low-level errors caiued by clock interac- 
tion, this ittstninientatioH-amptifier circuit locks the chopping cir- 
cuits of the two frnnt-enc! op amps together. 



CLK pin is connected to the negative supply, its clock is 
disabled. IC/s CLK IN terminal drives IC2. By syn- 
chronizing the input amphfiers in this manner, you 
ehminate low-level errors caused by clock interaction. 

Gain-setting resistor matching limits the amount of 
common-mode rejection that you can realize. For proto- 
type or test purposes, you can generally achieve 0. 1 to 
0.01% matching when you use selected 1% resistors. 
For more precise matching, you'll have to use resistor 
arrays or resistors that have low temperature coeffi- 
cients and tighter tolerances. Once you've satisfied your 
rejection needs, you can adjust Rj to change overall 
circuit gain without affecting common-mode-rejection 
performance. 

Amplifying high-level signals 

If you're designing circuitrj' to handle high-current 
measurements, you'll typically need to use sense resis- 
tors, so you'll have to contend with increased power- 
supply source impedance, and possibly even high power 
dissipation. Because it uses a low-offset amplifier in a 
high-current application, the circuit in Fig 4 eliminates 
these concerns. 




CIRCUIT LOAD 



— POVKER-SUPPLY GROUND 



O INSTRUMENT GROUND 



1. Hi IS APPROXIMATELY 3 CM OF #20 SOLID COPPER WIRE 

YOU DETERMINE SHUNT CONTACT POINT AT CALIBRATION TIME. TO 
AVOID TEMPERATURE-RELATED RESISTANCE CHANGES. DO NOT SOLDER 
SHUNT CONTACT CONNECTION. 

2. USE METAL-FILM DEVICES FOn AU- RESISTORS EXCEPT Rl. 



Fig 4 — Kwi can moAre aense measurements without disturbing the operating load circuitry in this current-sense amplifier circuit because of 
the low offset specificatimis of the MAXi'20 op amp. 



EDN May 29, 1986 



Although temperature obviously contributes 

to thermoelectric en-ors, thermal £fradients 
can cause more problems than can the mere 
presence of heat. 



The MAX420 is suitable for this circuit for two 
reasons: First, because of the MAX420's low offset- 
voltage apecification, you can use a low-value sense 
resistor (O.OOin in Fig 4). The current measurement 
will, therefore, have no adverse effects on the operat- 
ing load circuitry. Second, the MAX420 has a common- 
mode input range that includes the negative supply, 
which is circuit ground in this case. When the input 
range includes ground, the op amp can read the cur- 
rent-sense voltage across Ri without the need for level 
shifting. Further, the MAX420 allows the circuit to 
operate from supply voltages of 5 to SSV. 

In Fig 4, the sense resistor is actually a short piece of 
solid copper wire with a movable tap. To calibrate the 
circuit, you apply a known full-scale current and use the 
tap as a coarse trim to establish the proper output 
voltage. You then adjust to set amplifier gain and 
develop the precise output-voltage level. If you solder 
the tap on Ri, be sure to wait until the connection cools 
completely before you make the fine trim; this way, 
you'll avoid introducing errors caused by any change in 
wire resistance at high temperatures. 

The circuit in Fig 4 requires no offset a4justments. 
With the values shown, the circuit delivers IV per amp 



of supply current. You can, however, change the sense- 
resistor value or the amplifier gain to develop other 
output ranges. With a lOA supply current, the load will 
experience a shift in ground potential of only 10 mV, 
and the sense resistor will dissipate only 0. IW. 

You don't need to limit monolithic chopper amplifiers 
to applications involving low-level signal amplification. 
Because devices like the MAX420 perform precise 
amphfication, you can use them not only in the primary 
signal path, but also to stabilize other circuitry. In 
effect, this approach lets you use CMOS op amps to 
improve the dc performance of wide-bandwidth or 
high-power circuitry. 

The high-speed 12-bit power D/A converter shown in 
Fig 5a provides a good example of such an application. 
This circuit uses an LHOlOl power op amp (30G-kHz 
power bandwidth and 2A drive capability) as an output 
stage. The LHOlOl has a 15-mV offset-voltage specifi- 
cation, so it can't accommodate 12-bit converter resolu- 
tion by itself. The MAX421 overcomes the problem by 
monitoring the LHOlOl's invertmg input and driving 
the noninverting input so that the summing junction is 
at OV (to within 5 \tN, the 421's error spec). The result 
is a high-speed, no-drift DAC circuit. 

The MAX421 can use the same power supplies as do 
the LHOlOl and AD565. The voltage divider at the 
MAX42rs output attenuates the LHOlOl's correction 
signal to avoid any overdrive problems. Addition of the 
offset correction has no noticeable effect on the circuit's 
dynamic performance. Fig 5b shows step responses 
obtained with and without the correction circuitry in 
operation. The stabilized and unstabilized waveforms 
exhibit no perceptible sieving or settling-time differ- 
ences as a result. 

Maximize voltage calibrator performance 

To design a voltage calibrator that can generate a to 
lO.OOOOV output with 100-|j,V resolution (Fig 6), you 
must use an op amp with very good offset, drift, and 
common-mode rejection specs. Although the circuit is 
designed for reliable absolute-reference stability, it has 
a ratiometric capability: Both fixed and variable refer- 
ences, based on the same source, are available simulta- 
neously. Such a feature is especially useful in applica- 
tions involving hnearity checks of digital voltmeters or 
A/D converters. In such cases, relative rather than 
absolute results have the most significance. Very few 
off-the-shelf calibrators, if any, provide this dual-refer- 
ence feature, so if you want such a feature you must 
build your own calibrator. 



MAX420 amplifiers 

MAX420 Series amplifiers offer very low zero- 
offset and zero-offset-drift specifications (5 nV 
and 0.05 n.V/°C, respectively). The parts can op- 
erate over a 5V (or ±2.5V) to 33V (or ± 16.5V) 
supply- voltage range. In addition, input bias cur- 
rent for the op amps specs at only 30 pA. 

The amphfiers provide low-power operation at 
any supply voltage, and they offer FET-type bias 
currents (30 pA) for high-impedance measure- 
ments. The series also includes two devices 
(MAX422 and MAX423) that draw only 25% of 
the supply current that the standard parts draw, 
but that don't sacrifice dc performance. The two 
parts do, however, exhibit some decrease in 
bandwidth and output drive capability. 

The 8-pin versions of the family are compatible 
with standard op-amp footprints with respect to 
inputs, outputs, and supply lines. To enable the 
amplifiers, you simply connect two external ca- 
pacitors to the pins that conventional amplifiers 
normally use for o&et trimming. 



5-28 



EDN 29. 1986 





NOTE: 

VERTICAL SCALE IS 5V/DIV: 
HORIZONTAL SCALE IS 2 (iSEC/DIV. 
CORRECTION LOOP IS ON FOR TRACE A; 
CORRECTION LOOP IS OFF FOR TRACE B 




(b) 



Fig S — Able to satisfy imie-banduiUth or Ugh-power requiremenU, this DIA converter circuit ( a) employs the MAXi21 for offset correction. 
As the scope photo shows (b), the correction scheme has no noticeable effect on the circuit's dynamic performance. 



EDN May. 29, 1986 



5-30 



Monolithic choppers aren't Umited to low- 
level signal-amplification tasks; they can 
also provide dc stabilization firr other cir- 
cuitry. 




Fig S — Because it prooidet a ratiomelric measurement capability, this voltage-calibrator cimiit is useful for ckecking the linearity of 

liigital mitmeters or AID converters, turn talks for uihicli relative remits are tnore sign^Uxmt than aJbsolvU results. 



1S6 



EDN May 28. 1986 



Fig 6's circuit uses an AD2710 voltage reference, 
which the manufacturer can trim to within 1 mV. If 
you're going to use the circuit for purely ratiometric 
measurement, a 1-mV (or even larger) error, and some 
degree of drift, will cause few problems. For absolute 
calibration applications, however, you'll require an ac- 
curate, low-drift reference. You can adjust the 2710 for 
a tighter tolerance by using a 10-kfl multitum trimmer, 
as shown in Fig 6. 

IC|, an MAX420 connected as a precision unity-gain 
inverter, provides a negative version of the reference 
voltage that's adjusted with trimmer Ru. Special reed 
relays, designed for minimal thermal EMF errors, 
select either the positive or the negative reference to 
drive the fixed and variable outputs. 

It's not a good idea to use a conventional switch to 
perform the polarity-select function, because conven- 
tional switch contacts generate small thermoelectric 
voltages. These voltages can introduce significant er- 
rors when the output resolution is as low as 100 
fiV/step, as it is in Fig 6. By using four relays, you can 
select the polarity of the fixed and variable outputs 
independently. 

A Kelvin-Varley voltage divider (Rs), with five dec- 
ades of adjustment range, divides the fixed reference, 
developing output increments as small as 100 \xV with 
20-ppm linearity. The fixed and variable output buffers 
(IC2 through IC ,) are composites of MAX420 op amps 
and LHOlOl buffei-s. This combination provides reason- 
ably good output current drive, and it has less than 10 
(J.V of untrimmed error from of&et, common-mode 
rejection, and other sourees. BMI 



Author's biognyihy 

Leonard Sherman is a senior member 
of the technical applications staff at 

Maxim Integrated Products (Sunny- 
vale, CA). In this position, he gets in- 
I'olved in product planning, generates 
applicationn literature, and prorides 
CKstonter support. Len has a BSEE 
degree from Massachusetts Institute of 
Technology and has been granted one 
patent. In his spare time, he collects 
old hi-fi equipment, rates pickles, 
and watches other people repair 
automobiles. 




EDN May 29, 1986 



157 



DESIGN APPLICATIONS 



Multiplexer-amp combo tomes 
losses In wideband circuits 

Greg Schatler 

Morim btfegioledftiocluch. 510N. RmI^ Sunnyvale. CA 94086: (408) 737-7600. 



Teleconferencing cameras, flash converters, video 
crosspoint switches, and attenuators can make 
good use of a monoUthic video multiplexer chip 
with zero insertion loss, low input capacity, and 75- 
ft line-driving capability. But such a chip — a multi- 
plexer driving an op amp near unity closed-loop 
gain — did not exist until quite recently. 

The problem is that putting the multiplexer and 
op amp on the same chip presented some difficult 
trade-offs: a CMOS multiplexer is best for switch- 
ing with minimal power 



By making a slow 
CMOS op amp simu- 
late a much faster bi- 
polar one, a multi- 
plexer-amplifier chip 
drives TV-camera 
svrttching chains. 



consumption, and a bi- 
polar op amp is best for 
maximum gain-band- 
width product. So an 
all-bipolar chip with di- 
ode bridge multiplexer 
switches, for example, 
would need a lot of pow- 
er, but an all-CMOS 
chip of conventional de- 
sign would be too slow. 
The conventional solution — relying on two sepa- 
rate chips, say a 200-MHz CMOS multiplexer and 
a 100 to 300 MHz bipolar op amp — is both difficult 
and not very cost-effective. It is difficult to stabilize 
a very wideband op amp near unity closed-loop 
gain, and it is wasteful of bandpass. 

Similarly, wideband multiplexers are all de- 
signed with low resistance (R), typically 50 ft, to di- 
rectly drive low impedance (75-0) cables without 
an amplifier. This low R means high channel capac- 
itance (C), as much as 50 pF, which typically might 
limit the bandpass to 50 to 100 MHz because of in- 
put RC roUoff. Opting for a multiplexer with high- 
er R and lower C — assuming one was available — 
would not be of much help. With the multiplexer 
and op amp only 0.2S in. apart, 2 to 3 pF of stray 
wiring capacitance would still limit the bandpass. 

A monolithic solution to this designer's dilemma 
is Maxim's MAX455, a 50-MHz, 250 mW, ±5V, 
eight-channel multiplexer-amplifier. Other ver- 
sions have four and two channels as well as the bare 



video ampMa-, the MAX4S4, 453, and 452, re- 
spectively. While there are some TV applications in 
which a separate bipolar op amp and a special mul- 
tiplexer may be necessary, the all-CMOS device 
supplies low input loading, easy stabilization 
against oscillation, and general cost -effectiveness. 

The MAX455 design is far from conventional, 
since there is no way to get enough op amp band- 
width from CMOS MOSFETs with a S-fxm line 
width. The trick was to make a relatively low open- 
loop gain amphfier look like a multistage op amp 
when driving cable impedance and yet look like a 
single stage gain to prevent excessive phase shift 
and oscillation. This trick diminates the need for 
phase compensation to prevent oscillation at low 
closed-loop gain. Without the need for compensa- 
tion, the bandpass of the device is improved by a 
factor of2 to lOormore. However, voltage gain will 



|- 18 - 




Frequency (MHz) 



1. Both the open loop gain and the gain- 
bandpass Increase with load, which becomes 
apparent when the MAX4S5, configured as an 
Instrumentation amplifier with a 20-dB closed 
loop gain, drives a 1- kO load. The gain-band- 
pass product is 150 MHz. 



5-33 



BMMMie.Mlttn • Septa>nt!ft3, 1987 



omON AiNHJSATIONS ■ CMOS multiplexer-op amp 



be proportional to load resistance. 

So instead of three amplifier stages (typic^ ^ an op 
amp) there are just two: a 38 V/V differential input stage 
driviiog a push-puU tnuncoddaefitnce imtgat stage with 




15 +6 +25 +45 +66 +88 +105+125 



Free-air temperature (*C) 



2. The gain of MOSFET transistors, however, drops 
with increasing temperature. A MAX4S5 chip with a 
closed-loop gain of 6 dB and driving a 150-n load 
would lose 1% of Its gain when operating at -t-SS'C 
liwlead of +25^. 



4^ 



In, 

Multiplexer 
Ins 



In, 



In, 



Ag Ai Ao 



MAX455 
multiplexer 
op amp 



Video 
amplifier 



6 

-5 V 



0,1 uf 

urn 



7pF 



6 

+5V 



3. This video amplifier-attenuator has 2S-MHz typical bandpass and 70 dB off- 
channel Isolation In the TV tiand. It provides seven steps from -3 to -1-3 dB in 
1-dB Increments, plus a no-output position. The resistors R1 and R2 set a gain 
of 9 dB, 6 of which cancel out the 6-dB loss in driving the back-termlrKited 
cable. C3 reduces pealdng caused by ttie amplifier input capacity. 



the help of current mirrors for biasing. The output stage 
has gain proportional to output R and equal to unity with 
a 75-n load. The low gain is not a drawback, since the am- 
pUfier usually runs at a closed-loop gain of or 6 db; its dc 
transfer function is quite linear, and it is always driving a 
well-defined resistive load. The amplifier also behaves 
like a true op amp in terms of low drift, high common 
mode rejection and high power supply rejection. Typical 
MAX455 specs are offset voltage of 1 or 2 mV; offset in- 
put drift of 15 to 20 fiV/'C; CMRR of 80 dB; power sup- 
ply rejection of 66 dB at low frequoicies and 20 dB at 4 
MHz. 

The amplifier is unity-gain stable when driving a 75-fl 
load (+ 1 V maximum). With a gain of +6 dB, it is stable 
with 150 n (±2 V max), and at a gain of +20 dB, it is 
stable at l-kO load. The gain-bandwidth increases with 
load resistance (Fig. 1 ). The gain also drops with increas- 
ing temperature (Fig. 2). 

Unlike many fast video ampUfiers, it is simple to get 
unity-gain stability even on a breadboard without using a 
ground plane. Ground planes are still recommended, 
since anyone who has ever worked with high-speed am- 
plifiers knows the frustration of trying to stabilize them. 
Just bypass the MAX455 chip's supplies with 0.1 |LiF ce- 
ramic capacitors to ground and keep all leads short. 

OPTIMIZING THE MULTIPLEXER 

The chip is also much more stable than a bipolar ampli- 
fier when driving a high-capacity load typical of many 
flash comverters. WithlOiads greater than 100 pF, howev- 
er, a series R should be inserted 
serially at the output such that 
theRC product is 10ns or more 
at unity gain. 

The MAX455 loads the vid- 
eo cable far less than would a 
separate multiplexer-op amp 
combination since the multi- 
plexer-out/amplifier is an in- 
ternal node deliberately not 
brought out to a bonding path 
to keep parasitics to a mini- 
mum. This allows smaller 
switches, compared with those 
in a separate multiplexer, 
which keeps the channel input 
capacitance down to about 7 pF 
on and 3.5 pF off. The multi- 
plexer switch areas were also 
held to a near-circular shape to 
minimize the ratio of on-resis- 
tance to capacitance. 

The multiplexer-out/ampli- 
fier-in RC rolloff was held to 80 
MHz — about equal to the uni- 



RG-59/V 



75-n I 
cable I 75 



BadrenlcDaMgn • Sepitenil9^3.19S7 



5-34 



ty-gain amplifier bandpass — so the combination gives a 
typical 50-Mhz bandpass for unity gain driving 75 n. In- 
put voltage protection was not sacrificed to get the low in- 
put capacitance. The inputs have electrostatic discharge 
protection to greater than +2000 V, and a fault current 
of 100 mA or more is needed to cause SCR latch-up. 

The MAX455 multiplexer section uses "T" switches to 
attain high off isolation and interchannel isolation, typi- 
cally 70 dB at 4 MHz. This high isolation can only be pre- 
served with careful external wiring. A groundplane 
should be used, and all unused pins, which provide inter- 
nal interchannel shielding, should be connected to it. 
Only channels two and three are physically close and a 
ground trace should ther^are be run between them to cut 
external crosstalk. 

IV SPECS 

The multiplexer-amplfier can be used for both visual 
(TV) and instrument (flash converter) switching. For pic- 
ture work, like switching teleconferencing or broadcast 
studio cameras, what's critical is differential gain and 
phase shift. This is measured as change in a small (0.28 V, 
3.S8 MHz) signal on a large, slowly viuying, 0.7-V ramp. 
Change in gain means change in contrast over the picture, 
and change in phase corresponds to a change in color. 
Ideal specifications would be a phase shift of 0. 1° and a 
gain change of 0. 1 % . No color or contrast changes would 
then be noticeable even in a long chain of multiplexers for 
switching cameras, attenuators, mixers, and so on. 

The MAX452 video amplifier (the MAX455 without 
multiplexer) has a phase error of twice this, or 0.2°, while 
the MUX455 with eight-channel multiplexer has a phase 
error of about 1.2°. (The present design optimized band- 
pass somewhat at the expense of phase linearity.) The 



gain error is about 0.5% with or without the multiplexer. 
Both errors are tolerable though when only a few multi- 
plexer/amplifiers are used in series, such as for small stu- 
dios, teleconferencing, and remote surveillance. To do 
better even with a bipolar op amp of several hundred 
megahertz gain-bandpass may require special multiplex- 
ers such as reed relays, which are being phased out, or p-i- 
n diodes, which take a lot of power. 

A typical link in the picture chain might be an amplifi- 
er-attenuator for setting the video level for the best signal- 
to-noise ratio. This could be done in inconvenient binary 
increments with a digital'to-analog converter, but it is 
easily accomplished in one decibel step changes with a 
single MAX455 multiplexer op amp (Fig. 3). 

If more than eight multiplexer channels are needed, 
MAX455s can easily be cascaded with no special precau- 
tions other than adding 150 fl to ground at the first stage 
output to insure stability (Fig. 4). There is a roll off in the 
second stage. R9 is 1.1 kCl to compensate for the 1.5% 
gain loss (rf'ICl duoagji WS.O 

Greg Schaffer is a senior member of the technical staff at 
MAXIM. He has a BSEE from the Massachusetts Insti- 
tute of Technology, an MSEEfrom the University of Cali- 
fornia, Berkeley, and an MS in computer science from the 
University of Arizona. One ofhis two patents, a switching 
amplifier fornoise reduction, resulted in a CMOS a-d con- 
verter with a resolution oflfi Vper count 




R1 
150 



CH 
CHO 



In, 



m 



ICS 



(LSB) X, X. X. 



MAX455 
multiplexer 
op amp 



1> 



O O 6 -Sf 
(MSB) X, X, Xj 



R11 

75 



R9 I f ^ 
t1.1kj= 



R10 



; 1.0k 



RG-S9/U 



T 



R12 
75 



4. A 64-channel multiplexer can be built by using eight MAX455S to select 8 of the 64 chonnels and a final 
MAX455 chip to select eoch multiplexer. The first stage is operated at unity gain and 150-n load, which sup- 
plies some 40 MHz peaking to compensate for the high-frequency rollotf of the second stage. The -3 dB tre- 
qumey Is typically 35 MHi. 



Elactronlc Design • Septembers, 19S7 



5-35 



High-speed buffers 
help solve problems 
in circuit applications 



Although highspeed, unity-£ain buffer 
amplifiers have been opotUtble for sepenU 
years, recent versions serve a wider variety 
of applications. The high speed of today's 
devices makes ^em attractipe for use in 
S/H circmfs, attipe fit^t md video 
switches. 

Bob Underwood, Maxim Integrated Products 

Modern high-speed buffer amphfiers solve a variety of 
circuit problems, but the design tradeoffs that increase 
their speed can also degrade their dc performance. 
Fortunately, these effects are predictable and, in most 
applications, correctable. 

Although most of the dmiits that follow will operate 
properly if you substitute an equivalent device, you 
must first check each device's specifications — particu- 
larly its input resistance, output-drive capability, and 
supply-voltage requirement. In some cases, the choice 
of a particular device can affect your circuit's perfor- 
mance. In other eases, you may need to adjust circuit 
values to optimize the buffer's performance. When your 
designs call for buffer amplifiers, consider one of the 
more popular devices, such as the LH0033, LH0063, 
and BB3553 (see Table 1). Several pin-compatible and 
improved versions of the devices are now also available. 

Because a buffer amplifier's input provides a high- 
impedance load, designers often use such amplifiers in 
transducer or low-signal-level applications. However, 



the buffer amplifier isn't a lightweight contender. Its 
output can drive a moderate to heavy load. If a buffer 
amplifier's input is dc coupled to a transducer or other 
signal source, then the buffer's input impedance is 
simply its resistance and capacitance as specified in its 
data sheet. Note, though, that the relationship between 
input bias current and input voltage is nonlinear in 
many buffers. So, you must make certain that the 
input-resistance values for a particular buffer amplifier 
are specified over the input-voltage ranges you'll use 
for it. 

Several common situations require ac coupling at the 



TYPE 



TABLE 1— REPRESENTATIVE 
BUFFER AMPLIFIERS 

MANUFMTURERS 



BJ003 



HOS100 



molo 



MAX460 



BURn«ROWN, MAXIM 



ELANTEC 



HARRIS 



ANALOG DEVICES 



ELANTEC, NATIONAL 



ANALOG DEVICES. ELANTEC. MAXIM, NATI0^4A».,, 



MAXIM. NATIONAL 



LINEAR TECHNOLOGY CORP 



MAXIM 



EDN Januaiy 21, 1988 



Buffer amplifiers provide high input imped- 
ance and drtpe a moderate to heavy output 
load. 



buffer's input: Such coupling is necessary when you 
operate the buffer from a single power supply, when 
you remove a dc level from the signal, and when you use 
transducers that don't furnish a de signal. In these 
applications, you must connect a resistor between a dc 
supply and the buffer's input to supply the buffer's bias 
current. The resistor's value must be low enough to 
supply the buffer's input current without causing too 
much voltage drop. However, the resistor's value must 
also be high enough so that it doesn't load the transduc- 
er excessively. In either event, the dc-bias resistor 
usually dominates the buffer circuit's input resistance. 
Remember that when a transducer supplies a capacitive 
output, the buffer amplifier's input resistance limits the 
low-frequency response of the circuit. 

A typical bootstrap circuit (Fig 1) provides an input 
impedance that exceeds the impedance of any of the 
circuit components. Although the MAX460 buffer oper- 
ates from a single supply in this circuit, you can 
reconfigure the circuit to operate with conventional 
split power suppUes. During operation, an ac signal 
passes through the input capacitor, appears at the input 
to the buffer, and is available at the buffer's output at 
nearly unity gain. The output signal is capacitively 
coupled back to the low end of the input resistor 
network, which results in an effective multiplication of 
the resistive value. The circuit's total input capacitance 
arises from several sources; the intrinsic buffer-input 
capacitance, stray capacitances within the circuit lay- 
out, and the dc bias resistor's capacitance. You can 
reduce all of these capacitances by judiciously using 
shields and guards. 

The circuit of Fig 1 was tested ndule op^aiing from a 




Fig I — Thi* bmie buffer cinuit employs booMrapping techniques 
that provide an uLtmhigh-im-pedance input for a trunwituer signal. 
The MAXieO imffer amplifier operates from a single ponoer supply, 
but you can reccmfigure the circuit to operate from a dual supply. 



source resistance of 1 Mfl in series with a 10-pF 
capacitor. Under these conditions, the measured low- 
frequency -3-dB point was 3.3 Hz, and the low-fre- 
quency input circuit's time constant was 48 msec. These 
values are equivalent to those you would measure for a 
4800- Mft shunt-input resistor and a 10-pF series capaci- 
tor. The high-frequency input time constant was 0.7 
M-sec and had a -3-dB point of 227 kHz, which equates 
to an input capacitance of 0.7 pF when you use the 
l-MH series resistor. An input capacitance this small 
might be difficult to reproduce because it depends 
greatly on the configuration of the driven guards 
connected to the output. Also, the buffer amplifier's 
case was connected to the output, and the test circuit 
had no special mechanical support for the input node. 
However, it should be possible to obtain a 1- or 2-pF 
input capacitance by connecting guards to the output 
and by supplying Teflon standoffs for mechanical sup- 
port. 

Buffer amphfiers can also serve in sample-and-hold 
(S/H) amplifier applications. In most such circuits, you 
need a buffer ampUfier so that the output load does not 
dischai^e the hold capacitor (Fig 2). You can consider 
almost any of the available buffer amplifiers for this 
application, but in terms of low input cwcrent, some are 
better than others. For example, the MAX460 was 
designed for this type of appUcation; its input current is 
low and is virtually independent of the input voltage. 

In an S/H application, the switch's characteristics are 
critical. Ideally, the switch should have no offset volt- 
age, low or zero on-resistance, and low or zero leakage, 
both across its contacts and from its output contact to 
its control terminal. Any capacitance between the 
switch's control terminal and its output couples a 
charge from the control input to the charge-storage 
capacitor. As a result, switching firom the sample mode 
to the hold mode adds an error voltage to the analog 
signal being held by the circuit. It's sometimes possible 
to calibrate an S/H circuit to account for such a constant 



SIGNAL INPUT O— 


-o — 6 — 










^— O OUTPUT 

Buffer 

amplifier 



Fig 2 — This basic sample-and-hold circuit charges a capacitor by 
passing an analog signal through a switch. Opening the switch holds 
the charge on the capacitor. The buffer amplifier's high-impedance 
input prevents the output load from discharging the capacitor. 



&37 



EON January 21, 1988 



The bootstrap technique creates am input 
impedance value that exceeds l^e imp&L- 
ance of the mdmdml circuit contponetas. 



Beeause the level-translator circuit is inherently non- 
saturating, the transistor's storage time is not a critical 
consideration. In fact, you can use high Ft RF transis- 
tors for all four devices. The collector loads of Qs and 
are returned to the analog input voltage (buffered by 
ICi), which keeps the analog and digital circuits com- 
pletely balanced. Note that the circuit also provides a 
set of dumi^jr switches. The circuit's balanced nature is 
the secret of its excellent hold-step performance. The 
measured charge iiqection of the circuit in breadboard 
fashion — and without any circuit adjustments — was 100 
mV into a 33-pF hold capacitor, which represents a 
0.165 pJ charge injection. A stray capacitance of 1 pF 
between the FET switch's gate and the hold capacitor 
would just about account for such a small hold step. 

The breadboarded circuit was adjusted, with a short 
piece of stiff wire, to add about 1 pF of capacitance 
between the compensating gate and the hold capacitor. 
By moving the wire, you can adjust the circuit to put 
out OV for a OV analog input. When properly adjusted, 
the circuit gave an output error of only a few millivolts 
over the S/H circuit's entire ±10V analog-input range. 
Also, replacing any of the semiconductor components 
had no effect on the hold step. In short, you don't need 
dosdy matched components for this type of S/H circuit. 

Construct; actiw filters, too 

You can also use buffer amplifiers to build filters of 
various configurations. Although lowpass filters and 
other filter types do have their uses, notch and highpass 
filters have the most practical applications. For exam- 
ple, you can use a 2-pole highpass filter to remove 
low-frequency signal components with little effect on 
signals that occur above the filter's cutoff frequency. As 
Fig 4 ^QWS, the basic filt^ circuit exhibits a damping 
&ctor <rf 1 and a cutoff fi«quen<^ of 1 kHz. The damping 



Ci 
159 pF 

— )h- 



Cj 
159 pF 

-)|- 



SOOK 



_ BUFFER 
^ AMPLIFIER 



Fig 4 — This basic 'Z-pole, highpass filter requires onhj a buffer 
amplifier and a few passive compotieyds. This circuit has a cutoff 
frequency of I kHz and a damping factor of one. The damping fo/cUrr 
is set by the ratio of R, to R.- 



factor is controlled by the ratio of Ri to R:-. You can scale 
the filter's frequency by changing the capacitor values, 
but both values must be equal. 

Often referred to as a bridged-tee notch filter, the 
circuit shown in Fig 5 consists of a series resistance and 
a shunt capacitance, bridged by a series-capacitance 
and a shunt-resistance section. In this filter circuit, dc 
levels pass throi^h tlie series resistors, while at fre- 
quencies well above the notch the relators have no 
effect. Instead, the high-frequency signals pass 
through the series capacitors and go on through the 
buffer to the output. Only the accuracy of the compo- 
nents, the loading by the output buffer amplifier, and 
any stray capacitance incurred in the filter's construc- 
tion Hmit the maximum signal rejection at the notch 
frequency. 

The readily available component values shown in Fig 
5 create a notch filter centered at 60 Hz. If you use 
1%-tolerance resistors and 2.5%-tolerance capacitors, 
adjust the notch by traiin^g Rs for a null at 60 Hz. 
When properly acljusted, the notch is deeper than —60 
dB at 60 Hz, and the notch width is about 2.5 Hz at 
-40 dB. 

Filters aren't the only signal-processing application 
for buffer amplifiers. You can use buffer amplifiers in 
video-signal switches, too. For example, an IH5352 
chip lets you construct a moderate-performance 2- 
input, 2-output video crosspoint switch. But because 
the IH5352 has high shunt capacitance and high series 
resistance, problems can arise when you use the chip 
directly in high-performance video circuits. Luckily, 
you can alleviate the problems by buffering the video 
switch's bqmt and output s^nals. 



INPUT 
O 



C, 

005 



1 

1.01 |J= I 



100M 



' 2»F,C(40'tl) 



Fig 5 — This bridged-tee notch titter produces a —SO dB notch at SO 
Hz. The buffer amplifier provides the necessary high inpttt imped- 
ance. 



5-38 



EDN January 21, 1988 



errer, but often the charge injection is not constant; it 
varies with input voltage, temperature, or time. Thns, 
it's best to minimize any charge-injection errors by 
minimizing the switch's parasitic capacitances. 

The SDSOOO DMOS switch IC is a good choice for S/H 
applications: When the chip's switch is closed, it has no 
offset voltage. The switch's capacitances are reasonably 
low, and it offers tolerably low on-resistance and leak- 
age current. Because the SD5000 device provides four 
independent switches, you can connect two switches in 
parallel to further lower the circuit's on-resistance. You 
can also use the two remaining switches as a dummy 
capacitor, which lets you balance any charge that might 
be injected by the active switch section. Such a tech- 
nique can result in nearly a tenfold reduction in the 
injected charge, without any need for manual circuit 
adjustments. However, if you require even better per- 
formance, you can add manually adjustable components 
to the circuit. 

The hold capacitor is the heart of all S/H circuits. As 
such, it must have a high breakdown voltage and low 
leakage current, and it should be made of a material 
that has a low dielectric absorption. Typically, polycar- 
bonate, polystyrene, and polypropylene exhibit good 
dielectric characteristics, but glass, mica, and most 
ceramics do not. 



Some S/H circuits — particularly those that employ 
low-charge-injection techniques — may require only a 
switch, a hold capacitor, and an output buffer. More 
often, however, the circuit demands an input buffer 
amplifier, too. Without an input amplifier, the signal 
source must supply the hold capacitor's charging cur- 
rent. 

Build high-speed S/H circuits 

A reahstic S/H circuit (Fig 3) contains an input buffer 
amplifier (ICi), an output buffer amplifier (IC2), and a 
DMOS FET switch. A voltage-level translator circuit 
made up of transistors Qi through Qi converts the 
ECL-compatible input signals to a voltage (referenced 
to the analog signal voltage) that drives the DMOS FET 
switches. The circuit employs Qi and Q2 to form a 
differential amplifier that accommodates the balanced 
incoming ECL signals (Q and Q). The four transistors 
are high-speed types that have a gain-bandwidth prod- 
uct (Ft) in the gigahertz range. Transi.stors Qi and Q2 
must have a breakdown-voltage rating that at least 
equals the cii'cuit's positive supply voltage plus the 
ECL common-mode' voltage of -2V. In this circuit, a 
breakdown-voltage rating of 17V is adequate. Like- 
wise, transistors Q3 and Q4 require breakdown voltages 
of at least 25V to allow for a -lOV analog input. 



ECL INPUT 
O 



O3 
2N4959i 



-0+15V 



O1 
MRF904 




Qi 
MRF904 



1.1k 240 
O -1SV 



ANALOG 
INPUT 



2N4959 



J 



— j — I SD5000 

T 



Chold 

-15V -i-IOOpF 



-H j 1^^ 1 

1 



3—Thi» hl0h-veed SIB ebratt ineludiea an inpat bvffer, a DMOS switdi , and am outpid tn^er. Higli'fnifimicy transiston Qi,Qj,Qj, and 
Q, form a level tramlator that converta the ECL mpac signal into a voltage that can drive the switch's gates. 



EDN January 21, 1968 



5-39 



In the circuit shown in Fig 6, the two video inputs 
feed through input buffer amplifiers (ICi and IC2) to 
generate low-impedance signals that drive the analog- 
switch IC. Depending upon the input signal's source, 
each buffer-amplifier input may require a termination 
resistor. The termination resistors keep the amplifiers 
from saturating if an input is unconnected or is fed with 
an ac-coupled signal. A disconnected channel, for exam- 
ple, could turn on the switches and feed a high dc 
voltage to the output buffers. Because of the buffer 
amplifiers' input capacitances, a slight impedance mis- 
match may exist at the input terminals, but it usually 
doesn't limit the circuit's performance. 

If you can accept a 6-dB loss through the switches, 
you can eliminate the output buffer amplifiers (IC3 and 
IC4). Such a loss might be tolerable, but switch-resist- 
ance values can vary considerably, which leads to an 
uncertainty about the actual signal loss. The output 
buffer amplifiers solve the loss-uncertainty problem 
and at the same time provide a low-impedance output 
that drives transmission lines either directly or through 
an accurate termination resistor. When operating from 
a ±15V power supply, the video circuit (Fig 6) handles 
a ±10y signal 

Restore dc levels 

You can also use buffer amplifiers to restore the dc 
portion of a video signal. For example, because of the 
inherent ac coupling used in baseband video circuits, 
you frequently encounter video signals that have inde- 
terminate dc sync levels. Because composite-video sig- 
nals include dc sync pulses and ac picture information, 
the brightness of the scene influences the voltage level 



INPUT OUTPUT 




74HC04 



Fig 6 — Four buffer amplifiers help overcome the iiiherenl limita- 
Hans of a video-suntch IC. The input buffers produce low-impedance 
signals Uiat drive the analog switches, while the output buffers 
eliminate gain variations that remit from unmatched switch resis- 
tances. 



EDN January 21, 1988 



of the sync pulses as the complete video signal passes 
through an ac-coupled circuit. You can use several 

methods to re-reference the signal to ground. 

The classic dc-restorer circuit (Fig 7a) passes the ac 
input signal through a capacitor (Ci) to a diode-resistor 
shunt (D,-Ri). The time constant for Ri and Ci must be 
long enough to pass the lowest frequency component of 
interest in the input waveform, yet short enough to 
recover quickly from a fast change in the input wave- 
form. However, the diode's forward-voltage drop pro- 
duces a signal that is dc-restored to —0.7V, not to 
ground. By adding a resistor and an additional diode 
(Fig 7b) you can restore the video signal's sync pulse to 



Fig 7 — liaseband video .systems frequently require restoration. The 
batfic circuit (a) couples ati input signal through a capacitor to a 
diode-resistor cmnbiiuition that restores the dc reference to -0.7V. 
Adding a resisttnr and a diode ( b) lets the circuit restore the sync pulse 
to OV. You am further refine the circuit by adding an analog switch 
and a comparator (c). 



BUFFER 
AMPLIFIED 



OUTPUT 
O 



100k 



(«) 



INPUT 'if 

<» )h 



BUPFEB 
AMPLIFIER 



OUTPUT 
O 



(b) 




5-40 



OV. The added diode (D2) produces a 0.7V output that 
should exactly cancel the forward voltage of D,. The 
added diode also cancels D,'s -2 mV/'C temperature 
coefficient. In practice, the current in D, depends on 
the input signal's characteristics, so an exact cancella- 
tion of forward-voltage drops and temperature coeffi- 
cients is difficult to achieve. You won't be able to match 
the diodes' voltages to better than several tens of 
millivolts. The circuits shoMm are suitable for positive 
signals, but th^ can process negative-going signals if 
you reverse the polarity of the diodes. 

A more sophisticated approach (Fig 7c) requires you 
to add an analog switch and a comparator to the basic 
dc-restoration circuit. In the new circuit, you bias the 
comparator a few hundred millivolts above ground so 
that the comparator recovers the composite sync infor- 
mation, rejects the video part of the signal, and turns 
on the SD210 analog switch during sync time. The 
comparator's action puts a voltage on Ci that equals the 
input signal's voltage during the previous sync pulse. In 
. effect, the circuit subtracts the stored charge firom the 
incoming waveform, which yields a OV signal during 
the sync interval. Diode Di speeds the recovery firom 
any fast change in the input signal's dc level. Without 
the diode, the comparator might force the analog switch 
to conduct during the complete video cycle or at least 
until Ri could act to bring the buffer amplifier's input 
voltage back into range. EDM 



Author's biography 

Bob Underwood is <i senior member of 
the technical staff for hybrid design at 
Maxim (Sunnyvale, CA); he has been 
with the company for four years. Prior 
to joining Maxim, he was employed by 
National SemiconducUyr. Bob has a 
BSEE and an USEE from Washington 
University in St Louis, MO, and he is 
a member of the International Society 
for Hybrid Microelectronics ( ISHM) 
and the American Radio Relay League 
(ARRL). In his spare time Hob enjoys 
classical music, photography, and am- 
ateur radio, in which he holds an Ex- 
tra-class license. 




EDM January 21, 1968 



5^t 



&4@ 



Interface (RS'232), Display 
Drivers^ Timers^ Counters 

Opto-lsolated RS-232 Interface 6-3 

RS-232 To RS-422 Converter 6-4 

Combining Two MAX232s 6-4 

MAX231 , MAX239, Update 6-5 

Protect RS-232 Circuits from Connection to 1 1 7VAC 6-6 

Timer Controls Brightness of Multiplexed LED Display 6-9 

RS-232 Transmitter Power LEDs 6-10 

Four Digit Display Decoder/Drivers 6-11 

Position Controller Using ICM721 7 6-12 

AMP-H0urN4eter 6-13 

Triplexed LCD Waveforms 6-13 

Mechanical-Shock Alarm 6-14 



6-1 



Although the RS-232 specification recommends that 
the maximum cable length should be less that 15 meters, 
much longer cable lengths are fairly common. A problem 
sometimes encountered, particularly when using long 
cables, is that ground potential differences between the 
two ends of the cable can be higher than the 2V noise 
margin built into the RS-232 specification. Another pos- 
sibility that must sometimes be considered is the poten- 
tially disastrous effects of accidental connection of the 
RS-232 inputs or outputs to high voltages such as the 
1 10/220VAC power line. Opto-isolation both isolates the 
computer or instrument from possibly harmful voltages 
and allows operation with a large voltage difference be- 
tween the grounds at each of an RS-232 link. 



The MAX635 DC-DC converter 10 provides an isolated 
power supply by regulating the output of the transformer 
primary. With a bifilar wound (1 to 1 turns ratio) trans- 
former, when the output of the primary is regulated to 5V, 
the output of the secondary will be semi-regulated to 5V. 
Line and load regulation is easily kept to ±10% if the 
primary and secondary are tightly coupled by using bifilar 
winding techniques. The data is transferred via the two 
4N26 optocouplers. 

Three new Maxim Isolated RS-232 devices: MAX250, 
MAX251, and MAX252 incorporate built in isolation for 
even fewer external compgoents. 



INPUT 




u 




7 


Vref 




u 




MAX63S 


-VOUT 


8 


Vfb 








m m> 





6ATEVWTH 
*nA OUTPUT 
SINKCAPASILIiy 




ISOUTED 
+5V 



ISOLMED 



MAX232 



OUT 



GNO 



6 15 
C4 



RS-232 
GROUND 



Figure 6'1. 



6-3 



M^SS^ To Commrtmr 



Although most terminals, computers, and printers use 
the RS-232 (CCITT V.24) standard for their serial com- 
munication port, some equipment uses the RS-422 or 
RS-485 balanced or differential standard to achieve a 
higher data rate, or to accommodate up to ±5V voltage 
difference between the ground potentials between the two 
pieces of equipment which Gommuntcate via RS-422. This 



circuit, which uses only a single +5V supply, accepts 
RS-232 inputs and converts them to RS-422 outputs. In 
the other direction, it accepts RS-422 inputs and con- 
verters them to RS-232 outputs. The lvlAX233 converts the 
+5V power supply Input to ±9V, using 4 internal 
capacitors. 



Figure 6-2. 




.Combining Two MAX232s 



Figure 6^. 




6^4 



MJkX231, MMXSSB Update 



Connecting a diode in series witli the V+ power input of 
the iVIAX231 and MAX239 allows power supply sequenc- 
ing at V+ and Vcc to be ignored. If no diode is present, 
the 1 2V V+ supply must rise to 5V before Vcc reaches 5V. 
In most systems supply sequencing is correct, and no 
diode is needed, if power is applied to both supplies at 
the same time. If this is not the case, or if sequencing is 
uncertain, the diode connection is recommended. This 
will replace the standard cireuit for these devices in all 
future literature. 

♦5V 8V TO 13,5V 



3 r tN914 




ni/CMOS 
OUTPUTS 



RS-232 
INPUTS 



TTUCMOS 
INPUTS 




Figure 6-4. 



Figure 6-5. 



6-5 



. PnMwet W^SSS^ ^mtMmHiiom ComiMffaM to i 17V AC 



When RS-232 cables are routed through terminal 
blocks, onto a factory floor, or othenwise exposed to 
possible misconnection, the computers connected to that 
RS-232 cable may be severely damaged it the RS-232 
cable is inadvertently connected to 117VAC. The at- 
tached circuit prevents damage from either momentary or 
continuous connection to 1 17VAC. Furthermore, normal 
operation is automatically restored as soon as the 
dangerous voltage is removed, unlike typical protection 
circuits which rely upon fuses. 

The two key components are transient suppressors 
(Transzorbs'"^) and positive temperature coefficient resis- 
tors (PTCs). The PTC acts like a normal resistor at low 
applied voltages, but rapidly increases in resistance when 
the I^R self heating raises its temperature to about 90°C. 
As the scope photo shows, when 117VAC is applied, the 
current rapidly falls from 2,5 Amps. The current 
decreases to 15mA in about 2 seconds. The 1.8 watt 
{15mA X 1 17V) steady state power dissipation keeps the 
PTC temperature at about 90°C, which in turn keeps the 
resistance of the PTC high and the fault current low. 

The initial 2 eimpere inrush is clipped by the 1 .5KE1 OCA 
transient suppressor which, as shown by its schematic 
symbol, is equivalent to two back-to-back zener diodes. 
The part number specified keeps the voltage applied to 
the +5V powered MAX233 RS-232 transceiver below the 
±157 maximum allowed at the transmitter output. The 
receiver is similarly protected, but a higher voltage tran- 
sient suppressor is used to clamp the input voltage to the 
MAX233 to less than ±30V while not clamping the normal 
±5V to ±15V RS-232 signals. The 86Q PTCs do not 
significantly effect either the transmitter output voltage or 
the receiver input impedance. 

The ground line is similarly protected, but a lower value 
PTC is used, since signal return currents flowing through 
the PTC in the ground lead will cause a voltage difference 
in ground potential between the two ends of the RS-232 
cable, thereby changing the apparent voltage levels at the 
RS-232 inputs. The MAX233 input receivers are specified 
with VilTVih of 0.8V and 2.4V, which are well within the 
RS-232 limits of -3V and +3V, so the system still fully 
complies with RS-232 specifications with up to 600mV of 
voltage drop across the PTC in the ground lead. Under 
normal operation the signal return current will never be 
more than 5mA per RS-232 line ( 1 5V max output V ^ 3k£l 
minimum receiver input impedance), so the drop across 
the PTC in the ground line is less than 250mV. 



CCI060,01 

Positive Tempefature Codficent ResisBor 
\ 



25 Pin 
D Connector 




ftnahnDsu 

IfS-SSS Input 



Figure 6-6. 



Component Information 



Positive Temperature Coefficient Resistors (PTC) 
CCL060.01 (sen) and CCL1 50.01 (23n) are available 
from: Midwest Components Inc. Muskegon, Ml, USA 

Transient Suppressor 1.5KE10CA 10V nominal bilateral 
clamp and 1.5KE16CA 16V nominal bilateral clamp are 
available from: General Semiconductor and General In- 
struments 




Figure 6-7. Input Current After Application of 1 10VAC to RS- 
232 Transmit or Receive Line 




Table 6-1. Circuit Definitions/Pin Assignments for RS-232/V^4 



PIN 


EIA RS-232 

ancuiT 


ccirr V.24 

CIRCUIT 


DESCRIPTION 


TYPE 


SOURCE 


1 


AA 


101 


Protective Ground 


Ground 


Ground 


2 


BA 


103 


Transmitted Data 


Data 


DTE 


3 


BB 


104 


Received Data 


Data 


DCE 


4 


CA 


105 


Request To Send 


Control 


DTE 


5 


CO 


106 


Clear To Send 


Control 


DCE 


6 


CC 


107 


Data Set Ready 


Control 


DCE 


7 


AB 


102 


Signal Ground/Return 


Ground 


Ground 


8 


CF 


109 


Received Line Signal Detector 


Control 


DCE 


g 






Reserved for Data Set 


Testing 




10 






Reserved for Data Set 


Testing 




11 






Unassigned 






12 


SCF 


122 


Sec. Received Line Signal Detector 


Control 


DCE 


13 


SCB 


121 


Secondary CTS 


Control 


DCE 


14 


SBA 


118 


Sec. Transmitted Data 


Data 


DTE 


15 


DB 


114 


Transmission Signal Element Timing (DCE) 


Timing 


DCE 


16 


SBB 


119 


Sec. Received Data 


Data 


DCE 


17 

18 


DD 


115 


Receiver Signal Element Timing (DCE) 
Unassigned 


Timing 


DCE 


19 


SCA, 


120 


Secondary RTS 


Control 


DTE 


20 


CD 


108.2 


Data Terminal Ready 


Control 


DTE 


21 


CG 


110 


Signal Quality Det. 


Control 


DCE 


22 


CE 


125 


Ring indicator 


Control 


DCE 


23 


CH/CI 


111/112 


Data Signal Rate Selector (DCE/DTE) 


Control 


DTE/DCE 


24 


DA 


113 


Transmit Signal Element Timing (DTE) 


Timing 


DTE 


25 






Unassigned 







6-7 



Table 6-2. Circuits Commonly Used for RS-232 and 
V.24 Asychronous Interfaces 



PIN 


CIRCUIT 


DESCRIPTION 


1 


Protective Ground 


Connect to Earth Ground 


2 


Transmit Data (TD) 


Data from DTE 


3 


Receive Data (RD) 


Data from DCE 


4 


Request To Send 
(BIS) 


Handstial<e from DTE 


5 


Clear To Send (GTS) 


Handsliake from DCE 


Q 


Data Set Ready (DSR) 


Handshake from DCE 


J 


Signal Ground 


Reference Point for Signals 


3 


Received Line 
Signal Detector 
(sometimes called 
Carrier Detect. DCD) 


Handstiake from DCE 


11 


Printer Busy Signal 


Handshake from Printer 


20 


Data Terminal Ready 


Handshake from DTE 


22 


Ring Indicator 


Handshake from DCE 



Table 6-3. Summary of RS-232 and V.28 Electrical Specifications 



PARAMETER 


SPEOFICATION 


COMMENTS 


Driver Output Voltage 






level 


+5Vto+15V 


With 3-7kQ load 


1 level 


-5Vto-1SV 


With 3-7kn load 


Max. output 


dt26V Max. 


No Load 


Receiver Input Thresholds (data and 
clock signals) 






level 


+3V to +25V 




1 level 


-3Vto-25V 




Receiver Thresholds 






RTS. DSR. DTR 






On level 


+3V to +25V 




Off level 


Open Circuit or 3V to -25V 


Detects Povi^er Off Condltton at Driver 


Receiver Input Resistance 


3ka to 7kfi 




Driver Output Resistance 






Power off condition 


300a Min. 


VouT < ±2V 


Driver Slew Rate 


30V/)js Max. 


3k£i < Rl < 7kQ; OpF < Cl < 2500pF 


Signalling Rate 


Up to 20k bits/sec. 




Cable Length 


50715m. Recommended 
Max. Length 


Longer cables permissable if Cload S 2500pF 



8-^ 



Tititmr Ct^ffils BrlglMnBss of Multiplexed LED Display 



By modulating the display driver's shutdown input, you 
can vary the brightness of a multiplexed LED display 
without affecting the circuit's multiplex action. This ap- 
proach is useful in panel meters and other instrument 
applications because it eliminates the need for external 
buffers or FETs and their associated power losses. A few 
passive components and an inexpensive timer (IC1) 
generate the required pulse-width-modulated signal (Fig 
6-8). 

Diode D1 lets the timer produce duty cycles below 
50%. (Without the diode, duty cycles range from 50% to 
100%.) D1's presence also separates the charge and 
discharge paths for timing capacitor C 1 , thereby enabling 
potentiometer R2 to vary the output's duty cycle without 
affecting its frequency. (Or, the microprocessor can con- 
trol the duty cycle, and hence display brightness, if you 
replace R1 with a digitally controlled potentiometer such 
as Xlcor's model X9MMEI.) 

Frequency remains constant because the sum of the 
charge and discharge times is constant: Charge time, 
proportional to the resistance in R1 and the upper portion 
of R2, corresponds to high portions of the output 
waveform. Discharge time, proportional to the resistance 
in the lower portion of R2, corresponds to low portions of 
the output waveform. The maximum duty cycle is 100%. 
R1 , however, included as a current-limiting resistor for pin 
7, limits the minimum duty cycle to 7%, 

Cl's 4.7nF value provides 5-kHz operation-well within 
the recommended range of 3 to 9 kHz. Below 2 kHz (the 
scan rate for individual digits) some digits will remain off. 
Above 9 kHz, "ghost" digits appear because the Interdigit 
blanking period is too short. 



The timer's output signal drives IC2's Shutdown input 
(pin 10). When low, the signal turns off the internal multi- 
plex-scan oscillator, digit drivers, and segment drivers. 
This action has no effect on data stored in the chip's 8-byte 
RAM, or on write operations to that memory. 

IC2 operates in one of three modes according to the 
signal level at pin 9; Driving the pin high causes the chip 
to decode its data for hexadecimal display. Letting the 
pin float enables decoding for code B display, and driving 
the pin low shuts down the chip in a low-power standby 
mode. The Fig 6-9. circuit is for liex display only. For other 
applications, you can choose one of the pin-9 drive cir- 
cuits shown below. 



THREE-SWTI 
BUFFtn 



LOW.SHUTDOWN 



HIGH.t«0fi$HUIO0WN 



HIGH-SHUTDOWN 



HIGH.SHUTDOWI 



HIGH-SHUTOOVW 



OPEN DRAIN OR 
OPEN COLLECTOR 
, OUTPUT 



Figure 6-9. Connecting one of ttiese drivers to pin 9 of thie dis- 
play driver lets you command other modes of operation that 
your application may require. 



A14.A15 ADDRESS 









G2A GiB 






1,2.3 


A,B,C 




YO 






tC3 
7413138 


V1 


mm — - 


SI 







ICl 
ICM7555 



R1 

e.SK 



m 

vm 



C1 



01 
1N9M 




THRESH OUT 



Figure 6-8. Adjusting R2 varies the output duty cycle from timer IC1, which in turn varies the LED brightness. Decoder IC3 allows 
the host microprocessor to address the display driver (ICS). 



6-9 



KS!-292 TrmnmKMtmr Pmmn LEDs 



A MAX232 RS232 transceiver chip can double as a 
bicolor light-emitting (LED) driver. It can configure a 
circuit that uses only one transmitter per bicolor LED and 
has the ability to blank the display (by turning off the LEDs) 
and supply a test-mode operation that forces a red or 
green color to appear on all the LEDs. 

Several methods of supplying the driving voltage to the 
transmitter outputs are available. Using one of the 
methods, V+ is connected directly to the +5V supply, and 
the V- terminals are connected to an external -5V supply. 
Here, the chip's internal voltage inverter and doubler 
circuits aren't used. 

An LED current-limiting resistor, Rled in this case, 
makes sure that the proper current is fed to the LEDs; the 



DUAL BICOLOR LEO DRIVER WITH 
LED BlMtONG AW LAMPIEST 
(V+) (BEQUIRB-WSUmY) 




Figure 6- 10. In this LED-Driver Circuit, the chip's V+ terminal 
connects directly to the +5V supply, and the V- terminal 
connects to an external -5V supply. In this configuration, the 
chip's intBiml vol^ige inverter and doubler circuits aren't 
tieingused. 



R/G 
test 


Lamp 
Test 


Blank 


In A 


InB 


LE D A 


LEDB 


X 


X 





X 


X 


Off 


Off 


X 













Red 


Red 


X 










1 


Red 


Green 


X 







1 





Green 


Red 


X 


1 



1 
1 




1 
X 
X 


1 

X 
X 


Green 
Green 
Red 


Green 
Green 
Red 



internal resistance of the circuit's output driver (Tx) is 
usually sufficient w^ith the 5V supply (Fig. 6-10). 

The output voltage can also be supplied to the trans- 
mitter outputs when the V+ terminal connects to the +5V 
supply, with no capacitors connected to the 5 to 10V 

voltage-doubler circuit (Fig 6-11). In this case however, 
the +10 to -10V inverter does connect to capacitors C2 
and C3. These capacitors invert the voltage signal on pin 
9 (V+). Because V+ is merely 5 V, the V voltage will be 
just -5V from the inverter circuit. Of course, the power- 
supply arrangements employed in the two circuits can be 
interchanged without any ill effects. 



Ck 


ta 








V* 


Cl- 


DOIMER 




C2+ 


,10TO-10 






VOLTAGE 




C!- 


INVERTER 


V- 




1 



Figure 6-1 1. Using this method of supplying an LED-driving 
output voltage, V+ connect to the +5-V supply with 
capacitors connected only to the voltage inverter circuit 



6-10 



J u u u u u u u 
J u u u u u u u 



SOGITLCOOISnAV 



osc 


BP 


ICM7211 




Si DSI,2 


iO-3 



Tm602 
UART 



BP 






ICM7211 


BO-3 


DS1,2 CST 



IQk 

-AMr- 



I — SeOO BAND SERIAL INPUT 

Figure 6- 12. Remote LCD Display via UART 



Four 0^it Usplay Deeodei/OHvBn 



23 POL 

2001 

19 D2 
1803 

irD4 

WB8 
15 B4 
14 B2 

13 B1 
12 05 

26STB0BE 
27 OR 

mm 



4 1/2 DIGIT LCD DISPLAY 




Figure 6- 14. LCD Display for ICL 7 135 A/0 




D1 


BUT 


02 




03 




04 






m72i2 


as 

B2 




81 
60 





28 SEGMENT DRIVERS 



~hl88lil8 



I U i_! Q o o o o o 

I UOOUUUUU 



1/2 DIGIT A1-G4 

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OSC 




L2BIN 


jut 


jtxtjut LZBOUT 


mmi STORE 




COUNT INHIBIT 




COUNT 




CARBY 






V» GND 



COUNT 
SIGNAL 
INPUT 





5 


36 




36 


29 ^ 




29 


30 
34 




30 
34 


32 ^ 


PAUSE y\ 


31 
32 


28 
33 


28 
33 


: \ — 





Xji R i 



A1-G4 1C DIGIT 


BP 




OSC 




LZBOUT 


LZBIN 


AtUBOAlK 


STORE 


ICM7224 


COUNT INHHT 


CABBY 




COUNT 




R^ 




Vt GND 



Figur06-13. LED Display Interface for ICL7135A/D 



Figure 6-15. 81/2 Digit Counter/Totalizer 



6-11 



Position ConboUar Ifaing ICM7217 




Figure 6-16. 



In this simplified block diagram the ICM721 7 compares 
the desired position as indicated by the thumbwheel 
switch with the actual position as detennined by the 
number of pluses generated by the incremental encoder. 
When the actual position equals the desired position, the 
ICM7217 Equal output turns off the motor driver. 

More sophisticated controllers use a quadrature en- 
coder to generate both Up and Down position pluses. 
With relatively simple input conditioning circuits the 
1CM7217 can count XI, X2 or X4 quadrature signals, as 
well as operating with Count and Up/Down signals. 




Figure 6-17. 



.Aiill*4i0iir M0ier 

This Amp-Hour meter uses th^ JCLTIO/ A/D to both 
display the instantaneous current, and to generate a 
stream of pulses which are integrated and displayed by 
the ICM721 7 counter. Thumbwheel presets can be added 
to the ICM7217 to perform control functions, such as 
shutting off the power supply in a plating operation or 
battery charger one© the desired AMP-Hour ctimm has 
been reached. 

The common mode shift of the reference capacitor 
during the Deintegrate phase is used to generate a pulse 
stream that is proportional to the oscillator frequency. The 
ICI7107 scale factor is set by the reference voltage and 
the 0,1 ohm resistor. The Amp-Hour scale factor can be 
adiusted by changing either the oscillator frequency or the 
2 prescaler. 



Tr^Bxa^ MjCO Wavetomis 



1 ((12 I l|>3 j (|>1 I $2 1 <|)3 I 



COM 3 [ 




VOLTAGE LEVELS DURING 

C0M1 



1/3 VP 

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OfFStSllWtlNE 









1/3 VP 
1 



ONSEeWENTlM 



OFF SEGMENT 
■1SVPT0 ALL COMMONS 

-VpfOGOMI 

-wroamom 



Triplexed LCDs have three backplanes, and every seg- 
ment line drives three separate segments, one for each 
backplane. The backplane waveforms have 6 mparsAe 
phases. 

During each of the first three phases, one backplane is 
at the most positive voltage, white the other two are at the 
lower intermediate voltage, Vl. The remaining three 
phases are an inversion of the first three: the three back- 
planes are each connected to the lowest voltage, Vdisp, 
for one phase while the other two backplanes are at the 
higher intermediate voltage, Vh. 

The problem that must be solved is how to turn ON or 
OFF each of the three segments that are driven by a single 
segment drive line. To turn ON the segment referenced 
to C0M1 (backplane 1 ), the LCD display driver will drive 
the segment drive line to the lowest display voltage. This 
applies the full display voltage across the segments ref- 
erenced to COM2 and COM3. This 1/3 display voltage is 
below the turn-on threshold of the display, so these seg- 
ments are not turned ON during this phase. 

If the segment referenced to C0M1 is supposed to be 
OFF, the LCD display driver drives the segment line to the 
upper intermediate voltage level, thereby applying 1.3 
display voltage to all three segments driven by the seg- 
ment Wrm. 



Figure 6-18 



6-13 



MfiGhaniGmlShock Alarm 



Piezo-electric resonators have a dual profjer^: they 
produce an electric field when bent (piezo-electric effect), 
and they produce physical movement when voltage is 
applied (electrostrictive motion ). Both effects contribute 
to operation of the circuit in Fig 6-21, which sounds an 
alarm in response to a jolt, vibration, or other physical 
movement. 

When an applied movement flexes the shock sensor 
(XI), Its piezo-electric effect generates several volts 
across the 10M resistor R3. This voltage triggers the 
CMOS timer ICIa, causing the piezo-electric horn (X2) to 
sound for a plastic housing that includes a driver circuit for 
producing a continuous tone at the transducer's resonant 
frequency, and ICIb modulates the signal by gating the 
horn on and off, which is comparable to the output of a 
typical smokedetector alarm. 

The shock sensor is a piezo-electric "bender"-a thin 
brass disk with a smaller piezo element bonded in the 
center. Separate leads attach to the brass and to the piezo 
element. You mount the device according to whether your 
application requires sensitivity in the vertical axis only (Fig 
e-19) or all three axes (Fig 6-20). 

In the vertical-axis case, the bending weight is soldered 
to the sensor opposite its point of support to enhance 
sensitivity by amplifying the sensor's movement, generat- 
ing higher voltage tor a given shock, on the other hand, 
you should limit the sensor's range of motion, as shown, 
to avoid cracking the brittle piezo element. In either case, 
apply the soldering iron briefly to avoid damaging the 
brass-piezo bond. 

To achieve 3-axis sensitivity, solder one edge of the disk 
to a stationary object such as the printed-circuit board, 
and solder a 1 1/4-in. bolt to the opposite edge (Fig 6-20). 
Add two nuts, jammed together to maintain position. 
Again, you can adjust the sensor's sensitivity by altering 
this weight position. 

VERTICALAXISSaiSmvnY 



SAXISSENSmvrTY 




BdOIDED WEIGHT 



Figure 6-20. Mounting tlie piezo sensor in tfiis manner (6-19) 
provides sliock sensitivity primariiy tor motion normal to f/ie pc 
board. Adding a cantilevered weigt)t (6-20) provides sen- 
siMvity to applied motion in all three orthogonal axes. 




Vt(9T012V) 



<" -BENDEB 

iM> m-2<m 

> (PflOJECTS pOiifL 
1 UNLIMriED) 
^DAVTON.OH^ 

■SaFIG.6-t9t6-2gFORMOUNTING 



Rgure 6-21. 





13 


DIS 






12 


ICtb 
ICM7556 
Tm nirr 




8 


Tr 












10 













ALABMWITH 
OSCILUIOfl 

AI-550 
(PflOJECTS 
UNUMITED) 
OAVTWOH 



Rgure 6- 19. Built with two piezo-electric devices and one IC, 
this mechanical-shock produces a loud, pulsing alarm for one 
minute. 



6-14 



Active Filters 

Loading MAX260/261/262 Without A iiP .. 7-3 

Loading Filters from a Personal Computer for up to Sth-Order Functions 7-4 

Filter Loading Basic Program 7-5 

4th-Order Butterwortli Lowpass 7-6 

4th-0rder Buttenworth Lowpass Filter (MAX266) 7-7 

Wide bandpass Chebyshev Bandpass Filters 7-8 

4th-Order Chebyshev Bandpass Filter (MAX260) 7-9 

4th-0rder Multiple Feedback Bandpass— MAX268 7-10 

4th-0rder Chebyshev Bandpass (No Multiple Feedback)— MAX268 7-11 

8th-Order Chebyshev Bandpass 7-12 

Dual 4th-0rder Tracking Lowpass— MAX263 7-13 

Lowpass Applications 7-14 

10th Order Lowpass Filters 7-15 

Creating Notch RIters : . 7-16 

7th-0rder Buffered Lowpass 7-17 

MAX280/281 Single Supply Operation 7-17 

Implement C-Message Weighing Function 7-18 

fo and Errors at Low Sample Rates 7-20 

Speed Active-Filter Design with Programmable ICs 7-21 

A Primer on Switched-Capacitor Filters , 7-24 



7-1 



7-2 



If a processor is not available, a MAX260/26 1/262 can 
be loaded from an EEPROM using some discrete logic. 
Toggle switches select the EEPROM address to be loaded 
and then the LOAD button transfers the data to the filter. 
With two filter ICs, any 8th-order filter function can be 
designed. The EEPROM must be preprogrammed with 



the proper codes for the desired filter, but up to 256 
separate filter designs can be stored in one memory chip. 
Pin numbers are shown for the MAX261 /262. The MAX260 
can also be used, but the pin numbers are somewhat 
different. 




CLK A CLK B 



Figure 7-3. 



7-3 



; £«MlKi#f!Hiai»I^Bm« Pmmmti Samm^ for W to mMMmr FimctloaB 



The MAX260, 261, and 262 are designed to be 
microprocessor programmed, fiowever, for prototyping 
purposes, programming codes for fCLK/fc ratio, Q, and 
filter operating mode can be easily loaded into one or two 
filter ICS from a personal computer. Tfie filter ICs are 
connected totfie computer's parallel printer port as sfiowh 
and the BASIC program listed loads programming data 



directly to the chips. No interface circuitry is needed. The 
program asks for the filter programming codes and loads 
up to four 2nd-order sections In turn. Programming codes 
for specific filter designs can be generated by N/laxim's 
filter design software or can be obtained from tables in the 
filter data sheets. 



LOADING FILTERS FROM A 
PERSONAL COMPUTER FOR 
UP TO 8TH-ORDER FUNCTIONS 



TO pcmrnTER 



FILTEH , 
INPUT 







WR 








LPa 




DO 


HPa 




D1 


BPa 




AO 


INb 


MAX261 


A1 


MAX262 




LPb 
HPb 




A2 
A3 


BPb 




CLKa 
CLKb 


V* 


QND 


V- 



— p — 

0.1<iFj_0.1/iF 



HPa 

BPa ^MXIM 
MAXTSt 
MAXZ62 

LPs 

HPb 
BPb 



WR 
DO 
DT 



A1 

A2 
A3 

CLKa 
CLKb 



FILTER 
OUTPUT 



T 



DB-25 MALE PLUG 
(BACK VIEW) 



NOIS: PIN NUMMM nFFlR«m 



Figure 7-1. 



7-4 



This program asks for programming input instructions 
for up to 4 filter sections (up to 2 filter ICs). It asks for: 
MODE (Type in 1 , 2, 3, or 4), CLOCK RATIO (fCLK/fo, Type 
in to 63), and (Type in to 127). In the program 
prompts there are references to "TABLE 2", TABLE 3", and 
"TABLE 5". These can be found in the MAX260/26 1/262 
data sheet. Programming numbers can be taken from 
these tables or can be generated in Maxim's Filter Design 
Software. 



The filter-loading BASIC program loops through all four 
filter sections In sequence. A section Is loaded when the 
for that section is entered. Other sections remain un- 
changed when any one is reloaded. Also, the program 
does not "end" but merely waits for reprogramming data 
for the next section in the sequence. If no new instructions 
are entered, the filter's programmed state do^ not 
change. 



10 PRINT "PRINTER PORT ADDRESS FOR LPTl : " 

20 PRINT " 3BC ( PORT ON DISPIAY ADAPTER ) =0 " 

30 PRINT " 378 ( PORT NOT ON DISPLAY ADAPTER ) =1 "; 

40 INPUT P : IF P>2 OR P<0 THEN 10 

50 IF P=0 THEN P0RT=956 ELSE PORT=888 ' SET POBX hDDRBSS 

60 FOR CHIP=1 TO 2 

70 PRINT "CHIP # ";CHIP 

80 AB$="FILTER A " 

90 GOSUB 180 : REM GET DATA FOR SECTION A 
100 ADD=0 : REM FILTER A ADDRESS 

110 GOSUB 290 : REM WRITE DATA TO THE PRINTER PORT 
120 AB$="FILTER B " 

130 GOSUB 180 : REM GET DATA FOR SECTION B 

140 ADD=32 : REM FILTER B ADI»C£SS 

150 GOSUB 290 : REM HRITE DATA TO THE PRINTER PORT 

160 NEXT 

170 GOTO 60 

180 PRINT "MODE (1 TO 4, SEE TABLE 5) " ; AB$; 
190 INPUT M 

200 IF M<1 OR M>4 THEN 180 

210 PRINT "CLOCK RATIO (0 TO 63, N OF TABLE 2) " ; AB$ ; 
220 INPUT F 

230 IF F<0 OR r>63 THEN 210 

240 PRINT "Q (0 TO 127, N OF TABLE 3) " ; ABS; 

2 50 INPUT Q 

260 IF Q<0 OR Q>127 THEN 240 

270 PRINT 

280 RETURN 

290 X=(ADD+M-1) 

300 GOSUB 450 

310 ADD=ADD+4 

320 FOR 1=1 TO 3 

330 X=ADD+(F-4*INT(F/4) ) 

340 GOSUB 450 

350 F=INT(F/4) 

360 ADD=ADD+4 

370 NEXT I 

380 FOR 1=1 TO 4 

390 X=ADD+(Q-4*INT(Q/4) ) 

400 GOSUB 450 

410 Q=INT(Q/4) 

420 ADD=ADD+4 

430 NEXT I 

440 RETURN 

450 '»»»> OUTPUT «««««« 

460 OUT P0RT,X 

470 OUT P0RT+2,CHIP 

480 O UT P ORT+2,0 

490 RETtnai 



Rpire 7-2. 



7-5 



MMSm are cascaded. The fo and Q parameters for each 
section are: 

foA = 3kHz foB = 3kHz 

Qa= 1.307 Qb = 0.541 

Mode 1 and a 400kHz clock are used. Because of low 
Q values, the sampling errors of one figure at end of 
section begin to look significant in this case. From the 
graphs in Figure 7-28 (Page 7-20), using fCLK/fO ratio near 
133. foA will be about 4% high, foB will be 1 .5% high. Qa 
will be -1 .2% low, and Qb will be -0.5% low. If ttiese errors 
are not a problem, the corrections can be ignored. They 
are included here for best possible accurady: 



(-1 .3% correction) 

fCLK/fOB = 1 39.80 (N = 25), foA = 2861 Hz 
(-4.6% correction) 

Qa = 1 .306 (N = 79, Q resolution prevents 

+0.5% correction) 

Qb = 0.547 (N = 1 1 , + 1 . 1 % correction) 

Measured wideband noise for this filter is 123n.V RMS. 
If Mode 2 were used, the noise would be 87nV RMS. For 
lower noise with either Mode the first section should have 
the highest Q (Section A in this example). 




7-6 



Cutoff Frequency = 30kHz 
fOA = fOB = 30kHz 
Qa = 1 .307, Qb = 0.541 
Gain = 1 

The MAX266 works well in this application because of 
high operating frequency. Since fo is the same for both 
2ncl-order sections, Mode 1 works well. The above "cook- 
book" fo and Q values for Butterworth filters can be used 
directly, or the filter design program, PZ, can be used. 

If we arbitrarily pick a 2MHz clock for both sections, 
fCLK/fo would be 66.7. By checking the sampling error 
graphs in Figure 7-28 (Page7-20), however, we see errors 
approaching 9% at low fCLK/fo ratio and low Q. The errors 
can either be corrected using the data from the graphs, or 
the filter software (Programs PZ and RP) can be used. The 
RP design program outputs (rounded to 3 digits h^e), with 
error corrections, are: 

Sec#1: R1 = 20kQ, R2 = 20kn, R3 = 26.6kQ 
Programmed Clk Ratio = 69.12 
Clk Frequency = 2MHz 

Sec#2: R1 = 35.9kn, R2 = 35.9ka, R3 = 20kQ 
Programmed Clk Ratio = 72.26 
Clk Frequency = 2MHz 

Note the different programmed clock ratios are 
selected by RP for each Mode 1 section because slightly 
different sampling error corrections are applied to each 
section. The MAX265/266 does not allow separate 
programming of each filter half (This is allowed by the 
MAX260/261/262. See appropriate data sheet.) so here 
we can: 

1 ) Use a clock ratio of 69. 1 2 in both halves and accept 
the resulting response error. 

2) Use a ratio of 69. 1 2 in both halves but change 
section #2's clock to (69.12/72.26) x 2MHz = 

1 .913MHz to correct for the error. 

3) Use a ratio of 69. 1 2 and a 2MHz clock in both 
halves but change section 2 to Mode IB vifiich 
allows fo to be raised with resistors. 

We continue the design to demonstrate 3), so the above 
Mode 1 design for section 2 is changed to Mode 1 B. This 
way the clock ratio of 72.26, which can't be set directly 
(since sections 1 and 2 are one value, 69.12) is tuned by 
R5 and R6: 

Desired fCLK/fO of section 2 



Programmed fCL.K/fO of 
sections 1 mvi'W 



Vl +R6/(R5 + R6) 



72.26/69.12 = Vl -t- R6/(R5 -I- R6) = 1 .045 

A side effect of tuning fo with resistors is that section 2's 
Q and gain also are shifted. They are restored to their 
original valuse (from the Mode 1 design above) by chang- 
ing R3 and R1 as described below. 



The Q af section 2 in Mode 1 B is: 

Q = (R3/R2) Vl + R6/(R5 + R6) = 1 .045 (R3/R2). 

Dividing R3 (20kii) by 1 .045 provides the value needed 
(19.1 kQ) to GOTper^ate for the Q shift ca^^ by RS and 
R6. 

The gain of section 2 in Mode 1C is: 

HOLP = -(R2/R1 )/(1 + R6/(R5 -i- R6)) =-1 .092 (R2/R1 ) 

Multiplying R1 (35.9kn) by 1.092 provides the value 
needed (39.2kQ) to compensate for the gain shift caused 
by R5 and R6. Figure 7-5 shows the connection and 
response for the complete filter. The final design values 
are tabulated below, but the resistors may be scaled to 
other values as long as the ratios are maintained. 

Sec#1: R1 = 20kn, R2 = 20kn, R3 = 26.6kQ 
Programmed Clk Ratio = 69.12 
Clk Frequency = 2MHz 

Se0«!: R1 = 39.2kQ, R2 = 35.9kQ, R3 = 19.1i^ 
R5 = 20kn, R6 = 2.04k£2 
Programmed Clk Ratio = 69.26 
Clk Frequency = 2MHz 




»t — 



(He Na SIb BPa V- ^ 



« 

Z -30 











1 nil 

GAIN 














Trttif-- 

PHASE 















































Figure 7* 30((Me Bifietm0s Lowp^ss with GlocH 



7-7 



.&M^fahm¥ BflfH^M Filtmrs 



In this example the Eiesired parameters are: 



Center frequency (fo) = 1 kHz 

Pass bandwidth = 1 kHz 

Stop bandwidth = 3 kHz 

Max passband ripple = 1 dB 

Min stopband Attenuation = 20 dB 



From the above parameters, we use either lookup 
tables, design texts or Maxim's filter design programs to 
generate the order (number of poles), and the to and Q of 
each second-order section. The A and B parameters are: 

f0A = 639Hz foB= 1564Hz 

Qa = 2.01 Qb = 2.01 

To implement this filter, section A operates in Mode 1 
and section B uses Mode 2 to provide a wider overall 
range of fCLK/fo ratios. This way one clock frequency can 
drive both sections A and B. See selection Tables 2 and 
3 of MAX260 data sheet. 



CLKa = CLKb= 120 kHz 

f CLK/tOA = 1 88.48 (Mode 1 , N = 56). actual foA = 
636.6 Hz 

fCLK/fOB = 76.64 (Mode 2, N = 5), actual foB = 
156.5 Hz 

Qa = 2.000 (Mode 1, N = 96), Qb = 2.01 (Mode 2, 

N = 83) 

The overall passband gain at fo will be 0.64V/V or 
-3.9dB. 

The same Chebyshev response shape shown in Figure 
7.6 is implemented at higher frequencies with a MAX262 
in Figure 7-7. The curves show ptots for center frequen- 
cies of 15.6kHz, 31.3kHz. and 47kHz. Not only is this 
faster than the MAX260 implementation but Mode 1 can 
be used on both halves of the MAX262 for this fitter 
because the range of available fCLK/fO ratios is wider with 
the MAX262 than the MAX260. 




Figure7-6. \Mdb f^^^mxl Chebyshev Bantlfmss Filter Figum 7-7. High Frequmcy Chebyshev Bandpass Filter 



7-8 



Here both halves of a MAX260 are cascaded to form a 
fourth-order Chebyshev bandpass filter. The desired 
parameters are: 

Center frequency (fo) = 1kHz 

Pass bandwidth = 200 Hz 

Stop Bandwidth = 600 Hz 

Max. passband ripple = 0.5 dB 

Min. stopband Attenuation = 1 5 dB 

From the above parameters, the order (number of 
poles), and the fo and Q of each section can be deter- 
mined. Such a derivation is beyond the scope of this note, 
however there are a number of sources which provide 
design data for this procedure. These include look-up 
tables, design texts and computer programs. Design 
software is available from Maxim to provide comprehen- 
sive solution for most popular filter configurations. The A 
and B section parameters for the above filter are: 

f0A = 904Hz foB=1106Hz 

Qa=7.05 Qb = 7.05 

To implement this filter, both halves operate in Mode 1 
and use the same clock. See selection Tables 2 and 3. 
The programmed parameters are: 

CLKa = CLKb= 150 kHz 

fCLK/fOA = 166.50 (Mode 1 , N = 42), actual foA = 
902.4Hz 

fCLK/fOA = 136.66 (Mode 1, N = 23), actual fOB = 
1099.7Hz 

Qa = Qb = 7.1 1 (Mode 1 , N = 119) 

Sampling errors are very small at this fCLK/fo ratio so 
the actual realized Q is very close to 7.05 (See Figure 7-27 
or Filter Program MPP). Often the realized Q will not be 
exactly the target value at high Qs because programing 
resolution lowers as Q increases. This doesn't affect most 
filter designs, since 3-digit Q accuracy is practically never 
required, and a Q resolution of 1 is provided up to Qs of 
10. The overall filter gain at fo is 16.4V/V or 24.3dB (See 
Cascading Filters section). If another gain is required, 
amplification or attenuation must be added at the input, 
output, or between stages. 

In Figure 7-9, a series of response curves are shown 
for the above configuration using a MAX261 with clock 
frequencies ranging from 750kHz to 4MHz fo from 500Hz 
to 30kHz). Note that the rightmost curve shows about 2dB 
of gain peaking compared to the lower frequency curves, 
indicating the upper limit of usable filter acuracy at this Q. 



I 

I 




200 500 1K 2K SK 10K aOK 



FREQUENCY (Hz) 




VOUT 



Ma Wt Mi a^i 



MAX2eO 



CUU CU1» wg;«x.Dx 

CLK PROGRAM 



CIK„ 


MODE 


<0A 


<(» 


Qa 


Q. 


ISOkHi 


1 


N ' ,42 


N°23 


N - 119 


N ' 119 



Figwe 7-8. ^Uh-Order Chebyshev BsuTdpass Filter 




1K 2K SK NK aOK SOK 100K 
FREOUeNCY (HD 



Figure 7-9. MAX261 4th-0rder Chebyshev Bandpass Filter 
Using Coeffiaents of Figure 7-8. 



7-9 



Here a pin-programmed MAX268 operates as a 4th- 
order 50kHz Chebyshev bandpass filter. Tiie specifica- 
tions are: 

Center frequency (fo) = 50kHz 

Pass bandwidth = 10kHz 

Max. passband ripple = O.ldB 

Gain at center freq. = IVA/ 

Two identical 2nd-order sections and the internal op 
amp are used with multiple feedback. Maxim's design 
program, BP, generates the programming codes and 
feedback resistor values. With a 2.5 MHz crystal clock, 
the realized parameters are: 

Center frequency = 50.305kHz 

Pass Bandwidth = 10.07kHz 



Programmed fCLK/fO ratio = 50.27 (N = 3) 

Programmed Q = 4.27 (N = 113) (desired Q = 
Actual Q (with error correction) = 4.21 
Resistors: R2 = 131kQ, RO = 75kn, RF = lOkfl 



4.215) 



Other clock rates and fCLK/fO ratios can be chosen to 
implement the same filter, but larger fCLK/fO ratios provide 
performance closer to the ideal. Capacitor C2 may be 
needed to prevent response peaking at the passkjand 
edge. In this example C2 = 2.5pF. 

Multiple feedback can also be extended to 8th-order 
designs while still using one clock by adding a second 
MAX268 and 2 additional feedback resistors. These can 
also be calculated with the design program, BP. Note that 
for filter order above 4, the feedback signal from odd filter 
sections is inverted before it is summed. 




Ro 

Vm»-VA- 
TSkfl 



c 

V 



^-1 



2.5pF 
R2 



-vw- 



a. 



-»OUT 



24 



IN» BPaINbBPb 
F4 
F3 



CLKa MAX268 
CLKb 

06 05 04 03 02 01 OO 



20 19 



fO =— * 



14 13 



Figure 7- 10. 4th-Order 50kHz Chebyshev Bandpass Using 
Multiple Feedback 



7-10 



Without multiple feedback, the previous example can 
be implemented with no extemal components; however, 
separate clocks are required for CLKa and CLKb. The 
target specifications are the same as before. The realized 
parameters are now: 

CLKa = 1.89MHz, CLKb = 2.5MHz 

Center frequency = 50kHz 

Pass bandwidth = 10kHz 

Programmed fCLK/fo ratio = 43.98 (N = 1) 

Programmed Q = 4.27 {N= 1 13) (desired Q = 4.215) 

Actual Q (with error correction) = 4.2 

With the chosen fCLK/fo ratio, a crystal may be used at 
CLKa while a divided system clock, if available (2.5,5,10, 
or 20MHz), drives CLKb. This is suggested because 
CLKa has internal circuitry to drive a crystal while CLKb 
does not. Other clock sources may be used with a dif- 
ferent programmed fCLK/fo as long as the ratio between 
CLKa and CLKb remains the same as above. Another 
advantage of this circuit is that higher center frequencies 
can be achieved relative to equivalent multiple feedback 
designs because lower Q sections are used compared to 
multiple feedback. 



ViNl 



l.« I 

MH2 I 



2.SMHZ- 



-VouT 



CLK* 



OSC OUT 



INa BPa 



MAX268 



CLKb 

06 OS 04 03 02 01 OO 



INb BPb 
F4 
F3 
F2 
F1 
FO 





7 


6 


23 


20 


19 


14 

















21 



13 



Figure 7-11. 4th-0rder 50kHz Chebyshev Bandpass Using No 
External Resistors 



7-11 



tftAxOMtor esil«lqy«fMV B»id|MM 



Center frequency 
Pass Bandwidth 
Stop Bandwidth 
Attenuation 
Passband Ripple 



= 12.8kHz 

= 9.05kHz (1 octave) 
= 19.2kHz 
= 35dB 
= 0.5dB 



This example is designed to be a 1 -octave bandpass 
filter at 12.8kHz that provides 35dB of attenuation at the 
center of the adjacent 1 -octave bands (6.4kHz and 
25.6kHz). The above specs are given to design program 
PZ which outputs the following fo's and Qs. 

9.294kHz Q = 9.37 

17.629kHz Q = 9.37 

11.178kHz Q = 3.73 

14.657kHz Q = 3.73 

Two MAX266 ICs make the Bth-order filter. A 1MHz 
clock is preferred for all sections so filter Mode 3, which 
allows the most flexible tuning of to and Q, is selected. 
Program RP picks resistors and programmed clock ratios. 
It asks for each sections's fo, Q, fCLK, and gain. AH 
sections are set for a gain of one. 

Program RP asks for: 1 ) clock frequency, 2) clock ratio, 
or 3) both as input data for each filter half, but in the 
MAX265,266 both halves use the same clock ratio. There- 
fore when designing section 1 , we tell RP the clock fre- 
quency ( 1 MHz) and ask the program to pick the clock ratio 



to be the same as section 1 . In section 3 (the second filter 
chip), the program picks the ratio, and we use this same 
ratio for sectron 4. As the circuit connection shows, the 
order of the sections is changed so that those with the 
closest fo are in the same IC. This way fo is tuned the least 
amount by resistors. The design values are listed below. 
Remember that these may be scaled to other values if the 
ratios are maintained. 

Sec#1: R1 = ^89kQ. R2 = 20.2kn, R3 = 189kQ 
R4 = 20ka 

Programmed Clk Ratio = 108.38 
Clk Frequency = 1MHz 

Sec#2: R1 = 90kn, R2 = 29kn, R3 = 90kn 
R4 = 20kn 

Programmed Clk Ratio = 108.38 
Clk Frequency = 1 MHz 

Sec#3: R1 = 75.6kQ R2 = 20.2kQ, R3 = 75.6k£2 

R4 = 20kn 

Programmed Clk Ratio = 69.12 
Clk Frequency = 1MHz 

Sec#4: R1 = 229kn, R2 = 29.5Q, R3 = 229kn 
R4 = 20kn 

Programmed Clk Ratio = 108.38 
Clk Frequency = 1MHz 




MOfE: 




I2k tM ttJk tSM SUk 
FUEOUEMCY (Hz) 

Figure 7-12. 12.&&lz. 1 -Octave Bandpass wUi 1 MHz Ckxsk 



7-12 



Two Butterworth lowpass filters are set up to accurately 
track each other. By "splitting " two MAX263s, only one 
clock is needed. The specifications are: 

Cutoff frequency = 3kHz 

fOA = fOB = 3kHz 

QA = 1.307, Qb = 0.541 

These values can be programmed directly into the filter. 
However, since the Qs are low, sampling errors may be 
large enough to desen/e attention. From Figure 7-28 
(Page 7-20), if fCLK/fo is near 130 (fCLK is 400kHz), foA 
and foB will be about 4% and 1 .5% high respectively. Qa 
and Qb will be 1 .2% and 0.5% low. These errors may not 
be large enough to worry about but are corrected here 



(within the programming resolution of the MAX263) by the 
filter design programs PZ and MPP. fOA and foB are 
pragNmmed to different values (Na = 1 1 . Ne = 1 2) for tills 
reason. 

Mode 1 , CLKa = CLKb = 400kHz 

fCLK/fOA = 135.08, N = 11 

(target foA = 2961Hz, actual = 3008Hz) 

fCLK/fOB = 138.23, N = 12 

(target foB = 2894Hz, actual = 3015Hz) 

Qa = 1 .31 , N = 79 (actual Qa = 1 .30) 

Qb = 0.547, N = 1 1 (actual Qa = 0.542) 




HIEOUENCY(HD 



MAX263 



CLKa CLKb LPflO** 



FILTER 1 
IN 



HLTER 1 

OUT 





INa 


MO Ml 


LP* Q6 








05 


F3 






04 


F2 




M/IX263 


03 


F1 






02 


FO 






01 




INb 


CLKa CLKb LPb 00 



FILTER 2 
OUT 



CLKa.b 


MODE 


•oA 


'oe 


o» 




400kHz 


1 


N = 11 


N = 11 


N = 79 


N = 79 



CLKa.b 


MODE 


'oA 


(oe 


Q. 


Qb 


400kHz 


1 


N = 12 


N = 12 


N = 11 


N = 11 



Figure 7-13. Dual Tracking SfHz 4th-Order Lawpass 



7-13 



1 — r 



0.1/iF 



_/.13 ./s 

'ACD4016 «f 




TO PIN S OF CD4016 



BY CONNECTING PIN 4 OF THE MAX280 HIGH/ 
QROUNCVLOW THE FILTER CUTOFF FREQUENCY 



TO pm 13 OF eoiOM 



-sv 



Figure 7- 14. 100Hz, 50Hz. 25Hz 5th Order DC Accurate LP Filter 





Figim 7-1 S. Oetave Tuning with a Sinffle Iripta OoGk 



Figure 7-16. Amplitude Rdsporsse for the Octave Tuning Circuit 



7-14 



412k 




. DC ACCmUTE 
OUTPUT 



10Hz, 10th ORDER DC ACCUIUfFE UIW HkSS HUIB 
60dB/OCTAVE ROLLOFF 
OSdB MSSBMm EmWR, OdB DC GAIN 
MAXmUM XnENUmON IIOdB (IcLK = 10kHz) 
gcix = IkHi) 



V* = +5V 
■ICLK-1»te 



Figure 7-17. Simple Cascading Techn ique 




BUFFERED OUTPUT 



Rgure 7-18. Cascading Two MAX280S. The 2nd Stage is Driven by the Buttered Output of the First Stage. 



7-15 



The MAX280 can be used to create a notch because 
the frequency, where it exhibits -1 80° phase shift, is Inside 
its passband and is repeatable and predictable from 
part-to-part. An input signal can be summed with the 
output of the filter to form a notch as shown in Figure 7-20. 
The 180° phase shift of the MAX280 occurs at fCLK/1 18.3 
or 0.85 times the lowpass cutoff frequency. For instance, 
to obtain a 60Hz notch, the clock frequency should be 
7.098kHz and the input ( 1 /2jiRC) should be approximately 
70.98HZ/1 .63. The optional (R2C2) at the output filters the 
clock feedthrough. The 1/27tR2C2shouldbe12-15tlmes 
the notch frequency. The major advantage of this notch 
is its wide bandwidth. The input frequency range Is not 
limited by the clock frequency because the ItMX^Oi ^ 
itself does not alias. 



The circuit of Figure 7-21 is an extension of the previous 
notch filter. The input signal is summed with the lowpass 
filter output through A1 , as previously described; then, the 
output of A1 Is again summed with the input voltage 
through A2. 

R6 = R2 = R3 = R7 and R4 = R5 = 0.5R7. The output 
of A2, at least theoretically, should look like the output of 
the MAX280, the BoUT pin. If the ratio of (R6/R5) is slightly 
less than 2a, notch is introduced in the stopband of the 
filter as shown in Figure 7-19. The overall filter response 
looks like a pseudoelliptic lowpass. The frequency of the 
notch is at fCLK/47.3 and the value of the resistor ratio 
(R6/R5) should be equal to 1.935. 




Figure 7-19. Amptttude Response of the Filter 





7-16 



TtA Onfar SiiiflM«d teiiqMMS 



r 





-VouT 



THE MAX430 IS CONNECTED AS A 2nd ORDER 
SALLEN AND KEY LOWRASS FILTER WITH A 
CUTOFF FREQUENCY EQUAL TO THE MAX280. 
THE ADDITIONAL FILTERING ELIMINATES ANY 
10kHz CLOCK FEED THROUGH PLUS DECREASES 
THE WIDEBAND NOISE OF THE FHTER. 

DC OUTPUT OFFSET (REFEMCD TO A DC QAM OF 
UNITY) • VV Ma«. 

WIDEBAND NOISE (REFERRED TO A DC GAIN OF 
UNIT) ° MVl/Vnis 





OUITUTFiLn 


BCOMPO 


MENTWa 


jues 




DC GAIN 


R3 R4 


R1 


R2 


CI 


02 


1 





14.3k 


53.6k 


0.1;;f 


0.033kiF 


10 


3.57II 32.411 


A.ek 


27.4k 


0.1;iF 




W1 


&324 3^4lI 


0.31k 


16.9k 


0.47(lF 


1(lF 



Figure 7-22. Tth-Order 100Hz Lowpass Filter with Continous Output Filtering, Output Buffering and Gain Adjustment 



.MAX280/MAX281 Single Supply Operation 



The MAX280/MAX281 can be operated with a single 
power supply. The AGND pin and the OUT pin should be 
biased at 1/2 supply. The value of the resistors R1 and R2 
should be chosen to conduct 100nA or more. R' DC 
biases the buffer and C isolates the buffer from the DC 
value of the output. Under these conditions the external 
resistor and capacitor should be adjusted such that ( 1 /2 n 
RC) = fc/1 .84. This accounts for the extra loading of the 
R'. C comjjination. R" and C are not required if ttie input 
voltage has a DC value around 1/2 supply. If an external 
capacitor is used to activate the internal oscillator, its 
bottom plate should be tied to system ground. The AGND 
pin should also be bypassed by a decoupling ca^cltor. 



R 

V|H*-VA- 



DC 
ACCURATE 
OUTPUT 




±:C- 



BUFFERED 
AJ OUTPUT 



FOR A Wb FILTER R = 2a.4ka C - IjiF, icLK - 1kHz 
THE FILTER IS MAXIMALLY FLAT FOB = — 



Figure 7-23. Single 5V Supply 5th Order LP fmer 



7-17 



kat^mmmrit C Mi B msa m> > ^IIMWMag FimoUmi 



The C-message filter is a commonly specified test and 
measurement filter that simulates response of the human 
ear for voice, audio, and telecommunication applications 
in the U.S. In Europe, a close relative is the psophometric 
noise-weighing filter. You can construct the C-message 
filter, by cascading three second-order bandpass sec- 
tions with a second-order lowpass section (Fig 7-24). 

Dual universal, second-order IC filters provide a com- 
pact and efficient means for implementing the circuit of 
Fig 7-24. If the IC filters are also programmable, switched- 
capacitor types as shown, you can rapidly implement the 
C-message, psophometric, or other test filters on demand 
simply by loading the chips with different sets of coeffi- 
cients. These coefficients set each 2nd-order section's 
filter mode, Q, and cutoff or center frequency fo. The 
C-message filter has poles only, which are specified -by 
the IEEE Standard 743-1984: 

Pole Value in rad/sec Value in Hz (fo) Q 

BP#1 -1502±j1267 312.741 0.6540 

BP#2 -2439 ±15336 933.761 1.2027 

BP#3 -4690±j15267 2541.886 1.7026 

LP#1 -4017±j21575 3492.778 2.7316 

Fig 7-25 shows the external connections that configure 
two MAX262S in the filter architecture of Fig 7-24 Fig 
7-25 also lists decimal equivalents of the digital coeffi- 
cients required to program for each filter section. For the 
maximum signal-to-noise ratio, signal amplitudes at the 
2nd-order section outputs should be as high as possible. 

Signal swings are as follows: If you apply ±4V to Input 
INa on ICi , output BPa swings ±2.7V, output BPb swings 
±1 .85V, output BPa of IC2 swings ±1 .6V, and the lowpass 
output (LPa of IC2) swings ±3.2V. IC2 operates in mode 



4 instead of mode 1, which provides a gain of 2 instead 
of 1 for the LP and BP outputs (see data sheet). 

You must band-limit the filter's input signal to fCLK/4 or 
less, where (in this case) fcLK = 38.4 kHz. The uncom- 
mitted op amp in IC1 can provide a 2nd- or 3rd-order 
lowpass filter for this purpose. If needed, the uncom- 
mitted op amp in IC2 can provide a similar lowpass filter 
for smoothing the output signal. 

As an alternative, you can realize the C-message func- 
tion using one filter IC and external op amp (Fig 7-26). 
This approach lacks flexibility, however. You can no 
longer switch to other filter functions by electrically 

reprogramming the circuit. 

This circuit realizes the first bandpass (BP#1) in terms 
of external resistors and capacitors around the uncom- 
mitted op amp of IC1. BP#1, which also serves as an 
antialiasing filter for the sampling action of IC1, is an 
infinite-gain, multiple-feedback bandpass filter with fo = 
312.74 Hz, Q = 0.654, and gain = 0.654. Design proce- 
dures for this configuration are available in the literature. 
(Johnson & Holburn, "Rapid practical designs of active 
filters", John Wiley & Sons.") 

IC2 implements BP#2 and BP#3 with the same gain and 
signal levels as in Fig 7-24. The external op amp with 
resistors and capacitors implements LP#1, which also 
serves as the output smoothing filter. Like BP#1 , you can 
design LP#1 as an infinite-gain, multiple-feedback circuit 
with fo = 3492.778, Q = 2.7316, and gain = 2. 

The 125-kHz clock frequency is arbitrary; other values 
require that you program IC1 for a different fCLK/fo ratio. 
In both filter circuits (Fig 7-24 and Fig 7-25) the coefficients 
for foA, fOB, Qa, and Qb were calculated by software 
available from Maxim (see data sheet). Fig 7-28 shows 
the filter transfer furKstion for either realization. 



FUTB 


2* ORDER 




BP 






IN 


BP 






BP 











LP 



OUT 



Figure 7-24. Cascaded, 2nd-order universal filter sections implement a C-message filter. 



7-18 




ModeA 


ModeB 


fOA 


fOB 


Qa 


Qb 


1 


1 


N = 55 


N = 2 


N = 31 


N = 76 



ModeA 


ModeB 


foA 


fOB 


Qa 


Qb 


4 


4 


N = 13 


N = 3 


N = 91 


N = 105 



Figure 7-25. The circuit connections and coefficient sets shown enable two programmable, switched-capacitor filter ICs to realize 
the Omessage filter of Fig 7-24. By loading the ICs with difhrent coefficient sets, you can obtain the European psophometric 
noise-weighting filter and other test/measurement filters. 




4,145 K 



2'-'5 




CLKa 


CLKb 


ModeA 


Modes 


foA 


foB 


Qa 


Qb 


125kHz 


125kHz 


1 


4 


N = 61 


N = 6 


N = 75 


N = 91 



Figure 7-26. This circuit, based on one filter IC and an external op amp, produces the same C-message response of Figure 7-24, 
but lacks programming iHexibility. 



C-MESS«fiEFIlTBI RESPONSE 




500 1k 
FREQUENCY (H!) 



figure 7-27. Circuits of R^/re 7-24 and Figure 7-25 produce (to same frequency response. 



7-19 



/d and Q firrora at Low Samplm ftotoa 



When lowfCLK/fo ratios and low Q settings are selected 
in switched capacitor filters, deviation from ideal con- 
tinuous filter response may be noticeable in some designs. 
This is due to interaction between Q, and fo at low fcLK/fo 
ratios and Qs. The data in Fig. 7-28 quantifies these 
differences. Since the errors are predictable, the graphs 
can be used to correct the selected fo and Q so that the 
actual realized parameters are on target. These predicted 
errors are not unique to MAX260 series devices and in fact 
occur with all types of sampled filters. Consequently, 
these corrections can be applied to other switched- 
capacitor filters. In the majority of cases, the errors are 
not significant, i.e. less than 1%, and correction is not 
needed. However, the MAX262 does employ a lower 
range of fCLK/fO ratios than the MAX260 or MAX261 and 
is more prone to sampling errors as the tables show. 

Maxim's filter design software applies the previous 
corrections automatically as the function of desired 
fCLK/fo, and Q. Therefore, Fig 7-28 should NOT be used 
when Maxim's software determines fo and Q. This results 
in overcompensation of the sampling errors since the 
correction factors are then counted twice. 

The data plotted in Fig 7-28 applies for Modes 1 and 3. 
When using Rg 7-28 for Mode 4, the fo error obtained from 
the graph should be multiplied by 1.5 and the Q error 
should be multiplied by 3.0. In Mode 2 the value of fCLK/fO 
should be multiplied by V2 and the programmed Q should 
by divided byv2^ before using the graphs. 

Alimting 

As with all sampled systems, frequency components of 
the input signal above one half the sampling rate will be 
aliased. In particular, input signal components near the 
sampling rate generate difference frequencies that often 
fall within the passband of the filter. Such aliased signals, 
when they appear at the output, are indistinguishable from 
real input information. For example, the aliased output 
signal generated when a 99kHz waveform is applied to a 
filter sampling at 100kHz, (fCLK = 200kHz) is 1kHz. This 
waveform is an attenuated version of the output that would 
result from a true 1kHz input. Remember that with the 
MAX260 series filters, the nyquist rate (one half the sample 
rate) is in fact fCLK/4 because fCLK is internally divided 
by two. 



U ERROR » IcLK 'o RATIO (MODE 1. 3) 




Icuc/Ib ratio 



Q CMKM w tcut/fa RATIO 



-6 







0» 
MO 


« Q by V Ibclon inlng graph 
E 4 MtiWpty Q tmu by 3 






divid 
MOC 




Q ^ 


-S 

0-6- 












Q =( 


83 


























= 711 















40 60 80 100 120 140 160 ISO 200 
ICiK/lo RATIO 



Figure 7-28. Samping Errors in fCLK/fO and Q Settings 



7-20 



A Primer on 

Switched-Capacitor 

Filters 

Ease of use has made integrated, switched-capacitor fil- 
ters attractive for many new applications. This anicle 
can help you prepare for such designs by describing 
the filter products and by explaining die concepts that govern 

their operation. 

Starting with a simple integrator, we first develop an intuitive 
approach to active filters in general and then introduce practi- 
cal realizations such as the state-variable filter and its 
implementation in switched-capacitor form. Specific inte- 
grated filters mentioiied include the MFIO and Maxim's new 

First Order Filters 

An integrator (Figure la) is the simplest filter mathematically, 
and it forms the building block for most modem integrated fil- 
ters. Consider what we know intuitively about an integrator. If 
you apply a DC signal at the input (i.e., zero frequency), the 
output will describe a linear rainp that grows in amplitude 
until limited by tbe power su^Un. Ignoiing that limitatioii, 
the lesptmse of an integrator at zeio frequency is infitiite, 
which means that it has a pole at zero ftequency. (A pole ex- 
ists at any frequency for which the ttmsl& Aliicti<»*s value 
becomes infinite.) 




Figure la. Simple KC Integrator 







Mb/dK 


da 



























Figure ib. Bode plot of sinqtle integrator 



We also Imow that Uie mtegiator's gain diminishes with increas- 
ing frequency, and that at high frequencies the output voltage 
becomes virtually zero. Gain is inversely proportional to fre- 
quency, so it has a slope of - 1 when plotted on log/log 
coordinates (i.e., -20db/decade on a Bode plot. Figure lb). 

You can easily draive the tnms&f function as 

Vqut _ _ 1/sC tap 
ViN R R ~ s 

where s is the complex-frequency variable a + jto, and oIq is 
1/RC. If we think of s as frequency, this formula confirms the 
intuitive feeling that gain is inversely proportional to frequency. 
We will return to integrators later, in discussing the implementa- 
tion (rf actoal films. 

The next most complex filter is the simple lowpass RC type. 
(Figure 2a) Its characteristic (transfer function) is 

VouT _ 1/sC _ 1 _ '"O 

lit. ■■n^mmr ■ i+»cR.. 9*-mo 

When s = the function reduces to tao/too, i.e. 1 . When s tends 
to infinity the function tends to zero, so this is a lowpass filter. 

When s = -too the denominator is zero and the function's value 

is infinite, indicating a pole in the complex frequency plane. 
The magnitude of the transfer function is plotted against s in 
Figure 2b, where the real component of s (o) is towards us, and 
the positive imaginary part (j(o) is toward the right. The pole at 
-COq is evident. Amplitude is shown logarithmically to emphasize 
the.fimction's form. For both the integrator and the R-C 
lowpass filter, frequency response tends to zero at infinite fic- 
qnency. That is, there is a zero at s = °°. This single zero 
surrounds the complex plane. 

But how does the complex function in s relate to the circuit's re- 
sponse to actual frequencies? When analyzing the response of a 
circuit to AC signals, we use the expression jcoL for impedance 
of an inductor and 1/jcoC for that of a capacitor. When analyz- 
ing transient response using Laplace transforms, we use sL and 
1/sC for the impedances of these elements. The similarity is im- 
mediately ^jparent The jta in AC analysis is in fact the 
imaginary part of s, which, as mentioned eaiU«, is eanmosed 
of a real part s and an imaginary part joi. 

If we replace s by jco in iuiy equation so far, we have the 
circuit's response to an angular frequency (O. In the complex 
plot of Figure 2b, o = and hence s = jco along the positive jo 
axis, so the fimction's value along this axis is the frequency re- 
sponse of the filter. We have sliced the function along tbe jta 
axis, and emphasized the RC lowpass filter's frequency-re- 
sponse curve by adding a heavy line for function values along 
the positive jco axis. The more familiar Bode plot (Figure 2c) 
looks different in form only because the frequency is expressed 
logarilhniically. 



7521 




Figure 2c. Bode plot ofkmpaa filler 

While the complex frequency's imaginary part (j<D) helps de- 
scribe a response to AC signals, the real part (o) helps 
describe a circuit's transient response. Looking at Figure 2b, 
we can therefore say something about the RC lowpass filter's 
response as compared to that of the integrator. The lowpass 
filter's transient response is more stable because its pole is in 
the negative-ieal lulf of comidex plane. 

That is, the lowpass filter makes a decaying-exponential re- 
sponse to a step-function input; the integrator makes an 
infinite response. For the lowpass filter, pole positions further 
down the -<J axis mean a higher too, a shorter time constant, 
and therefore a quicker transient response. Conversely, a pole 
closer to the j(0 axis causes a longer transient response. 

So far, we have related the nuAematical transfer functions of 
some simple circuits to their associated poles and zeroes in the 
complex-frequency plane. From these functions we have de- 
lived the ciiaiit's ficqueitcy re^ionae (and hence its Bode 



plot), and also its transient response. Because both the integra- 
tor and the RC filter have only one s in the denomitiator of their 
transfer functions, they each have only one pole. That is, they 
are first-order filters. 

But as we can see from Figure lb, the first-order filter does not 
provide a very selective frequency response. To tailor a filter 
mote closely to our needs, we must move on to higher orders. 
And from now on, we shall describe the transfer function using 

f(s) rather than the cumbersome Vqut/Vin. 

Second Order Lowpass Filters 

A second order filter has s^ in the denominator and two poles in 
the complex plane. You can obtain such a response by using in- 
ductance and capacitance in a passive circuit, or by creating an 
active circuit of resistors, capacitors and amplifiers. Consider 
the passive IXI filter of Figure 3a, for instance. We can show 
that its transf^ fiinction has the form 



l/sC 



1 



R + Xl + Xc R + sL+l/sC LCs^ + RCs+1 



and if we defme (Oq = 1/LC and Q = oodL/R, then 



f(s) = 



0* 



S^ + SMo/Q + Cl>0 ^ 



where (Oo is the filter's characteristic frequency and Q is the 
quality factor (lDvt«r R means Mgiier Q). 




OUT 



Figure 3a. RLC Umpass fitter 




Figure 3b. Pole-Zero diagram ItLC lowfoss filler 

The poles occur at s values for which die denominator becomes 
zero. That is, when s^ + soit/Q + (flo^ = 0. We can solve this 
equation by remembering that the roots of ax^ -f bx -i- c = are 
given by 



7-22 



-b±Vb^-4ac 

^ = 

In this case a = 1, b = (Oq/Q, and c = (Oo^. The term (b^ -4ac) 
equals fit^{\l(^ -4), so if Q is less than O.S then both roots are 
real and lie on the negative-real axis. The circuit behaves like 
two fiist-OFder RC filters in cascade. This case isn't very inter- 
esting, so we'll consider only the case where Q > 0.5— which 
means (b^ -4ac) is negative and the roots are complex. 




Figure 4a. Complex function of 2nd-order lowpass filter (Q~ 0.7071 

The real part is therefore -b/2a, which is -0)(/2Q, and is com- 
mon to both roots. The roots' imaginary parts will be equal 
and opposite in sign. Calculating the position of the root.s in 
the complex plane, we find that they lie at a distance of (Oo 
from the origin as shown in Figure 3b. (The associated mathe- 
matics, whidi are stnughtfarward but tedious, will be left as an 
exercise for the more masochistic readers.) 

Varying (Oo changes the poles' distance from the origin. De- 
creasing the Q moves the poles towards each other, while 
increasing the Q moves the poles in a semicircle away from 
each other and towards the jto axis. When Q = 0.5 the poles 
meet at -too on the negative real axis. In this case the corre- 
sponding circuit is equivalent Co two cascaded first-<Htier 
films, as noted earlier. 

Now let's examine the second-order fimction's frequency re- 
sponse and see how it varies with Q. As before. Figure 4a 
shows the function as a curved surface, depicted in the three- 
dimensional space formed by the complex plane and a vertical 
magnitude vector. Q = 0.707, and you can see immediately 
diat the response is a lowpass filter. 

The effect of increasing the Q is to move the poles in a circular 
path towards the jto axis. Figure 4b shows the case where Q = 
2. Because the poles are closer to the jco axis they have a 
greater effect on the frequency response, causing a peak at the 
high end of die passband. 

There is also an effect cto the filter's transient response. Be- 
cause the poles' negative-real part is smaller, an input step 
function will cause ringing at the filter output. Lower values of 
Q result in less ringing because the damping is greater. On the 
odier hand, if Q becomes infinite the poles reach the j(D axis. 



causing an infinite firequency response (instability and continu- 
ous oscillation) at (o = cdq. In the LCR circuit of Figure 3a, this 
condition would be impossible unless R = 0. For filters that con- 
tain amplifiers, hov. e\ er. the condition is possible and must be 
considered in the design process. 

A second-order filter provides the variables (Oo and Q, which 
allow us to place poles wherever we want in the complex plane. 
These poles must, however, occur as complex-conjugate pairs. 




Figure 4b. Complex function of 2nd-order lowpass filter (Q = 2) 

in which the real parts are equal and the imaginary parts have 
opposite sign. This flexibility in pole placement is a powerful 
tool, and one diat makes the second-order stage a useful compo- 
nent in qaany switched-capiacitor filters. As in the first-oider 
case, the second-order, low|ass transfer function tends to zero 
as fiequency tends to infinity. The second-order function de- 
creases twice as fast, however, because of the s^ factor in the 
denominator. The result is a double zero at infinity. 

Having discussed fu^t- and second-order lowpass filters,we 
now need to extend our ideas in two directions. First, to discuss 
a&iet filter configurations stich as higbpass and bandpass sec- 
tions, and second, to talk a1x>ut hi^er-order fUOts. 

Highpass and Bandpass Filters 

To change a lowpass filter into a highpass filter we turn the s 
plane inside out, making low frequencies high and high frequen- 
cies low. The double zero at infinite frequency goes to zero 
frequency, and the finite response at zero frequency becomes in- 
finite. To accomplish this transformation we make s = too /s, so 
that s->ea when (Oq^/s ->0 and vice versa. At (Do the old and 
new values (rf 8 ate identicaL The douide zero that «nn s = 1 
moves to zero and the finite response we had at s = moves to 
infinity, producing a highpass filter 

„ , ^ 

f^^^ = 4"^ 3 T 

too /s -HWo /Qs + (ao 

2 2 

If we multiply numerator and denominator by s /(Oo , 
f(s) = ^ 2 

S + SCOo/Q -KOo 



7^ 



This form is the same as before, except th' nn:Mr;.itor is s in- 
stead of 0)0^ 1" other words, we can transftmii i iowpass 
function to a highpass one by changing the iiiinicrator, leaving 
the denominator alone. 

The Bode plot offers another perspective on '<:<•.■■ pass-to-high- 
pass transformations. Figure 5a shows the Bn'U plot of a 
second-order lowpass function: flat to the ciir. : i frequency, 
then decreasing at -40db/decade. Multip'i> im: > s' adds a 
-^40db/decade slope to this function. The addiuonal slope pro- 
vides a low-finequency rolloff below the cutoff frequency, and 
above cutoff it gives a flat response (Figure 5b) by cancelling 
the original -40db/decade slope. 

We can use the same idea to generate a h.mdp.'.s,-^ filter. Multi- 
ply the lowpass response by s, which adds a +20i'ib/decade 
slope. The net response is then -l-20db/decade below the cutoff 
and -20db/decade above, yielding the bandpass response of 
Rgure 5c: 

f(s) = 2 
+ S(flD/Q + 0>0 

Notice that the rate of cutoff in a second-order bandpass filter 
is half that of the other types, because the available 40db/de- 
cade slope must be shared between the two skirts of the filter. 

In summary, second-order lowpass, bandpass and highpass 
functions in normalized fonn have tlie same denominatoi-, but 
they have nmaeraiiois of eno'^, Mos md s^ respectively. 



S ■ +30db/decade S . <.40<lb/decalle 






!■ — 










-«)dbUecade .>40(OMecade ^2adlvdecade -ZOdtVdecade | 
(a) LOtWPASS (b) HIGHPASS (c) BANDPASS 



Figure 3. Bode plols of2nd-order filters 

Notch and Allpass Filters 

A notch, ra* bandstop, filter rejects fiequencies in a certain 
band while passing all ollieis. Ag^, you derive this filler's 
transfo flmctioa by changing the numerator of the standud 

secood-order chaiacteristie: 



2 2 



f(s) = - 

s' + soio/Q + lOo 

2 2 

Consider the limit cases. When s = 0, f(s) reduces to (Dz /Wo ■ 
which is finite. When s -» <» the equation reduces to 1. At s = 
j<4z, the numerator becomes zero, f(s) becomes zero (a double 
zero, in fact, because of s^ in the nimierator), and we have the 



characteristic ol a notch filter. The gain at frequencies above 
and below the notch will differ unless (Oz = (Oq. The notch filter 
equation can also be expressed as follows: 

f(s) = ^ ' ^ T-H- 



coz" 



s" + s(iX)/Q + ct)(i " 



' + s(Oo/Q + C0() " s" + so)o/Q + coo ' 



In other words, the notch filter is based on the sum of a lowpass 
and a highpass characteristic. We use this fact in practical filter 
implementations to generate the notch response from existing 
highpass and lowpass responses. It may seem odd that we cre- 
ate a zero by adding two responses, but their phase relation- 
ships make it possible. 

Finally there is the allpass filter, which has the form 



f(s)^ 



s - soJo/Q + too 
s^ + s(flo/Q + 0)0^ 



This response has poles and zeros placed symmetrically on ei- 
ther side of the j(0 axis as shown in Figure 6. The effects of 
these poles and zeroes cancel exactly to give a level and uni- 
fomi frequency response. It might seem that a piece of wire 
could provide this effect more cheaply, but unlike a wire, the 
allpass filter provides a usefiil variation of phase respcmse with 
frequency. 




Figure 6. Comptex function oflnd-order allpass filler 

We have now covered first- and second-order filters with 
lowpass, highpass, bandpass, notch and allpass configurations. 
The MFIO and MAX260 series of switched-capacitor IC filters 
use these same techniques, cascading first- anil second-order 
sections to construct filters of any order. Let us see how this is 
done. 

Higher Order Filters 

We are fortunate in not having to treat the higher-order filters 
separately, because a polynomial in s of any length can be fac- 
tored into a series of quadratic terms (plus a single first-order 
term, if the polynomial is odd). A fifth-order lowpass filter, for 
instance, might have the transfer function 

= 1 — 4 — r — 2 

s -t-a4S +a3S -1-828 +ais + ao 



7-24 



where all die an are constants. We can factor die denominator 
as follows: 



f(s)=- 



1 



(s^ + se>i/Qi + «»i ^ (s^ + sta^/Qi + W2 ^) (s + «^) 
which is the same as 

us) = ^ T " ~^ T" * 7 : 

(S^ + S(Oi/Qi + (Oj ^) (S^ + 3(02/Q2 + 0)2 ^) + '^1 

The last equation represents a filter that we can physically real- 
ise as two second-CHder sections and cme first-order section, all 
in cascade. This configuration simplifies Ae design by making 
it easier to visualize the response in terms of poles and zeroes 
in the complex-frequency plane. We know that each second- 
order term contributes one complex-conjugate pole pair, and 
that the first-order term contributes one pole on the negative- 
real axis. If the transfer function has a higher-order polynomial 
in the numerator, that polynomial can be factored as well, 
which means that the second-order sections will be som^iing 
other than lowpass secticms. 







iui 


<r 1 




"T" s^'s" 

^ 







Figure 7a. Pole-Zero diagram of 4lh-ordei Btnn'rwnrin /- m pass filter 

Using the synthesis principles described above, we can build a 
great variety of filters simply by placing poles and zeroes at 
different positions in the complex-fiequency plane. Most appli- 
cations require only a restricted number of these possibilities, 
however. And for diese, many earlier experimenters such as 
Butterworft and Chebydiev have alleatfy woifced out the de- 
tails. 

The Butterworth Filter 

A type of filter that is common to many applications requires a 
response that is flat in the passband but cuts off as sharply as 
possible diereafter. You can obtaiii that response by arranging 
the poles of a lowpass filter with equal spacing around a semi- 
circular locus, and the residt will be a Butterw<»th filter. The 



pole-zero diagram of Figure 7a, for example, represents a 

fourth-order type of Butterworth filter. 

The poles in Figure 7a have different Q values, but they all 
have the same too because they are all the same distance from 
the origin. The three-dimensional surface corresponding to this 
filter (Figure 7b) illustrates how, as the effect of l]ie lowest-Q 
pole starts to wear off, the next pole takes over, and the next, 
until you run out of poles and the response falls off at 
-80db/decade. 

You can build Butterworth versions of highpass, bandpass, and 
odier filter types, but the poles of these filters will not be ar- 
ranged in a simple semicircle. In most cases you begin by 
designing a lowpass filter, then applying ti3nsfoniiati<»is to gen- 
erate the odier types (such as the s -» 1/s that we used eailira' to 
change a lowpass into a highpass). 

The Chebychev Filter 

By bringing poles closer to the jco axis (increasing their Qs) we 
can make a filter whose frequency cutoff is steeper dian a 
Butterworft. This aiiangenient has a penalty-the ^ects of 
each pole will be visible in the fO»et response, giving a varia- 
tion in amplitude known as ripple in the passband. With proper 
pole arrangement the variations can be made equal, however, 
which results in a Chebychev filter. 

You derive a Chebychev filter from a Butterworth by moving 
each pole closer to the ja> axis in the same proportion, so that 
the poles lie on an ellipse (Figure 8a). Figure 8b demonstrates 
how each pole contributes one peak to the passband ripple. 
Moving the poles closer to the jco axis increases the passband 
rii^le, but provides a more abrupt cutoff in the stopband. The 
Chebychev filter therefore offers a tradeoff between ri[)ple and 
cutoff. In this respect the Butterworth filter in which passband 
ripple has been set to zero, is a special case of die Chebychev. 




Figure 7h. Comptex function of4[h-order Bullern'orlh lowpass filter 

The Bessel Filter 

Butterworth and Chebychev filters with sharp cutoffs cany a 
penalty that is e vMent fam the positions of their poles in the s 
plane. Bringing the poles cloiser to the jea axis inereases limr Q, 



7-2? 




Figure Su. P^'h^-ZLm diu^iam :'t 4sli-i'rdt'r Chehychev towpass filler 




Figure Sh C^yniplex function ,)f 4lh-order Chebyt hev lowpass filler 

which degrades the filter's transient response. Overshoot or 
even ringing at the lespinse edges can result. 

The Bessel filter represents a tradeoff in tte opposite direction 
from the Butterworth. The Bessel 's poles lie on a locus further 

from the jto axis (Figure 9). Transient response is improved, 
but at the expense of a less-steep cutoff in the stopband. 

The Elliptic Filter 

By increasing the Q of poles nearest the passband edge, you 
can obtain a flltn: widi sharper stopband cutoff dian that of the 
Chebychev, without incurring more passband ripple. Doing 
this alone would produce a gain peak, but you can compensate 
for the peak by providing a zero at the bottom of the stopband. 
Additional zeroes must be spaced along the stopband to ensure 
that the filter response remains below the desired level of 
stopband attenuation. Figure 10a shows the pole-zero diagram 
for this type— an elliptic filter. Figure 10b shows the corre- 
sponding transfer-function surface. As you may imagiiie, the 
elliptic filter's hi^-Q poles produce a uanneDt leqwnse that 
is even worse dum dtat of the Chebychev. 



Note that all the filters described have the same number of 
zeros as poles (this must be the case, or the transfer function 
would not be a dimensionless expression). Elliptic filters, for 
example, space tteir zeroes along the ja> axis in the stopband. 
In the case of Bessel, Butterworth, and Chebychev all the zeros 
are on top of each other at infinity. Because there are no zeros 
explicit in the numerator, these filter types are sometimes called 
all-pole filters. 

We have now extended our ideas to cover not only first- and 
second-order filters, but also filters of higher order, including 
stmie particularly useful ct^. Now it's time to get away fiora 
abstract theory and talk about practical circuits. 

The State Variable Filter 

As demonstrated earlier, we can construct any filter from first- 
and second-order building blocks. You can regard the first- 
order filter as a special case of the second order, so our basic 
building block should be a second-order section, firom which 
we can derive lowpass, hig^nss, bandpass, notch, or allpass 
characteristics. 



Figure 9. Pole-Zero diagram of4th-order Bessel lowpass fitter 

The state variable filter is a convenient realization for the sec- 
ond-order section. It uses two cascaded integrators and a 
summing junction as shown in Figure 1 1 . We know that the 
characteristic of an integrator is simply wqIs, but to demmstraie 
the principle while sinqdifying the mathematics, we can assume 
diat both iotegtatm lutve «e = i, ^d that their characteristic is 
simply 1/s. Then we can write equatims for each of the integra- 
tors in Figure 1 1 : 

L = B/s or B = sL 

B = HA or H = sBss^ 

The equation for the summing junction in Hgue II issinqdy 
H = I-B-L. 



7726 



If we subsdtute for H and B using 4ie 

get: 

s^L = I - sL - L 
or 

s^L + sL + L = I, 
whence 

L(s^ + s+ 1) = I, 



■ + S+ 1 



which is the classic normalized lowpass response. Because B 



= sL and H = s L, 



s^ + s + 1 



A H s" 

and -r = -5 

' s +S+1 



These are, respectively, the classic bandpass and higiqiass re^ 

sponses. 

Thus one filter provides simultaneous lowpass, bandpass, and 
highpass outputs. We can create actual filters with real values 
of coo and Q from diese equations by buSding inte^ators widi 
Q>o ^ 1 . and fee(%adE ^Ktofs to ttie sunam^ juBctiaii witti val- 
ues 1 . 

In theory you can create higher-order fihers by cascading 
more than two integrators. Some integrated-circuit fdters use 
this approach, but it has drawbacks. To program these fdters 
you must calculate coefficient values for the higher-order poly- 
nomial. Also, a long string of integiatofs introduces stability 




Fifiurt lOa. Poie-Zero diagram of 4th-order Elliptic Umpass fiber 




Fi/ture lOb. Complex function of 4ih-order Elliptic lowpass filter 

problems. By limiting ourselves to second-order sections, we 
have the advantage of working directly with the coo and Q vari- 
ables associated with each pole. 

Switched-Capacitor Filters 

The characteristics of all active filters, regardless of architec- 
ture, depend on the accuracy of their RC lime constants. 
Because the typical precision achieved for integrated resistors 
and capacitors is about ±30%, a designer is handicapped when 
attempting to use absolute values for the components in an inte- 
grated filter circuit. The ratio of capacitor values on a chip can 
be accurately controlled, however, to about one part in 2000. 
Switched-capacitor filters use these capacitor ratios to achieve 
precision without the need for precise external components. 

In the switched-capacitor integrator of Figure 12, the combina- 
tion of C| and the switch simulates a resistor. The 
switch Si toggles continuously at a clock frequency fcLK- Ca- 
pacitor Ci charges to Vq) when S| is to the left. When it 
switches to the right, Ci dionps charge into the integrator's sum- 
ming node, from which it flows into the c^acitor Cj. The 
charge on Ci during each clock cycle is 

Q = C,Vn<, 

and therefore the average current transferred to the summing 
junction is 

I = Qfc = CiVit,.fc. 

Notice that the current is proportional to Vin, so we have the 
same effect as a resistor of value 



R = - 



I 



1 

C,fc 



The integrator's coo is therefore 
1 C,fc 



0)0 = 



RC2 C2 



7r27 




Figure II. Second-order, state-variabte filter 

Because (Uo is proportional to the ratio of the two capacitors, 
its value can be controlled with great accuracy. Moreover, the 
value is proportional to the clock frequency, so you can vary 
the filter characteristics by changing fcLK, 'f desired. But the 
switched capacitor is a sampled-data system, and therefore is 
not completely equivalent to the time-continuous RC integra- 
tor. The differences, in fact, pose three issues for a designer. 

First, the signal passing through a switched capacitor is modu- 
lated by the clock fiequency. If the input signal contains 
frequencies near the clock frequency, they can intermodulate 
and cause spurious output frequencies within the system 
bandwidth. For many applications this is not a probiem be- 
cause the input bandwidth has already been limited to less than 
half the clock frequency. If not, the switched-capacitor filter 
must be preceded by an anti-aliasing filter that removes any 
components of input fteqUency atove oae hidf of dw dbdi fre- 
quency. 

Second, the integrator output (Figure 12) is not a linear ramp, 
but a series of steps at the clock frequency. There may be 
small spikes at the step transitions caused by charge injected 
by the switches. These aberrations may not be a problem if the 
system bandwidth following the filter is much lower than the 
clock fiequency. Otherwise, you must again add another fil- 
ter at the actpat of ^ swbdied-capacilar fUtBrts remove the 
clock ripple. 

TTiird, the behaviour of the switched-capacitor filler differs 
from the ideal, time-continuous model because the input signal 
is sampled only once per clock cycle. The filter output devi- 
ates from the ideal as the filter's pole frequency approaches 
the clock fiequency, particularly for low values of Q. Yon cm, 
however, calculate these effects and allow for dmn during the 
design process. Maxim's filter-design software, for instance, 
performs these corrections. 

Considering the above, it is best to keep the ratio of clock-to- 
center frequency as large as possible. Typical ratios for 
switched-capacitor filters range from about 28: 1 to 200: 1 . The 
MAX262, for example, allows a maximum cl(x;k frequency of 
4MHz, so using the minimum ratio of 28: 1 gives a nuuiimum 
center frequency of 140kHz. At the low end, switched-capaci- 
tor filters have the advantage that they can hanifle low 



frequencies without using imcomforeddy large values eS R and 

C. You simply lower the clock frequency. 

Some Real Devices 

The second-order, state-variable filter, built with switched-ca- 
pacitor techniques, is the primary component in programmable 
filter chips such as the MFIO, as well as the more recent series 
from Maxim: the MAX260 to MAX268. Each of these IC de- 
vices contain two second-order, state-variable filter sections, 
which lets you configure a single diip as a first-, second-, third- 
, or fourth-order filter. For higher-order filters, you use two or 
more chips. 

The MFIO adds sophistication to the state-variable filter by in- 
corporating both a summing amplifier and a summing node at 
the input These extra feedback connections let you configure 
the chip's first output as highpass, notch, or allpass, while die 
other two outputs remain bandpass and lowpass as specified. 
You set die center frequency and Q for each section by adding 
extranal resistors in the appropriate ratios. The MFIO has be- 
come an industry standard over the years, particularly for die 
telephone-grade audio found in telecommunication systems, 
where the chip's upper-trequency limit of 30kHz is not a problem. 

More teceaUy, Maxim has introduced an improved series of fil- 
ters based on the saioB sl^e-vatiable architecture. The series 
MAX260 to 262, for instance, consists of chips that are pro- 
grammed directly from a microprocessor bus. These products, 
which eliminate external programming resistors, can easily im- 
plement adaptive or frequency-agile filters. 




Figure 12. Sn'ilched-Capctrilor ln!ei>riifor 

For non-microprocessor applications, the MAX263 and MAX264 
filters offer pin-strap programming. The MAX267 and MAX268 
also feature pin-str^ programming but they reduce the package 
pin count by OHieting only handglass outputs. The MAX26S and 
MAX266, like the MFIO, eUa extenud-resistor pnigramming. In 
conqiarison widi die MFIO, dKse MAX260-sraies devices all offer 
perfomiance improvements: wider useful bandwiddi (to 14(Miz 
for die MAX262, 264, 266 and 268), lower DC offset (MAX260), 
and lower noise (all devices), which allows use of the filters in 12- 
bit systems. See block diagram of die MAX261 andMAX262. 

Software support for filter design 

As companion to the MAX260 series of devices. Maxim ha» 
introduced a soffware-deiign package that runs oa industry-stan- 



7-28 



dard PCs. By answering a series of prompts, the user specifies 
the type of filter leqiiiied (low^pass, band^pass, etc), die desired 
polynomial (BuHerworth, Cbebycbev or Elliptic), and die 
passband and stopband characteristics in terms of frequency 
and attenuation. The software then automates the design pro- 
cess by calculating the necessary filter order, along with the 
required frequency and Q for all poles and zeroes. 

The system then passes this information to other softwaie 
modules for calculation of the physical-filter paranmers 
(digital-programming coefficients are appropriate for the 
MAX260-264 and for the MAX267 and 268, or resistor values 
for the MFIO, MAX265 and MAX266). You can calculate and 
display the filter characteristic in graphic form. Then, by intro- 
ducing tolerances you can allow for worst-case component 
variations. This software is available for $2.00 to designers 
worlcing with products of the MAX260 series. 



Conclusion 

The purpose of this article was to introduce the concepts and ter- 
minology associated with switcbed-capacitOT active filters. If 
you have read and imderstood the material you should now be 
able to understand most filler data sheets. A more detailed de- 
scription of the filter devices and their accon^anying safemfe 
is planned for a later issue. 



MOPE io Q CK 




A PMKHUM MEMORY 
MODE, Id, Q 



00. 



INTERFACE 

LOGIC 



+' +< i 

Ik 01 M>-«3 m 



B PKKHUM MEMORY 
■ODE, Ik Q 



MikXMI/R ONLY 



OMa OSCOUT ok OUT GUCa OP M 



OP GOT 



HAX260I6II62 Block Diagram 



7-29